Searched refs:PCH_DPLL_SEL (Results 1 – 2 of 2) sorted by relevance
2955 temp = I915_READ(PCH_DPLL_SEL); in ironlake_pch_enable()2962 I915_WRITE(PCH_DPLL_SEL, temp); in ironlake_pch_enable()3441 temp = I915_READ(PCH_DPLL_SEL); in ironlake_crtc_disable()3443 I915_WRITE(PCH_DPLL_SEL, temp); in ironlake_crtc_disable()5910 tmp = I915_READ(PCH_DPLL_SEL); in ironlake_get_pipe_config()
4073 #define PCH_DPLL_SEL 0xc7000 macro