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Searched refs:MI_SEMAPHORE_SYNC_RV (Results 1 – 2 of 2) sorted by relevance

/gfx-drm/usr/src/uts/intel/io/i915/
H A Dintel_ringbuffer.c1792 ring->semaphore_register[VCS] = MI_SEMAPHORE_SYNC_RV; in intel_init_render_ring_buffer()
H A Di915_reg.h351 #define MI_SEMAPHORE_SYNC_RV (2<<16) /* VCS wait for RCS (VRSYNC) */ macro