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Searched refs:MEMSWCTL (Results 1 – 2 of 2) sorted by relevance

/gfx-drm/usr/src/uts/intel/io/i915/
H A Dintel_pm.c2916 rgvswctl = I915_READ16(MEMSWCTL); in ironlake_set_drps()
2924 I915_WRITE16(MEMSWCTL, rgvswctl); in ironlake_set_drps()
2925 POSTING_READ16(MEMSWCTL); in ironlake_set_drps()
2928 I915_WRITE16(MEMSWCTL, rgvswctl); in ironlake_set_drps()
2986 if (wait_for((I915_READ(MEMSWCTL) & MEMCTL_CMD_STS) == 0, 10)) in ironlake_enable_drps()
3008 rgvswctl = I915_READ16(MEMSWCTL); in ironlake_disable_drps()
3021 I915_WRITE(MEMSWCTL, rgvswctl); in ironlake_disable_drps()
H A Di915_reg.h1584 #define MEMSWCTL 0x11170 /* Ironlake only */ macro