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Searched refs:IXGBE_WRITE_REG (Results 1 – 16 of 16) sorted by relevance

/illumos-gate/usr/src/uts/common/io/ixgbe/core/
H A Dixgbe_dcb_82599.c136 IXGBE_WRITE_REG(hw, IXGBE_RTRPCS, reg); in ixgbe_dcb_config_rx_arbiter_82599()
169 IXGBE_WRITE_REG(hw, IXGBE_RTRPCS, reg); in ixgbe_dcb_config_rx_arbiter_82599()
192 IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, i); in ixgbe_dcb_config_tx_desc_arbiter_82599()
193 IXGBE_WRITE_REG(hw, IXGBE_RTTDT1C, 0); in ixgbe_dcb_config_tx_desc_arbiter_82599()
217 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, reg); in ixgbe_dcb_config_tx_desc_arbiter_82599()
247 IXGBE_WRITE_REG(hw, IXGBE_RTTPCS, reg); in ixgbe_dcb_config_tx_data_arbiter_82599()
282 IXGBE_WRITE_REG(hw, IXGBE_RTTPCS, reg); in ixgbe_dcb_config_tx_data_arbiter_82599()
320 IXGBE_WRITE_REG(hw, IXGBE_MFLCN, reg); in ixgbe_dcb_config_pfc_82599()
554 IXGBE_WRITE_REG(hw, IXGBE_MRQC, reg); in ixgbe_dcb_config_82599()
565 IXGBE_WRITE_REG(hw, IXGBE_MTQC, reg); in ixgbe_dcb_config_82599()
[all …]
H A Dixgbe_dcb_82598.c130 IXGBE_WRITE_REG(hw, IXGBE_RUPPBMR, reg); in ixgbe_dcb_config_rx_arbiter_82598()
140 IXGBE_WRITE_REG(hw, IXGBE_RMCS, reg); in ixgbe_dcb_config_rx_arbiter_82598()
152 IXGBE_WRITE_REG(hw, IXGBE_RT2CR(i), reg); in ixgbe_dcb_config_rx_arbiter_82598()
159 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, reg); in ixgbe_dcb_config_rx_arbiter_82598()
164 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, reg); in ixgbe_dcb_config_rx_arbiter_82598()
195 IXGBE_WRITE_REG(hw, IXGBE_DPMCS, reg); in ixgbe_dcb_config_tx_desc_arbiter_82598()
239 IXGBE_WRITE_REG(hw, IXGBE_PDPMCS, reg); in ixgbe_dcb_config_tx_data_arbiter_82598()
259 IXGBE_WRITE_REG(hw, IXGBE_DTXCTL, reg); in ixgbe_dcb_config_tx_data_arbiter_82598()
280 IXGBE_WRITE_REG(hw, IXGBE_RMCS, reg); in ixgbe_dcb_config_pfc_82598()
289 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, reg); in ixgbe_dcb_config_pfc_82598()
[all …]
H A Dixgbe_common.c467 IXGBE_WRITE_REG(hw, IXGBE_RTTDQSEL, i); in ixgbe_start_hw_gen2()
468 IXGBE_WRITE_REG(hw, IXGBE_RTTBCNRC, 0); in ixgbe_start_hw_gen2()
1636 IXGBE_WRITE_REG(hw, IXGBE_EERD, eerd); in ixgbe_read_eerd_buffer_generic()
1975 IXGBE_WRITE_REG(hw, IXGBE_SWSM, swsm); in ixgbe_release_eeprom_semaphore()
2521 IXGBE_WRITE_REG(hw, IXGBE_RAL(i), 0); in ixgbe_init_rx_addrs_generic()
2522 IXGBE_WRITE_REG(hw, IXGBE_RAH(i), 0); in ixgbe_init_rx_addrs_generic()
2531 IXGBE_WRITE_REG(hw, IXGBE_MTA(i), 0); in ixgbe_init_rx_addrs_generic()
2763 IXGBE_WRITE_REG(hw, IXGBE_MCSTCTRL, in ixgbe_update_mc_addr_list_generic()
3346 IXGBE_WRITE_REG(hw, IXGBE_GSSR, gssr); in ixgbe_release_swfw_sync()
3909 IXGBE_WRITE_REG(hw, IXGBE_UTA(i), 0); in ixgbe_init_uta_tables_generic()
[all …]
H A Dixgbe_82598.c110 IXGBE_WRITE_REG(hw, IXGBE_GCR, gcr); in ixgbe_set_pcie_completion_timeout()
520 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl_reg); in ixgbe_fc_enable_82598()
521 IXGBE_WRITE_REG(hw, IXGBE_RMCS, rmcs_reg); in ixgbe_fc_enable_82598()
532 IXGBE_WRITE_REG(hw, IXGBE_FCRTL(i), 0); in ixgbe_fc_enable_82598()
533 IXGBE_WRITE_REG(hw, IXGBE_FCRTH(i), 0); in ixgbe_fc_enable_82598()
541 IXGBE_WRITE_REG(hw, IXGBE_FCTTV(i), reg); in ixgbe_fc_enable_82598()
761 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc); in ixgbe_setup_mac_link_82598()
881 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl); in ixgbe_reset_hw_82598()
910 IXGBE_WRITE_REG(hw, IXGBE_GHECCR, gheccr); in ixgbe_reset_hw_82598()
1086 IXGBE_WRITE_REG(hw, IXGBE_ATLASCTL, in ixgbe_read_analog_reg8_82598()
[all …]
H A Dixgbe_82599.c136 IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp); in ixgbe_init_phy_ops_82599()
301 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc); in prot_autoc_write_82599()
1091 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl); in ixgbe_reset_hw_82599()
1250 IXGBE_WRITE_REG(hw, IXGBE_FDIRFREE, 0); in ixgbe_reinit_fdir_tables_82599()
1259 IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD, in ixgbe_reinit_fdir_tables_82599()
1263 IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD, in ixgbe_reinit_fdir_tables_82599()
1426 IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD, in ixgbe_set_fdir_drop_queue_82599()
1430 IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD, in ixgbe_set_fdir_drop_queue_82599()
1994 IXGBE_WRITE_REG(hw, IXGBE_FDIRCMD, in ixgbe_fdir_erase_perfect_filter_82599()
2499 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, in ixgbe_reset_pipeline_82599()
[all …]
H A Dixgbe_vf.c41 #define IXGBE_VFWRITE_REG IXGBE_WRITE_REG
119 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0); in ixgbe_virt_clr_reg()
122 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(i), 0); in ixgbe_virt_clr_reg()
123 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(i), 0); in ixgbe_virt_clr_reg()
124 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), 0); in ixgbe_virt_clr_reg()
126 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(i), 0); in ixgbe_virt_clr_reg()
127 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(i), 0); in ixgbe_virt_clr_reg()
128 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), 0); in ixgbe_virt_clr_reg()
129 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(i), 0); in ixgbe_virt_clr_reg()
130 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(i), 0); in ixgbe_virt_clr_reg()
[all …]
H A Dixgbe_x540.c238 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl); in ixgbe_reset_hw_X540()
702 IXGBE_WRITE_REG(hw, IXGBE_EEC_BY_MAC(hw), flup); in ixgbe_update_flash_X540()
715 IXGBE_WRITE_REG(hw, IXGBE_EEC_BY_MAC(hw), flup); in ixgbe_update_flash_X540()
803 IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw), in ixgbe_acquire_swfw_sync_X540()
877 IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw), swfw_sync); in ixgbe_release_swfw_sync_X540()
957 IXGBE_WRITE_REG(hw, IXGBE_SWFW_SYNC_BY_MAC(hw), swsm); in ixgbe_release_swfw_sync_semaphore()
961 IXGBE_WRITE_REG(hw, IXGBE_SWSM_BY_MAC(hw), swsm); in ixgbe_release_swfw_sync_semaphore()
1025 IXGBE_WRITE_REG(hw, IXGBE_MACC, macc_reg); in ixgbe_blink_led_start_X540()
1031 IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, ledctl_reg); in ixgbe_blink_led_start_X540()
1060 IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, ledctl_reg); in ixgbe_blink_led_stop_X540()
[all …]
H A Dixgbe_mbx.c297 IXGBE_WRITE_REG(hw, IXGBE_VFMAILBOX, IXGBE_VFMAILBOX_VFU); in ixgbe_obtain_mbx_lock_vf()
342 IXGBE_WRITE_REG(hw, IXGBE_VFMAILBOX, IXGBE_VFMAILBOX_REQ); in ixgbe_write_mbx_vf()
376 IXGBE_WRITE_REG(hw, IXGBE_VFMAILBOX, IXGBE_VFMAILBOX_ACK); in ixgbe_read_mbx_vf()
424 IXGBE_WRITE_REG(hw, IXGBE_MBVFICR(index), mask); in ixgbe_check_for_bit_pf()
510 IXGBE_WRITE_REG(hw, IXGBE_VFLREC(reg_offset), (1 << vf_shift)); in ixgbe_check_for_rst_pf()
532 IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_number), IXGBE_PFMAILBOX_PFU); in ixgbe_obtain_mbx_lock_pf()
577 IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_number), IXGBE_PFMAILBOX_STS); in ixgbe_write_mbx_pf()
616 IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_number), IXGBE_PFMAILBOX_ACK); in ixgbe_read_mbx_pf()
H A Dixgbe_phy.c595 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); in ixgbe_read_phy_reg_mdi()
626 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); in ixgbe_read_phy_reg_mdi()
698 IXGBE_WRITE_REG(hw, IXGBE_MSRWD, (u32)phy_data); in ixgbe_write_phy_reg_mdi()
706 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); in ixgbe_write_phy_reg_mdi()
735 IXGBE_WRITE_REG(hw, IXGBE_MSCA, command); in ixgbe_write_phy_reg_mdi()
2286 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), i2cctl); in ixgbe_i2c_stop()
2342 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), i2cctl); in ixgbe_clock_out_i2c_byte()
2368 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), i2cctl); in ixgbe_get_i2c_ack()
2417 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), i2cctl); in ixgbe_clock_in_i2c_bit()
2523 IXGBE_WRITE_REG(hw, IXGBE_I2CCTL_BY_MAC(hw), *i2cctl); in ixgbe_lower_i2c_clk()
[all …]
H A Dixgbe_x550.c335 IXGBE_WRITE_REG(hw, IXGBE_ESDP, esdp); in ixgbe_setup_mux_ctl()
893 IXGBE_WRITE_REG(hw, IXGBE_DMACR, reg); in ixgbe_dmac_config_X550()
919 IXGBE_WRITE_REG(hw, IXGBE_DMACR, reg); in ixgbe_dmac_config_X550()
996 IXGBE_WRITE_REG(hw, IXGBE_DMACR, reg); in ixgbe_dmac_update_tcs_X550()
1003 IXGBE_WRITE_REG(hw, IXGBE_DMACR, reg); in ixgbe_dmac_update_tcs_X550()
1367 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, reg); in ixgbe_disable_mdd_X550()
1372 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, reg); in ixgbe_disable_mdd_X550()
1390 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL, reg); in ixgbe_enable_mdd_X550()
1395 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, reg); in ixgbe_enable_mdd_X550()
2504 IXGBE_WRITE_REG(hw, IXGBE_CTRL, ctrl); in ixgbe_reset_hw_X550em()
[all …]
H A Dixgbe_common.h42 IXGBE_WRITE_REG(hw, reg, (u32) value); \
43 IXGBE_WRITE_REG(hw, reg + 4, (u32) (value >> 32)); \
/illumos-gate/usr/src/uts/common/io/ixgbe/
H A Dixgbe_main.c1601 IXGBE_WRITE_REG(hw, IXGBE_WUC, 0); in ixgbe_chip_start()
1796 IXGBE_WRITE_REG(&ixgbe->hw, in ixgbe_tx_clean()
1798 IXGBE_WRITE_REG(&ixgbe->hw, in ixgbe_tx_clean()
2752 IXGBE_WRITE_REG(hw, in ixgbe_setup_tx_ring()
2755 IXGBE_WRITE_REG(hw, in ixgbe_setup_tx_ring()
2875 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc); in ixgbe_setup_rss()
4000 IXGBE_WRITE_REG(hw, IXGBE_EICR, eicr); in ixgbe_overtemp_check()
4372 IXGBE_WRITE_REG(hw, IXGBE_EIAC, 0x0); in ixgbe_disable_adapter_interrupts()
4452 IXGBE_WRITE_REG(hw, IXGBE_EIAC, eiac); in ixgbe_enable_adapter_interrupts()
4453 IXGBE_WRITE_REG(hw, IXGBE_EIAM, eiam); in ixgbe_enable_adapter_interrupts()
[all …]
H A Dixgbe_osdep.h95 #define IXGBE_WRITE_REG(a, reg, value) \ macro
100 IXGBE_WRITE_REG(a, ((reg) + ((index) << 2)), (value))
H A Dixgbe_gld.c119 IXGBE_WRITE_REG(&ixgbe->hw, IXGBE_FCTRL, reg_val); in ixgbe_m_promisc()
254 IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, ixgbe->ixgbe_led_reg); in ixgbe_led_set()
989 IXGBE_WRITE_REG(hw, IXGBE_EITR(i), in ixgbe_set_priv_prop()
H A Dixgbe_rx.c744 IXGBE_WRITE_REG(&ixgbe->hw, IXGBE_RDT(rx_ring->hw_index), rx_tail); in ixgbe_ring_rx()
H A Dixgbe_tx.c1073 IXGBE_WRITE_REG(hw, IXGBE_TDT(tx_ring->index), index); in ixgbe_tx_fill_ring()