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Searched refs:IS_GEN7 (Results 1 – 10 of 10) sorted by relevance

/gfx-drm/usr/src/uts/intel/io/i915/
H A Di915_gem_context.c399 if (IS_GEN7(ring->dev)) in mi_set_context()
414 if (IS_GEN7(ring->dev)) in mi_set_context()
H A Dintel_dp.c320 else if (IS_GEN6(dev) || IS_GEN7(dev)) in intel_dp_aux_ch()
873 if (port == PORT_A && IS_GEN7(dev) && !IS_VALLEYVIEW(dev)) { in intel_dp_mode_set()
1304 if (port == PORT_A && IS_GEN7(dev) && !IS_VALLEYVIEW(dev)) { in intel_dp_get_hw_state()
1562 else if (IS_GEN7(dev) && port == PORT_A) in intel_dp_voltage_max()
1600 } else if (IS_GEN7(dev) && port == PORT_A) { in intel_dp_pre_emphasis_max()
1898 } else if (IS_GEN7(dev) && port == PORT_A) { in intel_dp_set_signal_levels()
1951 } else if (HAS_PCH_CPT(dev) && (IS_GEN7(dev) || port != PORT_A)) { in intel_dp_set_link_train()
2233 if (HAS_PCH_CPT(dev) && (IS_GEN7(dev) || port != PORT_A)) { in intel_dp_link_down()
H A Dintel_ringbuffer.c570 if (IS_GEN7(dev)) in init_render_ring()
949 if (IS_GEN7(dev)) { in intel_ring_setup_status_page()
1765 if (IS_GEN7(dev) && flush) in gen6_ring_flush()
1948 if (IS_GEN6(dev) || IS_GEN7(dev)) { in intel_init_bsd_ring_buffer()
H A Di915_gem.c738 } else if (IS_GEN7(ring->dev) && !IS_HASWELL(ring->dev)) { in __wait_seqno()
778 if ((gpu_dump > 0) && !IS_GEN7(ring->dev)) { in __wait_seqno()
3486 else if (IS_GEN7(dev)) in i915_gem_init_swizzling()
H A Di915_gem_execbuffer.c722 if (!IS_GEN7(dev) || ring != &dev_priv->ring[RCS]) in i915_reset_gen7_sol_offsets()
H A Di915_dma.c1492 if (IS_GEN6(dev) || IS_GEN7(dev)) in i915_driver_load()
H A Di915_irq.c246 else if (IS_GEN7(dev)) in intel_set_cpu_fifo_underrun_reporting()
2892 if (IS_GEN7(dev)) in ironlake_irq_uninstall()
H A Di915_drv.h1479 #define IS_GEN7(dev) (INTEL_INFO(dev)->gen == 7) macro
H A Dintel_pm.c3901 } else if (IS_GEN6(dev) || IS_GEN7(dev)) { in intel_enable_gt_powersave()
H A Dintel_display.c5869 if (IS_GEN7(dev)) { in ironlake_get_pfit_config()