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Searched refs:IS_GEN5 (Results 1 – 13 of 13) sorted by relevance

/gfx-drm/usr/src/uts/intel/io/i915/
H A Di915_drv.c447 WARN_ON(!IS_GEN5(dev)); in intel_detect_pch()
1225 if (IS_GEN5(dev_priv->dev)) in i915_read8()
1246 if (IS_GEN5(dev_priv->dev)) in i915_read16()
1267 if (IS_GEN5(dev_priv->dev)) in i915_read32()
1288 if (IS_GEN5(dev_priv->dev)) in i915_read64()
1315 if (IS_GEN5(dev_priv->dev)) in i915_write8()
1337 if (IS_GEN5(dev_priv->dev)) in i915_write16()
1359 if (IS_GEN5(dev_priv->dev)) in i915_write32()
1381 if (IS_GEN5(dev_priv->dev)) in i915_write64()
H A Di915_gem_debug.c236 } else if (IS_GEN5(dev)) { in init_instdone_definitions()
367 IS_GEN5(dev) || \
704 if (IS_GEN4(dev) || IS_GEN5(dev)) in i915_gpu_top()
H A Di915_gem_execbuffer.c299 if (IS_GEN5(ring->dev)) in i915_gem_execbuffer_reserve_object()
399 if (IS_GEN5(ring->dev)) in i915_gem_execbuffer_reserve()
412 if (IS_GEN5(ring->dev) && (batch_obj != obj) && obj->gtt_offset) { in i915_gem_execbuffer_reserve()
455 if (IS_GEN5(ring->dev)) in i915_gem_execbuffer_reserve()
H A Di915_gem_tiling.c119 } else if (IS_GEN5(dev)) { in i915_gem_detect_bit_6_swizzle()
H A Di915_drv.h1477 #define IS_GEN5(dev) (INTEL_INFO(dev)->gen == 5) macro
1502 #define SUPPORTS_INTEGRATED_HDMI(dev) (IS_G4X(dev) || IS_GEN5(dev))
1503 #define SUPPORTS_INTEGRATED_DP(dev) (IS_G4X(dev) || IS_GEN5(dev))
H A Dintel_ringbuffer.c128 (IS_GEN4(dev) || IS_GEN5(dev))) in gen4_render_ring_flush()
1799 } else if (IS_GEN5(dev)) { in intel_init_render_ring_buffer()
1976 if (IS_GEN5(dev)) { in intel_init_bsd_ring_buffer()
H A Dintel_dp.c1101 if (IS_GEN5(dev)) { in ironlake_edp_panel_on()
1109 if (!IS_GEN5(dev)) in ironlake_edp_panel_on()
1119 if (IS_GEN5(dev)) { in ironlake_edp_panel_on()
H A Di915_irq.c244 if (IS_GEN5(dev) || IS_GEN6(dev)) in intel_set_cpu_fifo_underrun_reporting()
1289 if (IS_GEN5(dev)) in ironlake_irq_handler()
1338 if (IS_GEN5(dev) && de_iir & DE_PCU_EVENT) in ironlake_irq_handler()
H A Dintel_sprite.c461 if (IS_GEN5(dev) || crtc_w != src_w || crtc_h != src_h) in ilk_update_plane()
H A Di915_dma.c531 if (IS_G4X(dev) || IS_GEN5(dev)) { in i915_dispatch_batchbuffer()
H A Dintel_pm.c4722 else if (IS_GEN5(dev)) in intel_init_pm()
4727 if (IS_GEN5(dev)) { in intel_init_pm()
H A Di915_gem.c3480 if (IS_GEN5(dev)) in i915_gem_init_swizzling()
H A Dintel_display.c75 if (IS_GEN5(dev)) { in intel_fdi_link_freq()
9038 if (IS_GEN5(dev) && in has_edp_a()
9389 if (IS_GEN5(dev)) { in intel_init_display()