Searched refs:HSW_CDCLK_LIMIT (Results 1 – 2 of 2) sorted by relevance
| /gfx-drm/usr/src/uts/intel/io/i915/ | ||
| H A D | intel_ddi.c | 1166 if (I915_READ(HSW_FUSE_STRAP) & HSW_CDCLK_LIMIT) in intel_ddi_get_cdclk_freq() |
| H A D | i915_reg.h | 3880 #define HSW_CDCLK_LIMIT (1 << 24) macro |