Searched refs:GFX_OP_PIPE_CONTROL (Results 1 – 2 of 2) sorted by relevance
191 intel_ring_emit(ring, GFX_OP_PIPE_CONTROL(5)); in intel_emit_post_sync_nonzero_flush()204 intel_ring_emit(ring, GFX_OP_PIPE_CONTROL(5)); in intel_emit_post_sync_nonzero_flush()259 intel_ring_emit(ring, GFX_OP_PIPE_CONTROL(4)); in gen6_render_ring_flush()277 intel_ring_emit(ring, GFX_OP_PIPE_CONTROL(4)); in gen7_render_ring_cs_stall_wa()358 intel_ring_emit(ring, GFX_OP_PIPE_CONTROL(4)); in gen7_render_ring_flush()736 intel_ring_emit(ring__, GFX_OP_PIPE_CONTROL(4) | PIPE_CONTROL_QW_WRITE | \762 intel_ring_emit(ring, GFX_OP_PIPE_CONTROL(4) | PIPE_CONTROL_QW_WRITE | in pc_render_add_request()780 intel_ring_emit(ring, GFX_OP_PIPE_CONTROL(4) | PIPE_CONTROL_QW_WRITE | in pc_render_add_request()
400 #define GFX_OP_PIPE_CONTROL(len) ((0x3<<29)|(0x3<<27)|(0x2<<24)|(len-2)) macro