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Searched refs:GEN6_UCGCTL1 (Results 1 – 2 of 2) sorted by relevance

/gfx-drm/usr/src/uts/intel/io/i915/
H A Dintel_pm.c4079 I915_WRITE(GEN6_UCGCTL1, in gen6_init_clock_gating()
4080 I915_READ(GEN6_UCGCTL1) | in gen6_init_clock_gating()
H A Di915_reg.h4564 #define GEN6_UCGCTL1 0x9400 macro