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Searched refs:FH_RSCSR_CHNL0_RBDCB_WPTR_REG (Results 1 – 6 of 6) sorted by relevance

/illumos-gate/usr/src/uts/common/io/iwk/
H A Diwk_hw.h341 #define FH_RSCSR_CHNL0_RBDCB_WPTR_REG (FH_MEM_RSCSR_CHNL0 + 0x008) macro
H A Diwk2.c2460 IWK_WRITE(sc, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, index & (~7)); in iwk_rx_softintr()
4179 IWK_WRITE(sc, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0); in iwk_init()
4194 IWK_WRITE(sc, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, in iwk_init()
/illumos-gate/usr/src/uts/common/io/iwh/
H A Diwh_hw.h343 #define FH_RSCSR_CHNL0_RBDCB_WPTR_REG (FH_MEM_RSCSR_CHNL0 + 0x008) macro
H A Diwh.c2849 IWH_WRITE(sc, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, index & (~7)); in iwh_rx_softintr()
5628 IWH_WRITE(sc, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0); in iwh_init_common()
5643 IWH_WRITE(sc, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, in iwh_init_common()
/illumos-gate/usr/src/uts/common/io/iwp/
H A Diwp_hw.h340 #define FH_RSCSR_CHNL0_RBDCB_WPTR_REG (FH_MEM_RSCSR_CHNL0 + 0x008) macro
H A Diwp.c2752 IWP_WRITE(sc, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, index & (~7)); in iwp_rx_softintr()
5162 IWP_WRITE(sc, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0); in iwp_init_common()
5177 IWP_WRITE(sc, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, in iwp_init_common()