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Searched refs:EFX_SET_OWORD_FIELD (Results 1 – 7 of 7) sorted by relevance

/illumos-gate/usr/src/uts/common/io/sfxge/common/
H A Defx_rx.c576 EFX_SET_OWORD_FIELD(oword, FRF_BZ_RX_HASH_ALG, 0); in siena_rx_init()
577 EFX_SET_OWORD_FIELD(oword, FRF_BZ_RX_IP_HASH, 0); in siena_rx_init()
578 EFX_SET_OWORD_FIELD(oword, FRF_BZ_RX_TCP_SUP, 0); in siena_rx_init()
653 EFX_SET_OWORD_FIELD(oword, FRF_BZ_RX_IP_HASH, 0); \
662 EFX_SET_OWORD_FIELD(oword, \
677 EFX_SET_OWORD_FIELD(oword, FRF_BZ_RX_IP_HASH, \
679 EFX_SET_OWORD_FIELD(oword, FRF_BZ_RX_TCP_SUP, \
693 EFX_SET_OWORD_FIELD(oword, \
695 EFX_SET_OWORD_FIELD(oword, \
697 EFX_SET_OWORD_FIELD(oword, \
[all …]
H A Defx_intr.c326 EFX_SET_OWORD_FIELD(oword, FRF_AZ_ILL_ADR_INT_KER_EN, 0); in siena_intr_init()
327 EFX_SET_OWORD_FIELD(oword, FRF_AZ_RBUF_OWN_INT_KER_EN, 0); in siena_intr_init()
328 EFX_SET_OWORD_FIELD(oword, FRF_AZ_TBUF_OWN_INT_KER_EN, 0); in siena_intr_init()
330 EFX_SET_OWORD_FIELD(oword, FRF_CZ_SRAM_PERR_INT_P_KER_EN, 0); in siena_intr_init()
352 EFX_SET_OWORD_FIELD(oword, FRF_AZ_KER_INT_LEVE_SEL, eip->ei_level); in siena_intr_enable()
353 EFX_SET_OWORD_FIELD(oword, FRF_AZ_DRV_INT_EN_KER, 1); in siena_intr_enable()
364 EFX_SET_OWORD_FIELD(oword, FRF_AZ_DRV_INT_EN_KER, 0); in siena_intr_disable()
378 EFX_SET_OWORD_FIELD(oword, FRF_AZ_DRV_INT_EN_KER, 0); in siena_intr_disable_unlocked()
409 EFX_SET_OWORD_FIELD(oword, FRF_AZ_KER_INT_LEVE_SEL, sel); in siena_intr_trigger()
410 EFX_SET_OWORD_FIELD(oword, FRF_AZ_KER_INT_KER, 1); in siena_intr_trigger()
[all …]
H A Defx_tx.c676 EFX_SET_OWORD_FIELD(oword, FRF_AZ_TX_RX_SPACER, 0xfe); in siena_tx_init()
677 EFX_SET_OWORD_FIELD(oword, FRF_AZ_TX_RX_SPACER_EN, 1); in siena_tx_init()
678 EFX_SET_OWORD_FIELD(oword, FRF_AZ_TX_ONE_PKT_PER_Q, 1); in siena_tx_init()
679 EFX_SET_OWORD_FIELD(oword, FRF_AZ_TX_PUSH_EN, 0); in siena_tx_init()
680 EFX_SET_OWORD_FIELD(oword, FRF_AZ_TX_DIS_NON_IP_EV, 1); in siena_tx_init()
681 EFX_SET_OWORD_FIELD(oword, FRF_AZ_TX_PREF_THRESHOLD, 2); in siena_tx_init()
874 EFX_SET_OWORD_FIELD(oword, FRF_AZ_TX_DC_HW_RPTR, 0); in siena_tx_qenable()
875 EFX_SET_OWORD_FIELD(oword, FRF_AZ_TX_DESCQ_HW_RPTR, 0); in siena_tx_qenable()
876 EFX_SET_OWORD_FIELD(oword, FRF_AZ_TX_DESCQ_EN, 1); in siena_tx_qenable()
939 EFX_SET_OWORD_FIELD(oword, FRF_BZ_TX_IP_CHKSM_DIS, in siena_tx_qcreate()
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H A Defx_filter.c732 EFX_SET_OWORD_FIELD(oword, FRF_AZ_TCP_FULL_SRCH_LIMIT, in siena_filter_push_rx_limits()
735 EFX_SET_OWORD_FIELD(oword, FRF_AZ_TCP_WILD_SRCH_LIMIT, in siena_filter_push_rx_limits()
738 EFX_SET_OWORD_FIELD(oword, FRF_AZ_UDP_FULL_SRCH_LIMIT, in siena_filter_push_rx_limits()
746 EFX_SET_OWORD_FIELD(oword, in siena_filter_push_rx_limits()
750 EFX_SET_OWORD_FIELD(oword, in siena_filter_push_rx_limits()
769 EFX_SET_OWORD_FIELD(oword, in siena_filter_push_tx_limits()
773 EFX_SET_OWORD_FIELD(oword, in siena_filter_push_tx_limits()
777 EFX_SET_OWORD_FIELD(oword, in siena_filter_push_tx_limits()
781 EFX_SET_OWORD_FIELD(oword, in siena_filter_push_tx_limits()
788 EFX_SET_OWORD_FIELD( in siena_filter_push_tx_limits()
[all …]
H A Dsiena_nic.c355 EFX_SET_OWORD_FIELD(oword, FRF_BZ_RX_INGR_EN, 1); in siena_nic_rx_cfg()
360 EFX_SET_OWORD_FIELD(oword, FRF_CZ_RX_FILTER_ALL_VLAN_ETHERTYPES, 0); in siena_nic_rx_cfg()
H A Defx_types.h1612 #define EFX_SET_OWORD_FIELD EFX_SET_OWORD_FIELD64 macro
1635 #define EFX_SET_OWORD_FIELD EFX_SET_OWORD_FIELD32 macro
H A Defx_ev.c443 EFX_SET_OWORD_FIELD(oword, FRF_AZ_FLS_EVQ_ID, 0); in siena_ev_init()