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Searched refs:DP_PLL_FREQ_270MHZ (Results 1 – 2 of 2) sorted by relevance

/gfx-drm/usr/src/uts/intel/io/i915/
H A Dintel_dp.c815 dpa_ctl |= DP_PLL_FREQ_270MHZ; in ironlake_set_pll_cpu_edp()
816 intel_dp->DP |= DP_PLL_FREQ_270MHZ; in ironlake_set_pll_cpu_edp()
H A Di915_reg.h2828 #define DP_PLL_FREQ_270MHZ (0 << 16) macro