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Searched refs:DPLLB_LVDS_P2_CLOCK_DIV_7 (Results 1 – 2 of 2) sorted by relevance

/gfx-drm/usr/src/uts/intel/io/i915/
H A Dintel_display.c4572 dpll |= DPLLB_LVDS_P2_CLOCK_DIV_7; in i9xx_update_pll()
5680 dpll |= DPLLB_LVDS_P2_CLOCK_DIV_7; in ironlake_compute_dpll()
6982 clock.p2 = dpll & DPLLB_LVDS_P2_CLOCK_DIV_7 ? in intel_crtc_clock_get()
H A Di915_reg.h1227 #define DPLLB_LVDS_P2_CLOCK_DIV_7 (1 << 24) /* i915 */ macro