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Searched refs:DMC_CORE_AND_BLOCK_INTERRUPT_ENABLE (Results 1 – 2 of 2) sorted by relevance

/illumos-gate/usr/src/uts/sun4u/io/px/
H A Dpx_hlib.c89 {DMC_CORE_AND_BLOCK_INTERRUPT_ENABLE, PX_CHIP_UNIDENTIFIED},
1556 CSR_XS(csr_base, DMC_CORE_AND_BLOCK_INTERRUPT_ENABLE, val); in dmc_init()
1559 CSR_XR(csr_base, DMC_CORE_AND_BLOCK_INTERRUPT_ENABLE)); in dmc_init()
H A Dpx_regs.h1087 #define DMC_CORE_AND_BLOCK_INTERRUPT_ENABLE 0x31800 macro