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Searched refs:DISPPLANE_PIPE_CSC_ENABLE (Results 1 – 2 of 2) sorted by relevance

/gfx-drm/usr/src/uts/intel/io/i915/
H A Di915_reg.h3360 #define DISPPLANE_PIPE_CSC_ENABLE (1<<24) macro
H A Dintel_display.c5982 I915_WRITE(DSPCNTR(plane), DISPPLANE_GAMMA_ENABLE | DISPPLANE_PIPE_CSC_ENABLE); in haswell_crtc_mode_set()