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Searched refs:CPU_CACHE_COHERENCE_SIZE (Results 1 – 5 of 5) sorted by relevance

/illumos-gate/usr/src/uts/common/os/
H A Dcpu_event.c93 (CPU_CACHE_COHERENCE_SIZE / sizeof (cpu_idle_prop_value_t))
172 char align[2 * CPU_CACHE_COHERENCE_SIZE];
174 char align[CPU_CACHE_COHERENCE_SIZE];
309 sz += CPU_CACHE_COHERENCE_SIZE; in cpu_event_init()
312 CPU_CACHE_COHERENCE_SIZE); in cpu_event_init()
835 sz += CPU_CACHE_COHERENCE_SIZE; in cpu_idle_prop_allocate_impl()
838 CPU_CACHE_COHERENCE_SIZE); in cpu_idle_prop_allocate_impl()
H A Dclock.c984 sz = sizeof (lbolt_info_t) + CPU_CACHE_COHERENCE_SIZE; in clock_init()
986 lb_info = (lbolt_info_t *)P2ROUNDUP(buf, CPU_CACHE_COHERENCE_SIZE); in clock_init()
996 sz = (sizeof (lbolt_cpu_t) * max_ncpus) + CPU_CACHE_COHERENCE_SIZE; in clock_init()
998 lb_cpu = (lbolt_cpu_t *)P2ROUNDUP(buf, CPU_CACHE_COHERENCE_SIZE); in clock_init()
/illumos-gate/usr/src/uts/i86pc/io/fipe/
H A Dfipe_pm.c102 #pragma align CPU_CACHE_COHERENCE_SIZE(fipe_profiles)
117 #pragma align CPU_CACHE_COHERENCE_SIZE(fipe_mc_ctrl)
128 #pragma align CPU_CACHE_COHERENCE_SIZE(fipe_ioat_ctrl)
152 #pragma align CPU_CACHE_COHERENCE_SIZE(fipe_idle_ctrl)
171 #pragma align CPU_CACHE_COHERENCE_SIZE(fipe_gbl_ctrl)
209 #pragma align CPU_CACHE_COHERENCE_SIZE(fipe_kstat)
1203 nsize += CPU_CACHE_COHERENCE_SIZE; in fipe_init()
1207 (intptr_t)fipe_gbl_ctrl.state_buf, CPU_CACHE_COHERENCE_SIZE); in fipe_init()
/illumos-gate/usr/src/uts/common/sys/
H A Dclock_impl.h60 char lbc_pad[CPU_CACHE_COHERENCE_SIZE - (2 * sizeof (int64_t))];
H A Dcpuvar.h61 #define CPU_CACHE_COHERENCE_SIZE 64 macro
258 #define CPUC_PADSIZE CPU_CACHE_COHERENCE_SIZE - CPUC_SIZE