1 /*
2  * This file and its contents are supplied under the terms of the
3  * Common Development and Distribution License ("CDDL"), version 1.0.
4  * You may only use this file in accordance with the terms of version
5  * 1.0 of the CDDL.
6  *
7  * A full copy of the text of the CDDL should have accompanied this
8  * source.  A copy of the CDDL is also available via the Internet at
9  * http://www.illumos.org/license/CDDL.
10  */
11 
12 /*
13  * Copyright 2024 Oxide Computer Company
14  */
15 
16 #ifndef _SYS_NVME_WDC_SN65X_H
17 #define	_SYS_NVME_WDC_SN65X_H
18 
19 /*
20  * This header defines vendor-specific NVMe interfaces and is not a committed
21  * interface. Its contents and existence are subject to change.
22  *
23  * Vendor-specific definitions for the WDC SN650 and SN655 NVMe devices.
24  */
25 
26 #include <sys/nvme/ocp.h>
27 
28 #ifdef __cplusplus
29 extern "C" {
30 #endif
31 
32 #define	WDC_SN650_DID	0x2720
33 #define	WDC_SN655_DID	0x2722
34 
35 typedef enum {
36 	/*
37 	 * This is the same as the OCP SMART log.
38 	 */
39 	WDC_SN65X_LOG_OCP_SMART		= OCP_LOG_DSSD_SMART,
40 	/*
41 	 * This uses the common wdc_vul_power_t structure.
42 	 */
43 	WDC_SN65X_LOG_POWER		= 0xc5,
44 	/*
45 	 * This uses the common wdc_vul_temp_t structure. The specific
46 	 * measurements are recorded in the wdc_log_sn65x_temp_t.
47 	 */
48 	WDC_SN65X_LOG_TEMP		= 0xc6,
49 	WDC_SN65X_LOG_UNIQUE_SMART	= 0xca
50 } wdc_sn65x_vul_t;
51 
52 typedef enum {
53 	WDC_SN65X_TEMP_BOARD1	= 0,
54 	WDC_SN65X_TEMP_BOARD2,
55 	WDC_SN65X_TEMP_BOARD3,
56 	WDC_SN65X_TEMP_INLET_LED,
57 	WDC_SN65X_TEMP_OUTLET_HOST,
58 	WDC_SN65X_TEMP_NAND,
59 	WDC_SN65X_TEMP_FE,
60 	WDC_SN65X_TEMP_FM0,
61 	WDC_SN65X_TEMP_FM1,
62 	WDC_SN65X_TEMP_THERMR,
63 	WDC_SN65X_TEMP_AVG_THERMR,
64 	WDC_SN65X_TEMP_AVG_NAND,
65 	WDC_SN65X_TEMP_AVG_FE,
66 	WDC_SN65X_TEMP_NSAMPLES
67 } wdc_sn65x_temp_sample_t;
68 
69 /*
70  * All data structures must be packed to account for the layout from the various
71  * programmer's manuals.
72  */
73 #pragma pack(1)
74 
75 /*
76  * This structure represents an individual entry in the WDC Customer Unique
77  * SMART log page.
78  */
79 typedef struct {
80 	uint8_t vulp_id;
81 	uint8_t vulp_rsvd0[2];
82 	uint8_t vulp_norm;
83 	uint8_t vulp_rsvd1[1];
84 	uint8_t vulp_data[4];
85 	uint8_t vulp_pad[3];
86 } wdc_vul_sn65x_smart_ent_t;
87 
88 /*
89  * This structure represents the layout of the 0xca log page. Each entry has an
90  * id that corresponds to it and should be validated when reading this.
91  */
92 typedef struct {
93 	wdc_vul_sn65x_smart_ent_t sm_prog_fail;
94 	wdc_vul_sn65x_smart_ent_t sm_erase_fail;
95 	wdc_vul_sn65x_smart_ent_t sm_wear_level;
96 	wdc_vul_sn65x_smart_ent_t sm_etoe_edet;
97 	wdc_vul_sn65x_smart_ent_t sm_crc_err;
98 	wdc_vul_sn65x_smart_ent_t sm_timed_wear;
99 	wdc_vul_sn65x_smart_ent_t sm_timed_read;
100 	wdc_vul_sn65x_smart_ent_t sm_timed_timer;
101 	wdc_vul_sn65x_smart_ent_t sm_therm_throt;
102 	wdc_vul_sn65x_smart_ent_t sm_retry_buf_over;
103 	wdc_vul_sn65x_smart_ent_t sm_pll_lock_loss;
104 	wdc_vul_sn65x_smart_ent_t sm_nand_write;
105 	wdc_vul_sn65x_smart_ent_t sm_host_write;
106 } wdc_vul_sn65x_smart_t;
107 
108 typedef enum {
109 	WDC_SN65X_SMART_ENT_ID_PROG_FAIL	= 0,
110 	WDC_SN65X_SMART_END_ID_ERASE_FAIL,
111 	WDC_SN65X_SMART_ENT_ID_WEAR_LEVEL,
112 	WDC_SN65X_SMART_ENT_ID_ETOE_ERROR_DET,
113 	WDC_SN65X_SMART_ENT_ID_CRC_ERROR,
114 	WDC_SN65X_SMART_ENT_ID_TIMED_MEDIA_WEAR,
115 	WDC_SN65X_SMART_ENT_ID_TIMED_READS,
116 	WDC_SN65X_SMART_ENT_ID_TIMED_TIMER,
117 	WDC_SN65X_SMART_ENT_ID_THERMAL_THROTLE,
118 	WDC_SN65X_SMART_ENT_ID_RETRY_BUF_OVERFLOW,
119 	WDC_SN65X_SMART_ENT_ID_PLL_LOCK_LOSS,
120 	WDC_SN65X_SMART_ENT_ID_NAND_WRITTEN,
121 	WDC_SN65X_SMART_ENT_ID_HOST_WRITTEN
122 } wdc_sn65x_smart_ent_id_t;
123 
124 #pragma	pack()	/* pack(1) */
125 
126 #ifdef __cplusplus
127 }
128 #endif
129 
130 #endif /* _SYS_NVME_WDC_SN65X_H */
131