xref: /illumos-gate/usr/src/uts/common/io/mr_sas/mr_sas.c (revision 3fe80ca4)
1 /*
2  * mr_sas.c: source for mr_sas driver
3  *
4  * Solaris MegaRAID device driver for SAS2.0 controllers
5  * Copyright (c) 2008-2012, LSI Logic Corporation.
6  * All rights reserved.
7  *
8  * Version:
9  * Author:
10  *		Swaminathan K S
11  *		Arun Chandrashekhar
12  *		Manju R
13  *		Rasheed
14  *		Shakeel Bukhari
15  *
16  * Redistribution and use in source and binary forms, with or without
17  * modification, are permitted provided that the following conditions are met:
18  *
19  * 1. Redistributions of source code must retain the above copyright notice,
20  *    this list of conditions and the following disclaimer.
21  *
22  * 2. Redistributions in binary form must reproduce the above copyright notice,
23  *    this list of conditions and the following disclaimer in the documentation
24  *    and/or other materials provided with the distribution.
25  *
26  * 3. Neither the name of the author nor the names of its contributors may be
27  *    used to endorse or promote products derived from this software without
28  *    specific prior written permission.
29  *
30  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
31  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
32  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
33  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
34  * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
35  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
36  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
37  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
38  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
39  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
40  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
41  * DAMAGE.
42  */
43 
44 /*
45  * Copyright (c) 2009, 2010, Oracle and/or its affiliates. All rights reserved.
46  * Copyright (c) 2011 Bayard G. Bell. All rights reserved.
47  * Copyright 2013 Nexenta Systems, Inc. All rights reserved.
48  * Copyright 2015, 2017 Citrus IT Limited. All rights reserved.
49  * Copyright 2015 Garrett D'Amore <garrett@damore.org>
50  * Copyright 2023 Oxide Computer Company
51  */
52 
53 #include <sys/types.h>
54 #include <sys/param.h>
55 #include <sys/file.h>
56 #include <sys/errno.h>
57 #include <sys/open.h>
58 #include <sys/cred.h>
59 #include <sys/modctl.h>
60 #include <sys/conf.h>
61 #include <sys/devops.h>
62 #include <sys/cmn_err.h>
63 #include <sys/kmem.h>
64 #include <sys/stat.h>
65 #include <sys/mkdev.h>
66 #include <sys/pci.h>
67 #include <sys/scsi/scsi.h>
68 #include <sys/ddi.h>
69 #include <sys/sunddi.h>
70 #include <sys/atomic.h>
71 #include <sys/signal.h>
72 #include <sys/byteorder.h>
73 #include <sys/sdt.h>
74 #include <sys/fs/dv_node.h>	/* devfs_clean */
75 
76 #include "mr_sas.h"
77 
78 /*
79  * FMA header files
80  */
81 #include <sys/ddifm.h>
82 #include <sys/fm/protocol.h>
83 #include <sys/fm/util.h>
84 #include <sys/fm/io/ddi.h>
85 
86 /* Macros to help Skinny and stock 2108/MFI live together. */
87 #define	WR_IB_PICK_QPORT(addr, instance) \
88 	if ((instance)->skinny) { \
89 		WR_IB_LOW_QPORT((addr), (instance)); \
90 		WR_IB_HIGH_QPORT(0, (instance)); \
91 	} else { \
92 		WR_IB_QPORT((addr), (instance)); \
93 	}
94 
95 /*
96  * Local static data
97  */
98 static void	*mrsas_state = NULL;
99 static volatile boolean_t	mrsas_relaxed_ordering = B_TRUE;
100 volatile int	debug_level_g = CL_NONE;
101 static volatile int	msi_enable = 1;
102 static volatile int	ctio_enable = 1;
103 
104 /* Default Timeout value to issue online controller reset */
105 volatile int  debug_timeout_g  = 0xF0;		/* 0xB4; */
106 /* Simulate consecutive firmware fault */
107 static volatile int  debug_fw_faults_after_ocr_g  = 0;
108 #ifdef OCRDEBUG
109 /* Simulate three consecutive timeout for an IO */
110 static volatile int  debug_consecutive_timeout_after_ocr_g  = 0;
111 #endif
112 
113 #pragma weak scsi_hba_open
114 #pragma weak scsi_hba_close
115 #pragma weak scsi_hba_ioctl
116 
117 /* Local static prototypes. */
118 static int	mrsas_getinfo(dev_info_t *, ddi_info_cmd_t,  void *, void **);
119 static int	mrsas_attach(dev_info_t *, ddi_attach_cmd_t);
120 #ifdef __sparc
121 static int	mrsas_reset(dev_info_t *, ddi_reset_cmd_t);
122 #else
123 static int	mrsas_quiesce(dev_info_t *);
124 #endif
125 static int	mrsas_detach(dev_info_t *, ddi_detach_cmd_t);
126 static int	mrsas_open(dev_t *, int, int, cred_t *);
127 static int	mrsas_close(dev_t, int, int, cred_t *);
128 static int	mrsas_ioctl(dev_t, int, intptr_t, int, cred_t *, int *);
129 
130 static int	mrsas_tran_tgt_init(dev_info_t *, dev_info_t *,
131 		    scsi_hba_tran_t *, struct scsi_device *);
132 static struct scsi_pkt *mrsas_tran_init_pkt(struct scsi_address *, register
133 		    struct scsi_pkt *, struct buf *, int, int, int, int,
134 		    int (*)(), caddr_t);
135 static int	mrsas_tran_start(struct scsi_address *,
136 		    register struct scsi_pkt *);
137 static int	mrsas_tran_abort(struct scsi_address *, struct scsi_pkt *);
138 static int	mrsas_tran_reset(struct scsi_address *, int);
139 static int	mrsas_tran_getcap(struct scsi_address *, char *, int);
140 static int	mrsas_tran_setcap(struct scsi_address *, char *, int, int);
141 static void	mrsas_tran_destroy_pkt(struct scsi_address *,
142 		    struct scsi_pkt *);
143 static void	mrsas_tran_dmafree(struct scsi_address *, struct scsi_pkt *);
144 static void	mrsas_tran_sync_pkt(struct scsi_address *, struct scsi_pkt *);
145 static int	mrsas_tran_quiesce(dev_info_t *dip);
146 static int	mrsas_tran_unquiesce(dev_info_t *dip);
147 static uint_t	mrsas_isr(caddr_t, caddr_t);
148 static uint_t	mrsas_softintr();
149 static void	mrsas_undo_resources(dev_info_t *, struct mrsas_instance *);
150 
151 static void	free_space_for_mfi(struct mrsas_instance *);
152 static uint32_t	read_fw_status_reg_ppc(struct mrsas_instance *);
153 static void	issue_cmd_ppc(struct mrsas_cmd *, struct mrsas_instance *);
154 static int	issue_cmd_in_poll_mode_ppc(struct mrsas_instance *,
155 		    struct mrsas_cmd *);
156 static int	issue_cmd_in_sync_mode_ppc(struct mrsas_instance *,
157 		    struct mrsas_cmd *);
158 static void	enable_intr_ppc(struct mrsas_instance *);
159 static void	disable_intr_ppc(struct mrsas_instance *);
160 static int	intr_ack_ppc(struct mrsas_instance *);
161 static void	flush_cache(struct mrsas_instance *instance);
162 void	display_scsi_inquiry(caddr_t);
163 static int	start_mfi_aen(struct mrsas_instance *instance);
164 static int	handle_drv_ioctl(struct mrsas_instance *instance,
165 		    struct mrsas_ioctl *ioctl, int mode);
166 static int	handle_mfi_ioctl(struct mrsas_instance *instance,
167 		    struct mrsas_ioctl *ioctl, int mode);
168 static int	handle_mfi_aen(struct mrsas_instance *instance,
169 		    struct mrsas_aen *aen);
170 static struct mrsas_cmd *build_cmd(struct mrsas_instance *,
171     struct scsi_address *, struct scsi_pkt *, uchar_t *);
172 static int	alloc_additional_dma_buffer(struct mrsas_instance *);
173 static void	complete_cmd_in_sync_mode(struct mrsas_instance *,
174 		struct mrsas_cmd *);
175 static int	mrsas_kill_adapter(struct mrsas_instance *);
176 static int	mrsas_issue_init_mfi(struct mrsas_instance *);
177 static int	mrsas_reset_ppc(struct mrsas_instance *);
178 static uint32_t mrsas_initiate_ocr_if_fw_is_faulty(struct mrsas_instance *);
179 static int	wait_for_outstanding(struct mrsas_instance *instance);
180 static int	register_mfi_aen(struct mrsas_instance *instance,
181 		    uint32_t seq_num, uint32_t class_locale_word);
182 static int	issue_mfi_pthru(struct mrsas_instance *instance, struct
183 		    mrsas_ioctl *ioctl, struct mrsas_cmd *cmd, int mode);
184 static int	issue_mfi_dcmd(struct mrsas_instance *instance, struct
185 		    mrsas_ioctl *ioctl, struct mrsas_cmd *cmd, int mode);
186 static int	issue_mfi_smp(struct mrsas_instance *instance, struct
187 		    mrsas_ioctl *ioctl, struct mrsas_cmd *cmd, int mode);
188 static int	issue_mfi_stp(struct mrsas_instance *instance, struct
189 		    mrsas_ioctl *ioctl, struct mrsas_cmd *cmd, int mode);
190 static int	abort_aen_cmd(struct mrsas_instance *instance,
191 		    struct mrsas_cmd *cmd_to_abort);
192 
193 static void	mrsas_rem_intrs(struct mrsas_instance *instance);
194 static int	mrsas_add_intrs(struct mrsas_instance *instance, int intr_type);
195 
196 static void	mrsas_tran_tgt_free(dev_info_t *, dev_info_t *,
197 		    scsi_hba_tran_t *, struct scsi_device *);
198 static int	mrsas_tran_bus_config(dev_info_t *, uint_t,
199 		    ddi_bus_config_op_t, void *, dev_info_t **);
200 static int	mrsas_parse_devname(char *, int *, int *);
201 static int	mrsas_config_all_devices(struct mrsas_instance *);
202 static int	mrsas_config_ld(struct mrsas_instance *, uint16_t,
203 			uint8_t, dev_info_t **);
204 static int	mrsas_name_node(dev_info_t *, char *, int);
205 static void	mrsas_issue_evt_taskq(struct mrsas_eventinfo *);
206 static void	free_additional_dma_buffer(struct mrsas_instance *);
207 static void io_timeout_checker(void *);
208 static void mrsas_fm_init(struct mrsas_instance *);
209 static void mrsas_fm_fini(struct mrsas_instance *);
210 
211 static struct mrsas_function_template mrsas_function_template_ppc = {
212 	.read_fw_status_reg = read_fw_status_reg_ppc,
213 	.issue_cmd = issue_cmd_ppc,
214 	.issue_cmd_in_sync_mode = issue_cmd_in_sync_mode_ppc,
215 	.issue_cmd_in_poll_mode = issue_cmd_in_poll_mode_ppc,
216 	.enable_intr = enable_intr_ppc,
217 	.disable_intr = disable_intr_ppc,
218 	.intr_ack = intr_ack_ppc,
219 	.init_adapter = mrsas_init_adapter_ppc
220 };
221 
222 
223 static struct mrsas_function_template mrsas_function_template_fusion = {
224 	.read_fw_status_reg = tbolt_read_fw_status_reg,
225 	.issue_cmd = tbolt_issue_cmd,
226 	.issue_cmd_in_sync_mode = tbolt_issue_cmd_in_sync_mode,
227 	.issue_cmd_in_poll_mode = tbolt_issue_cmd_in_poll_mode,
228 	.enable_intr = tbolt_enable_intr,
229 	.disable_intr = tbolt_disable_intr,
230 	.intr_ack = tbolt_intr_ack,
231 	.init_adapter = mrsas_init_adapter_tbolt
232 };
233 
234 
235 ddi_dma_attr_t mrsas_generic_dma_attr = {
236 	DMA_ATTR_V0,		/* dma_attr_version */
237 	0,			/* low DMA address range */
238 	0xFFFFFFFFU,		/* high DMA address range */
239 	0xFFFFFFFFU,		/* DMA counter register	 */
240 	8,			/* DMA address alignment */
241 	0x07,			/* DMA burstsizes  */
242 	1,			/* min DMA size */
243 	0xFFFFFFFFU,		/* max DMA size */
244 	0xFFFFFFFFU,		/* segment boundary */
245 	MRSAS_MAX_SGE_CNT,	/* dma_attr_sglen */
246 	512,			/* granularity of device */
247 	0			/* bus specific DMA flags */
248 };
249 
250 int32_t mrsas_max_cap_maxxfer = 0x1000000;
251 
252 /*
253  * Fix for: Thunderbolt controller IO timeout when IO write size is 1MEG,
254  * Limit size to 256K
255  */
256 uint32_t mrsas_tbolt_max_cap_maxxfer = (512 * 512);
257 
258 /*
259  * cb_ops contains base level routines
260  */
261 static struct cb_ops mrsas_cb_ops = {
262 	mrsas_open,		/* open */
263 	mrsas_close,		/* close */
264 	nodev,			/* strategy */
265 	nodev,			/* print */
266 	nodev,			/* dump */
267 	nodev,			/* read */
268 	nodev,			/* write */
269 	mrsas_ioctl,		/* ioctl */
270 	nodev,			/* devmap */
271 	nodev,			/* mmap */
272 	nodev,			/* segmap */
273 	nochpoll,		/* poll */
274 	nodev,			/* cb_prop_op */
275 	0,			/* streamtab  */
276 	D_NEW | D_HOTPLUG,	/* cb_flag */
277 	CB_REV,			/* cb_rev */
278 	nodev,			/* cb_aread */
279 	nodev			/* cb_awrite */
280 };
281 
282 /*
283  * dev_ops contains configuration routines
284  */
285 static struct dev_ops mrsas_ops = {
286 	DEVO_REV,		/* rev, */
287 	0,			/* refcnt */
288 	mrsas_getinfo,		/* getinfo */
289 	nulldev,		/* identify */
290 	nulldev,		/* probe */
291 	mrsas_attach,		/* attach */
292 	mrsas_detach,		/* detach */
293 #ifdef	__sparc
294 	mrsas_reset,		/* reset */
295 #else	/* __sparc */
296 	nodev,
297 #endif	/* __sparc */
298 	&mrsas_cb_ops,		/* char/block ops */
299 	NULL,			/* bus ops */
300 	NULL,			/* power */
301 #ifdef __sparc
302 	ddi_quiesce_not_needed
303 #else	/* __sparc */
304 	mrsas_quiesce	/* quiesce */
305 #endif	/* __sparc */
306 };
307 
308 static struct modldrv modldrv = {
309 	&mod_driverops,		/* module type - driver */
310 	MRSAS_VERSION,
311 	&mrsas_ops,		/* driver ops */
312 };
313 
314 static struct modlinkage modlinkage = {
315 	MODREV_1,	/* ml_rev - must be MODREV_1 */
316 	&modldrv,	/* ml_linkage */
317 	NULL		/* end of driver linkage */
318 };
319 
320 static struct ddi_device_acc_attr endian_attr = {
321 	DDI_DEVICE_ATTR_V1,
322 	DDI_STRUCTURE_LE_ACC,
323 	DDI_STRICTORDER_ACC,
324 	DDI_DEFAULT_ACC
325 };
326 
327 /* Use the LSI Fast Path for the 2208 (tbolt) commands. */
328 unsigned int enable_fp = 1;
329 
330 
331 /*
332  * ************************************************************************** *
333  *									      *
334  *	   common entry points - for loadable kernel modules		      *
335  *									      *
336  * ************************************************************************** *
337  */
338 
339 /*
340  * _init - initialize a loadable module
341  * @void
342  *
343  * The driver should perform any one-time resource allocation or data
344  * initialization during driver loading in _init(). For example, the driver
345  * should initialize any mutexes global to the driver in this routine.
346  * The driver should not, however, use _init() to allocate or initialize
347  * anything that has to do with a particular instance of the device.
348  * Per-instance initialization must be done in attach().
349  */
350 int
_init(void)351 _init(void)
352 {
353 	int ret;
354 
355 	con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
356 
357 	ret = ddi_soft_state_init(&mrsas_state,
358 	    sizeof (struct mrsas_instance), 0);
359 
360 	if (ret != DDI_SUCCESS) {
361 		cmn_err(CE_WARN, "mr_sas: could not init state");
362 		return (ret);
363 	}
364 
365 	if ((ret = scsi_hba_init(&modlinkage)) != DDI_SUCCESS) {
366 		cmn_err(CE_WARN, "mr_sas: could not init scsi hba");
367 		ddi_soft_state_fini(&mrsas_state);
368 		return (ret);
369 	}
370 
371 	ret = mod_install(&modlinkage);
372 
373 	if (ret != DDI_SUCCESS) {
374 		cmn_err(CE_WARN, "mr_sas: mod_install failed");
375 		scsi_hba_fini(&modlinkage);
376 		ddi_soft_state_fini(&mrsas_state);
377 	}
378 
379 	return (ret);
380 }
381 
382 /*
383  * _info - returns information about a loadable module.
384  * @void
385  *
386  * _info() is called to return module information. This is a typical entry
387  * point that does predefined role. It simply calls mod_info().
388  */
389 int
_info(struct modinfo * modinfop)390 _info(struct modinfo *modinfop)
391 {
392 	con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
393 
394 	return (mod_info(&modlinkage, modinfop));
395 }
396 
397 /*
398  * _fini - prepare a loadable module for unloading
399  * @void
400  *
401  * In _fini(), the driver should release any resources that were allocated in
402  * _init(). The driver must remove itself from the system module list.
403  */
404 int
_fini(void)405 _fini(void)
406 {
407 	int ret;
408 
409 	con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
410 
411 	if ((ret = mod_remove(&modlinkage)) != DDI_SUCCESS) {
412 		con_log(CL_ANN1,
413 		    (CE_WARN, "_fini: mod_remove() failed, error 0x%X", ret));
414 		return (ret);
415 	}
416 
417 	scsi_hba_fini(&modlinkage);
418 	con_log(CL_DLEVEL1, (CE_NOTE, "_fini: scsi_hba_fini() done."));
419 
420 	ddi_soft_state_fini(&mrsas_state);
421 	con_log(CL_DLEVEL1, (CE_NOTE, "_fini: ddi_soft_state_fini() done."));
422 
423 	return (ret);
424 }
425 
426 
427 /*
428  * ************************************************************************** *
429  *									      *
430  *		 common entry points - for autoconfiguration		      *
431  *									      *
432  * ************************************************************************** *
433  */
434 /*
435  * attach - adds a device to the system as part of initialization
436  * @dip:
437  * @cmd:
438  *
439  * The kernel calls a driver's attach() entry point to attach an instance of
440  * a device (for MegaRAID, it is instance of a controller) or to resume
441  * operation for an instance of a device that has been suspended or has been
442  * shut down by the power management framework
443  * The attach() entry point typically includes the following types of
444  * processing:
445  * - allocate a soft-state structure for the device instance (for MegaRAID,
446  *   controller instance)
447  * - initialize per-instance mutexes
448  * - initialize condition variables
449  * - register the device's interrupts (for MegaRAID, controller's interrupts)
450  * - map the registers and memory of the device instance (for MegaRAID,
451  *   controller instance)
452  * - create minor device nodes for the device instance (for MegaRAID,
453  *   controller instance)
454  * - report that the device instance (for MegaRAID, controller instance) has
455  *   attached
456  */
457 static int
mrsas_attach(dev_info_t * dip,ddi_attach_cmd_t cmd)458 mrsas_attach(dev_info_t *dip, ddi_attach_cmd_t cmd)
459 {
460 	int		instance_no;
461 	int		nregs;
462 	int		i = 0;
463 	uint8_t		irq;
464 	uint16_t	vendor_id;
465 	uint16_t	device_id;
466 	uint16_t	subsysvid;
467 	uint16_t	subsysid;
468 	uint16_t	command;
469 	off_t		reglength = 0;
470 	int		intr_types = 0;
471 	char		*data;
472 
473 	scsi_hba_tran_t		*tran;
474 	ddi_dma_attr_t	tran_dma_attr;
475 	struct mrsas_instance	*instance;
476 
477 	con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
478 
479 	/* CONSTCOND */
480 	ASSERT(NO_COMPETING_THREADS);
481 
482 	instance_no = ddi_get_instance(dip);
483 
484 	/*
485 	 * check to see whether this device is in a DMA-capable slot.
486 	 */
487 	if (ddi_slaveonly(dip) == DDI_SUCCESS) {
488 		dev_err(dip, CE_WARN, "Device in slave-only slot, unused");
489 		return (DDI_FAILURE);
490 	}
491 
492 	switch (cmd) {
493 	case DDI_ATTACH:
494 		/* allocate the soft state for the instance */
495 		if (ddi_soft_state_zalloc(mrsas_state, instance_no)
496 		    != DDI_SUCCESS) {
497 			dev_err(dip, CE_WARN, "Failed to allocate soft state");
498 			return (DDI_FAILURE);
499 		}
500 
501 		instance = (struct mrsas_instance *)ddi_get_soft_state
502 		    (mrsas_state, instance_no);
503 
504 		if (instance == NULL) {
505 			dev_err(dip, CE_WARN, "Bad soft state");
506 			ddi_soft_state_free(mrsas_state, instance_no);
507 			return (DDI_FAILURE);
508 		}
509 
510 		instance->unroll.softs	= 1;
511 
512 		/* Setup the PCI configuration space handles */
513 		if (pci_config_setup(dip, &instance->pci_handle) !=
514 		    DDI_SUCCESS) {
515 			dev_err(dip, CE_WARN, "pci config setup failed");
516 
517 			ddi_soft_state_free(mrsas_state, instance_no);
518 			return (DDI_FAILURE);
519 		}
520 
521 		if (ddi_dev_nregs(dip, &nregs) != DDI_SUCCESS) {
522 			dev_err(dip, CE_WARN, "Failed to get registers");
523 
524 			pci_config_teardown(&instance->pci_handle);
525 			ddi_soft_state_free(mrsas_state, instance_no);
526 			return (DDI_FAILURE);
527 		}
528 
529 		vendor_id = pci_config_get16(instance->pci_handle,
530 		    PCI_CONF_VENID);
531 		device_id = pci_config_get16(instance->pci_handle,
532 		    PCI_CONF_DEVID);
533 
534 		subsysvid = pci_config_get16(instance->pci_handle,
535 		    PCI_CONF_SUBVENID);
536 		subsysid = pci_config_get16(instance->pci_handle,
537 		    PCI_CONF_SUBSYSID);
538 
539 		pci_config_put16(instance->pci_handle, PCI_CONF_COMM,
540 		    (pci_config_get16(instance->pci_handle,
541 		    PCI_CONF_COMM) | PCI_COMM_ME));
542 		irq = pci_config_get8(instance->pci_handle,
543 		    PCI_CONF_ILINE);
544 
545 		dev_err(dip, CE_CONT,
546 		    "?0x%x:0x%x 0x%x:0x%x, irq:%d drv-ver:%s\n",
547 		    vendor_id, device_id, subsysvid,
548 		    subsysid, irq, MRSAS_VERSION);
549 
550 		/* enable bus-mastering */
551 		command = pci_config_get16(instance->pci_handle,
552 		    PCI_CONF_COMM);
553 
554 		if (!(command & PCI_COMM_ME)) {
555 			command |= PCI_COMM_ME;
556 
557 			pci_config_put16(instance->pci_handle,
558 			    PCI_CONF_COMM, command);
559 
560 			con_log(CL_ANN, (CE_CONT, "mr_sas%d: "
561 			    "enable bus-mastering", instance_no));
562 		} else {
563 			con_log(CL_DLEVEL1, (CE_CONT, "mr_sas%d: "
564 			    "bus-mastering already set", instance_no));
565 		}
566 
567 		/* initialize function pointers */
568 		switch (device_id) {
569 		case PCI_DEVICE_ID_LSI_INVADER:
570 		case PCI_DEVICE_ID_LSI_FURY:
571 		case PCI_DEVICE_ID_LSI_INTRUDER:
572 		case PCI_DEVICE_ID_LSI_INTRUDER_24:
573 		case PCI_DEVICE_ID_LSI_CUTLASS_52:
574 		case PCI_DEVICE_ID_LSI_CUTLASS_53:
575 			dev_err(dip, CE_CONT, "?Gen3 device detected\n");
576 			instance->gen3 = 1;
577 			/* FALLTHROUGH */
578 		case PCI_DEVICE_ID_LSI_TBOLT:
579 			dev_err(dip, CE_CONT, "?TBOLT device detected\n");
580 
581 			instance->func_ptr =
582 			    &mrsas_function_template_fusion;
583 			instance->tbolt = 1;
584 			break;
585 
586 		case PCI_DEVICE_ID_LSI_SKINNY:
587 		case PCI_DEVICE_ID_LSI_SKINNY_NEW:
588 			/*
589 			 * FALLTHRU to PPC-style functions, but mark this
590 			 * instance as Skinny, because the register set is
591 			 * slightly different (See WR_IB_PICK_QPORT), and
592 			 * certain other features are available to a Skinny
593 			 * HBA.
594 			 */
595 			dev_err(dip, CE_CONT, "?Skinny device detected\n");
596 			instance->skinny = 1;
597 			/* FALLTHRU */
598 
599 		case PCI_DEVICE_ID_LSI_2108VDE:
600 		case PCI_DEVICE_ID_LSI_2108V:
601 			dev_err(dip, CE_CONT,
602 			    "?2108 Liberator device detected\n");
603 
604 			instance->func_ptr =
605 			    &mrsas_function_template_ppc;
606 			break;
607 
608 		default:
609 			dev_err(dip, CE_WARN, "Invalid device detected");
610 
611 			pci_config_teardown(&instance->pci_handle);
612 			ddi_soft_state_free(mrsas_state, instance_no);
613 			return (DDI_FAILURE);
614 		}
615 
616 		instance->baseaddress = pci_config_get32(
617 		    instance->pci_handle, PCI_CONF_BASE0);
618 		instance->baseaddress &= 0x0fffc;
619 
620 		instance->dip		= dip;
621 		instance->vendor_id	= vendor_id;
622 		instance->device_id	= device_id;
623 		instance->subsysvid	= subsysvid;
624 		instance->subsysid	= subsysid;
625 		instance->instance	= instance_no;
626 
627 		/* Initialize FMA */
628 		instance->fm_capabilities = ddi_prop_get_int(
629 		    DDI_DEV_T_ANY, instance->dip, DDI_PROP_DONTPASS,
630 		    "fm-capable", DDI_FM_EREPORT_CAPABLE |
631 		    DDI_FM_ACCCHK_CAPABLE | DDI_FM_DMACHK_CAPABLE
632 		    | DDI_FM_ERRCB_CAPABLE);
633 
634 		mrsas_fm_init(instance);
635 
636 		/* Setup register map */
637 		if ((ddi_dev_regsize(instance->dip,
638 		    REGISTER_SET_IO_2108, &reglength) != DDI_SUCCESS) ||
639 		    reglength < MINIMUM_MFI_MEM_SZ) {
640 			goto fail_attach;
641 		}
642 		if (reglength > DEFAULT_MFI_MEM_SZ) {
643 			reglength = DEFAULT_MFI_MEM_SZ;
644 			con_log(CL_DLEVEL1, (CE_NOTE,
645 			    "mr_sas: register length to map is 0x%lx bytes",
646 			    reglength));
647 		}
648 		if (ddi_regs_map_setup(instance->dip,
649 		    REGISTER_SET_IO_2108, &instance->regmap, 0,
650 		    reglength, &endian_attr, &instance->regmap_handle)
651 		    != DDI_SUCCESS) {
652 			dev_err(dip, CE_WARN, "couldn't map control registers");
653 			goto fail_attach;
654 		}
655 
656 		instance->unroll.regs = 1;
657 
658 		/*
659 		 * Disable Interrupt Now.
660 		 * Setup Software interrupt
661 		 */
662 		instance->func_ptr->disable_intr(instance);
663 
664 		if (ddi_prop_lookup_string(DDI_DEV_T_ANY, dip, 0,
665 		    "mrsas-enable-msi", &data) == DDI_SUCCESS) {
666 			if (strncmp(data, "no", 3) == 0) {
667 				msi_enable = 0;
668 				con_log(CL_ANN1, (CE_WARN,
669 				    "msi_enable = %d disabled", msi_enable));
670 			}
671 			ddi_prop_free(data);
672 		}
673 
674 		dev_err(dip, CE_CONT, "?msi_enable = %d\n", msi_enable);
675 
676 		if (ddi_prop_lookup_string(DDI_DEV_T_ANY, dip, 0,
677 		    "mrsas-enable-fp", &data) == DDI_SUCCESS) {
678 			if (strncmp(data, "no", 3) == 0) {
679 				enable_fp = 0;
680 				dev_err(dip, CE_NOTE,
681 				    "enable_fp = %d, Fast-Path disabled.\n",
682 				    enable_fp);
683 			}
684 
685 			ddi_prop_free(data);
686 		}
687 
688 		dev_err(dip, CE_CONT, "?enable_fp = %d\n", enable_fp);
689 
690 		/* Check for all supported interrupt types */
691 		if (ddi_intr_get_supported_types(
692 		    dip, &intr_types) != DDI_SUCCESS) {
693 			dev_err(dip, CE_WARN,
694 			    "ddi_intr_get_supported_types() failed");
695 			goto fail_attach;
696 		}
697 
698 		con_log(CL_DLEVEL1, (CE_NOTE,
699 		    "ddi_intr_get_supported_types() ret: 0x%x", intr_types));
700 
701 		/* Initialize and Setup Interrupt handler */
702 		if (msi_enable && (intr_types & DDI_INTR_TYPE_MSIX)) {
703 			if (mrsas_add_intrs(instance, DDI_INTR_TYPE_MSIX) !=
704 			    DDI_SUCCESS) {
705 				dev_err(dip, CE_WARN,
706 				    "MSIX interrupt query failed");
707 				goto fail_attach;
708 			}
709 			instance->intr_type = DDI_INTR_TYPE_MSIX;
710 		} else if (msi_enable && (intr_types & DDI_INTR_TYPE_MSI)) {
711 			if (mrsas_add_intrs(instance, DDI_INTR_TYPE_MSI) !=
712 			    DDI_SUCCESS) {
713 				dev_err(dip, CE_WARN,
714 				    "MSI interrupt query failed");
715 				goto fail_attach;
716 			}
717 			instance->intr_type = DDI_INTR_TYPE_MSI;
718 		} else if (intr_types & DDI_INTR_TYPE_FIXED) {
719 			msi_enable = 0;
720 			if (mrsas_add_intrs(instance, DDI_INTR_TYPE_FIXED) !=
721 			    DDI_SUCCESS) {
722 				dev_err(dip, CE_WARN,
723 				    "FIXED interrupt query failed");
724 				goto fail_attach;
725 			}
726 			instance->intr_type = DDI_INTR_TYPE_FIXED;
727 		} else {
728 			dev_err(dip, CE_WARN, "Device cannot "
729 			    "suppport either FIXED or MSI/X "
730 			    "interrupts");
731 			goto fail_attach;
732 		}
733 
734 		instance->unroll.intr = 1;
735 
736 		if (ddi_prop_lookup_string(DDI_DEV_T_ANY, dip, 0,
737 		    "mrsas-enable-ctio", &data) == DDI_SUCCESS) {
738 			if (strncmp(data, "no", 3) == 0) {
739 				ctio_enable = 0;
740 				con_log(CL_ANN1, (CE_WARN,
741 				    "ctio_enable = %d disabled", ctio_enable));
742 			}
743 			ddi_prop_free(data);
744 		}
745 
746 		dev_err(dip, CE_CONT, "?ctio_enable = %d\n", ctio_enable);
747 
748 		/* setup the mfi based low level driver */
749 		if (mrsas_init_adapter(instance) != DDI_SUCCESS) {
750 			dev_err(dip, CE_WARN,
751 			    "could not initialize the low level driver");
752 
753 			goto fail_attach;
754 		}
755 
756 		/* Initialize all Mutex */
757 		INIT_LIST_HEAD(&instance->completed_pool_list);
758 		mutex_init(&instance->completed_pool_mtx, NULL,
759 		    MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
760 
761 		mutex_init(&instance->sync_map_mtx, NULL,
762 		    MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
763 
764 		mutex_init(&instance->app_cmd_pool_mtx, NULL,
765 		    MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
766 
767 		mutex_init(&instance->config_dev_mtx, NULL,
768 		    MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
769 
770 		mutex_init(&instance->cmd_pend_mtx, NULL,
771 		    MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
772 
773 		mutex_init(&instance->ocr_flags_mtx, NULL,
774 		    MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
775 
776 		mutex_init(&instance->int_cmd_mtx, NULL,
777 		    MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
778 		cv_init(&instance->int_cmd_cv, NULL, CV_DRIVER, NULL);
779 
780 		mutex_init(&instance->cmd_pool_mtx, NULL,
781 		    MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
782 
783 		mutex_init(&instance->reg_write_mtx, NULL,
784 		    MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
785 
786 		if (instance->tbolt) {
787 			mutex_init(&instance->cmd_app_pool_mtx, NULL,
788 			    MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
789 
790 			mutex_init(&instance->chip_mtx, NULL,
791 			    MUTEX_DRIVER, DDI_INTR_PRI(instance->intr_pri));
792 
793 		}
794 
795 		instance->unroll.mutexs = 1;
796 
797 		instance->timeout_id = (timeout_id_t)-1;
798 
799 		/* Register our soft-isr for highlevel interrupts. */
800 		instance->isr_level = instance->intr_pri;
801 		if (!(instance->tbolt)) {
802 			if (instance->isr_level == HIGH_LEVEL_INTR) {
803 				if (ddi_add_softintr(dip,
804 				    DDI_SOFTINT_HIGH,
805 				    &instance->soft_intr_id, NULL, NULL,
806 				    mrsas_softintr, (caddr_t)instance) !=
807 				    DDI_SUCCESS) {
808 					dev_err(dip, CE_WARN,
809 					    "Software ISR did not register");
810 
811 					goto fail_attach;
812 				}
813 
814 				instance->unroll.soft_isr = 1;
815 
816 			}
817 		}
818 
819 		instance->softint_running = 0;
820 
821 		/* Allocate a transport structure */
822 		tran = scsi_hba_tran_alloc(dip, SCSI_HBA_CANSLEEP);
823 
824 		if (tran == NULL) {
825 			dev_err(dip, CE_WARN,
826 			    "scsi_hba_tran_alloc failed");
827 			goto fail_attach;
828 		}
829 
830 		instance->tran = tran;
831 		instance->unroll.tran = 1;
832 
833 		tran->tran_hba_private	= instance;
834 		tran->tran_tgt_init	= mrsas_tran_tgt_init;
835 		tran->tran_tgt_probe	= scsi_hba_probe;
836 		tran->tran_tgt_free	= mrsas_tran_tgt_free;
837 		tran->tran_init_pkt	= mrsas_tran_init_pkt;
838 		if (instance->tbolt)
839 			tran->tran_start = mrsas_tbolt_tran_start;
840 		else
841 			tran->tran_start = mrsas_tran_start;
842 		tran->tran_abort	= mrsas_tran_abort;
843 		tran->tran_reset	= mrsas_tran_reset;
844 		tran->tran_getcap	= mrsas_tran_getcap;
845 		tran->tran_setcap	= mrsas_tran_setcap;
846 		tran->tran_destroy_pkt	= mrsas_tran_destroy_pkt;
847 		tran->tran_dmafree	= mrsas_tran_dmafree;
848 		tran->tran_sync_pkt	= mrsas_tran_sync_pkt;
849 		tran->tran_quiesce	= mrsas_tran_quiesce;
850 		tran->tran_unquiesce	= mrsas_tran_unquiesce;
851 		tran->tran_bus_config	= mrsas_tran_bus_config;
852 
853 		if (mrsas_relaxed_ordering)
854 			mrsas_generic_dma_attr.dma_attr_flags |=
855 			    DDI_DMA_RELAXED_ORDERING;
856 
857 
858 		tran_dma_attr = mrsas_generic_dma_attr;
859 		tran_dma_attr.dma_attr_sgllen = instance->max_num_sge;
860 
861 		/* Attach this instance of the hba */
862 		if (scsi_hba_attach_setup(dip, &tran_dma_attr, tran, 0)
863 		    != DDI_SUCCESS) {
864 			dev_err(dip, CE_WARN,
865 			    "scsi_hba_attach failed");
866 
867 			goto fail_attach;
868 		}
869 		instance->unroll.tranSetup = 1;
870 		con_log(CL_ANN1,
871 		    (CE_CONT, "scsi_hba_attach_setup()	done."));
872 
873 		/* create devctl node for cfgadm command */
874 		if (ddi_create_minor_node(dip, "devctl",
875 		    S_IFCHR, INST2DEVCTL(instance_no),
876 		    DDI_NT_SCSI_NEXUS, 0) == DDI_FAILURE) {
877 			dev_err(dip, CE_WARN, "failed to create devctl node.");
878 
879 			goto fail_attach;
880 		}
881 
882 		instance->unroll.devctl = 1;
883 
884 		/* create scsi node for cfgadm command */
885 		if (ddi_create_minor_node(dip, "scsi", S_IFCHR,
886 		    INST2SCSI(instance_no), DDI_NT_SCSI_ATTACHMENT_POINT, 0) ==
887 		    DDI_FAILURE) {
888 			dev_err(dip, CE_WARN, "failed to create scsi node.");
889 
890 			goto fail_attach;
891 		}
892 
893 		instance->unroll.scsictl = 1;
894 
895 		(void) snprintf(instance->iocnode, sizeof (instance->iocnode),
896 		    "%d:lsirdctl", instance_no);
897 
898 		/*
899 		 * Create a node for applications
900 		 * for issuing ioctl to the driver.
901 		 */
902 		if (ddi_create_minor_node(dip, instance->iocnode,
903 		    S_IFCHR, INST2LSIRDCTL(instance_no), DDI_PSEUDO, 0) ==
904 		    DDI_FAILURE) {
905 			dev_err(dip, CE_WARN, "failed to create ioctl node.");
906 
907 			goto fail_attach;
908 		}
909 
910 		instance->unroll.ioctl = 1;
911 
912 		/* Create a taskq to handle dr events */
913 		if ((instance->taskq = ddi_taskq_create(dip,
914 		    "mrsas_dr_taskq", 1, TASKQ_DEFAULTPRI, 0)) == NULL) {
915 			dev_err(dip, CE_WARN, "failed to create taskq.");
916 			instance->taskq = NULL;
917 			goto fail_attach;
918 		}
919 		instance->unroll.taskq = 1;
920 		con_log(CL_ANN1, (CE_CONT, "ddi_taskq_create() done."));
921 
922 		/* enable interrupt */
923 		instance->func_ptr->enable_intr(instance);
924 
925 		/* initiate AEN */
926 		if (start_mfi_aen(instance)) {
927 			dev_err(dip, CE_WARN, "failed to initiate AEN.");
928 			goto fail_attach;
929 		}
930 		instance->unroll.aenPend = 1;
931 		con_log(CL_ANN1,
932 		    (CE_CONT, "AEN started for instance %d.", instance_no));
933 
934 		/* Finally! We are on the air.	*/
935 		ddi_report_dev(dip);
936 
937 		/* FMA handle checking. */
938 		if (mrsas_check_acc_handle(instance->regmap_handle) !=
939 		    DDI_SUCCESS) {
940 			goto fail_attach;
941 		}
942 		if (mrsas_check_acc_handle(instance->pci_handle) !=
943 		    DDI_SUCCESS) {
944 			goto fail_attach;
945 		}
946 
947 		instance->mr_ld_list =
948 		    kmem_zalloc(MRDRV_MAX_LD * sizeof (struct mrsas_ld),
949 		    KM_SLEEP);
950 		instance->unroll.ldlist_buff = 1;
951 
952 		if (instance->tbolt || instance->skinny) {
953 			instance->mr_tbolt_pd_max = MRSAS_TBOLT_PD_TGT_MAX;
954 			instance->mr_tbolt_pd_list =
955 			    kmem_zalloc(MRSAS_TBOLT_GET_PD_MAX(instance) *
956 			    sizeof (struct mrsas_tbolt_pd), KM_SLEEP);
957 			ASSERT(instance->mr_tbolt_pd_list);
958 			for (i = 0; i < instance->mr_tbolt_pd_max; i++) {
959 				instance->mr_tbolt_pd_list[i].lun_type =
960 				    MRSAS_TBOLT_PD_LUN;
961 				instance->mr_tbolt_pd_list[i].dev_id =
962 				    (uint8_t)i;
963 			}
964 
965 			instance->unroll.pdlist_buff = 1;
966 		}
967 		break;
968 	case DDI_PM_RESUME:
969 		con_log(CL_ANN, (CE_NOTE, "mr_sas: DDI_PM_RESUME"));
970 		break;
971 	case DDI_RESUME:
972 		con_log(CL_ANN, (CE_NOTE, "mr_sas: DDI_RESUME"));
973 		break;
974 	default:
975 		con_log(CL_ANN,
976 		    (CE_WARN, "mr_sas: invalid attach cmd=%x", cmd));
977 		return (DDI_FAILURE);
978 	}
979 
980 
981 	con_log(CL_DLEVEL1,
982 	    (CE_NOTE, "mrsas_attach() return SUCCESS instance_num %d",
983 	    instance_no));
984 	return (DDI_SUCCESS);
985 
986 fail_attach:
987 
988 	mrsas_undo_resources(dip, instance);
989 
990 	mrsas_fm_ereport(instance, DDI_FM_DEVICE_NO_RESPONSE);
991 	ddi_fm_service_impact(instance->dip, DDI_SERVICE_LOST);
992 
993 	mrsas_fm_fini(instance);
994 
995 	pci_config_teardown(&instance->pci_handle);
996 	ddi_soft_state_free(mrsas_state, instance_no);
997 
998 	return (DDI_FAILURE);
999 }
1000 
1001 /*
1002  * getinfo - gets device information
1003  * @dip:
1004  * @cmd:
1005  * @arg:
1006  * @resultp:
1007  *
1008  * The system calls getinfo() to obtain configuration information that only
1009  * the driver knows. The mapping of minor numbers to device instance is
1010  * entirely under the control of the driver. The system sometimes needs to ask
1011  * the driver which device a particular dev_t represents.
1012  * Given the device number return the devinfo pointer from the scsi_device
1013  * structure.
1014  */
1015 /*ARGSUSED*/
1016 static int
mrsas_getinfo(dev_info_t * dip,ddi_info_cmd_t cmd,void * arg,void ** resultp)1017 mrsas_getinfo(dev_info_t *dip, ddi_info_cmd_t cmd,  void *arg, void **resultp)
1018 {
1019 	int	rval;
1020 	int	mrsas_minor = getminor((dev_t)arg);
1021 
1022 	struct mrsas_instance	*instance;
1023 
1024 	con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1025 
1026 	switch (cmd) {
1027 		case DDI_INFO_DEVT2DEVINFO:
1028 			instance = (struct mrsas_instance *)
1029 			    ddi_get_soft_state(mrsas_state,
1030 			    MINOR2INST(mrsas_minor));
1031 
1032 			if (instance == NULL) {
1033 				*resultp = NULL;
1034 				rval = DDI_FAILURE;
1035 			} else {
1036 				*resultp = instance->dip;
1037 				rval = DDI_SUCCESS;
1038 			}
1039 			break;
1040 		case DDI_INFO_DEVT2INSTANCE:
1041 			*resultp = (void *)(intptr_t)
1042 			    (MINOR2INST(getminor((dev_t)arg)));
1043 			rval = DDI_SUCCESS;
1044 			break;
1045 		default:
1046 			*resultp = NULL;
1047 			rval = DDI_FAILURE;
1048 	}
1049 
1050 	return (rval);
1051 }
1052 
1053 /*
1054  * detach - detaches a device from the system
1055  * @dip: pointer to the device's dev_info structure
1056  * @cmd: type of detach
1057  *
1058  * A driver's detach() entry point is called to detach an instance of a device
1059  * that is bound to the driver. The entry point is called with the instance of
1060  * the device node to be detached and with DDI_DETACH, which is specified as
1061  * the cmd argument to the entry point.
1062  * This routine is called during driver unload. We free all the allocated
1063  * resources and call the corresponding LLD so that it can also release all
1064  * its resources.
1065  */
1066 static int
mrsas_detach(dev_info_t * dip,ddi_detach_cmd_t cmd)1067 mrsas_detach(dev_info_t *dip, ddi_detach_cmd_t cmd)
1068 {
1069 	int	instance_no;
1070 
1071 	struct mrsas_instance	*instance;
1072 
1073 	con_log(CL_ANN, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1074 
1075 
1076 	/* CONSTCOND */
1077 	ASSERT(NO_COMPETING_THREADS);
1078 
1079 	instance_no = ddi_get_instance(dip);
1080 
1081 	instance = (struct mrsas_instance *)ddi_get_soft_state(mrsas_state,
1082 	    instance_no);
1083 
1084 	if (!instance) {
1085 		dev_err(dip, CE_WARN, "could not get instance in detach");
1086 
1087 		return (DDI_FAILURE);
1088 	}
1089 
1090 	switch (cmd) {
1091 		case DDI_DETACH:
1092 			con_log(CL_ANN, (CE_NOTE,
1093 			    "mrsas_detach: DDI_DETACH"));
1094 
1095 			mutex_enter(&instance->config_dev_mtx);
1096 			if (instance->timeout_id != (timeout_id_t)-1) {
1097 				mutex_exit(&instance->config_dev_mtx);
1098 				(void) untimeout(instance->timeout_id);
1099 				instance->timeout_id = (timeout_id_t)-1;
1100 				mutex_enter(&instance->config_dev_mtx);
1101 				instance->unroll.timer = 0;
1102 			}
1103 			mutex_exit(&instance->config_dev_mtx);
1104 
1105 			if (instance->unroll.tranSetup == 1) {
1106 				if (scsi_hba_detach(dip) != DDI_SUCCESS) {
1107 					dev_err(dip, CE_WARN,
1108 					    "failed to detach");
1109 					return (DDI_FAILURE);
1110 				}
1111 				instance->unroll.tranSetup = 0;
1112 				con_log(CL_ANN1,
1113 				    (CE_CONT, "scsi_hba_dettach()  done."));
1114 			}
1115 
1116 			flush_cache(instance);
1117 
1118 			mrsas_undo_resources(dip, instance);
1119 
1120 			mrsas_fm_fini(instance);
1121 
1122 			pci_config_teardown(&instance->pci_handle);
1123 			ddi_soft_state_free(mrsas_state, instance_no);
1124 			break;
1125 
1126 		case DDI_PM_SUSPEND:
1127 			con_log(CL_ANN, (CE_NOTE,
1128 			    "mrsas_detach: DDI_PM_SUSPEND"));
1129 
1130 			break;
1131 		case DDI_SUSPEND:
1132 			con_log(CL_ANN, (CE_NOTE,
1133 			    "mrsas_detach: DDI_SUSPEND"));
1134 
1135 			break;
1136 		default:
1137 			con_log(CL_ANN, (CE_WARN,
1138 			    "invalid detach command:0x%x", cmd));
1139 			return (DDI_FAILURE);
1140 	}
1141 
1142 	return (DDI_SUCCESS);
1143 }
1144 
1145 
1146 static void
mrsas_undo_resources(dev_info_t * dip,struct mrsas_instance * instance)1147 mrsas_undo_resources(dev_info_t *dip, struct mrsas_instance *instance)
1148 {
1149 	con_log(CL_ANN, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1150 
1151 	if (instance->unroll.ioctl == 1) {
1152 		ddi_remove_minor_node(dip, instance->iocnode);
1153 		instance->unroll.ioctl = 0;
1154 	}
1155 
1156 	if (instance->unroll.scsictl == 1) {
1157 		ddi_remove_minor_node(dip, "scsi");
1158 		instance->unroll.scsictl = 0;
1159 	}
1160 
1161 	if (instance->unroll.devctl == 1) {
1162 		ddi_remove_minor_node(dip, "devctl");
1163 		instance->unroll.devctl = 0;
1164 	}
1165 
1166 	if (instance->unroll.tranSetup == 1) {
1167 		if (scsi_hba_detach(dip) != DDI_SUCCESS) {
1168 			dev_err(dip, CE_WARN, "failed to detach");
1169 			return;	 /* DDI_FAILURE */
1170 		}
1171 		instance->unroll.tranSetup = 0;
1172 		con_log(CL_ANN1, (CE_CONT, "scsi_hba_dettach()	done."));
1173 	}
1174 
1175 	if (instance->unroll.tran == 1)	 {
1176 		scsi_hba_tran_free(instance->tran);
1177 		instance->unroll.tran = 0;
1178 		con_log(CL_ANN1, (CE_CONT, "scsi_hba_tran_free()  done."));
1179 	}
1180 
1181 	if (instance->unroll.syncCmd == 1) {
1182 		if (instance->tbolt) {
1183 			if (abort_syncmap_cmd(instance,
1184 			    instance->map_update_cmd)) {
1185 				dev_err(dip, CE_WARN, "mrsas_detach: "
1186 				    "failed to abort previous syncmap command");
1187 			}
1188 
1189 			instance->unroll.syncCmd = 0;
1190 			con_log(CL_ANN1, (CE_CONT, "sync cmd aborted, done."));
1191 		}
1192 	}
1193 
1194 	if (instance->unroll.aenPend == 1) {
1195 		if (abort_aen_cmd(instance, instance->aen_cmd))
1196 			dev_err(dip, CE_WARN, "mrsas_detach: "
1197 			    "failed to abort prevous AEN command");
1198 
1199 		instance->unroll.aenPend = 0;
1200 		con_log(CL_ANN1, (CE_CONT, "aen cmd aborted, done."));
1201 		/* This means the controller is fully initialized and running */
1202 		/* Shutdown should be a last command to controller. */
1203 		/* shutdown_controller(); */
1204 	}
1205 
1206 
1207 	if (instance->unroll.timer == 1)	 {
1208 		if (instance->timeout_id != (timeout_id_t)-1) {
1209 			(void) untimeout(instance->timeout_id);
1210 			instance->timeout_id = (timeout_id_t)-1;
1211 
1212 			instance->unroll.timer = 0;
1213 		}
1214 	}
1215 
1216 	instance->func_ptr->disable_intr(instance);
1217 
1218 
1219 	if (instance->unroll.mutexs == 1) {
1220 		mutex_destroy(&instance->cmd_pool_mtx);
1221 		mutex_destroy(&instance->app_cmd_pool_mtx);
1222 		mutex_destroy(&instance->cmd_pend_mtx);
1223 		mutex_destroy(&instance->completed_pool_mtx);
1224 		mutex_destroy(&instance->sync_map_mtx);
1225 		mutex_destroy(&instance->int_cmd_mtx);
1226 		cv_destroy(&instance->int_cmd_cv);
1227 		mutex_destroy(&instance->config_dev_mtx);
1228 		mutex_destroy(&instance->ocr_flags_mtx);
1229 		mutex_destroy(&instance->reg_write_mtx);
1230 
1231 		if (instance->tbolt) {
1232 			mutex_destroy(&instance->cmd_app_pool_mtx);
1233 			mutex_destroy(&instance->chip_mtx);
1234 		}
1235 
1236 		instance->unroll.mutexs = 0;
1237 		con_log(CL_ANN1, (CE_CONT, "Destroy mutex & cv,	 done."));
1238 	}
1239 
1240 
1241 	if (instance->unroll.soft_isr == 1) {
1242 		ddi_remove_softintr(instance->soft_intr_id);
1243 		instance->unroll.soft_isr = 0;
1244 	}
1245 
1246 	if (instance->unroll.intr == 1) {
1247 		mrsas_rem_intrs(instance);
1248 		instance->unroll.intr = 0;
1249 	}
1250 
1251 
1252 	if (instance->unroll.taskq == 1)	 {
1253 		if (instance->taskq) {
1254 			ddi_taskq_destroy(instance->taskq);
1255 			instance->unroll.taskq = 0;
1256 		}
1257 
1258 	}
1259 
1260 	/*
1261 	 * free dma memory allocated for
1262 	 * cmds/frames/queues/driver version etc
1263 	 */
1264 	if (instance->unroll.verBuff == 1) {
1265 		(void) mrsas_free_dma_obj(instance, instance->drv_ver_dma_obj);
1266 		instance->unroll.verBuff = 0;
1267 	}
1268 
1269 	if (instance->unroll.pdlist_buff == 1)	{
1270 		if (instance->mr_tbolt_pd_list != NULL) {
1271 			kmem_free(instance->mr_tbolt_pd_list,
1272 			    MRSAS_TBOLT_GET_PD_MAX(instance) *
1273 			    sizeof (struct mrsas_tbolt_pd));
1274 		}
1275 
1276 		instance->mr_tbolt_pd_list = NULL;
1277 		instance->unroll.pdlist_buff = 0;
1278 	}
1279 
1280 	if (instance->unroll.ldlist_buff == 1)	{
1281 		if (instance->mr_ld_list != NULL) {
1282 			kmem_free(instance->mr_ld_list, MRDRV_MAX_LD
1283 			    * sizeof (struct mrsas_ld));
1284 		}
1285 
1286 		instance->mr_ld_list = NULL;
1287 		instance->unroll.ldlist_buff = 0;
1288 	}
1289 
1290 	if (instance->tbolt) {
1291 		if (instance->unroll.alloc_space_mpi2 == 1) {
1292 			free_space_for_mpi2(instance);
1293 			instance->unroll.alloc_space_mpi2 = 0;
1294 		}
1295 	} else {
1296 		if (instance->unroll.alloc_space_mfi == 1) {
1297 			free_space_for_mfi(instance);
1298 			instance->unroll.alloc_space_mfi = 0;
1299 		}
1300 	}
1301 
1302 	if (instance->unroll.regs == 1)	 {
1303 		ddi_regs_map_free(&instance->regmap_handle);
1304 		instance->unroll.regs = 0;
1305 		con_log(CL_ANN1, (CE_CONT, "ddi_regs_map_free()	 done."));
1306 	}
1307 }
1308 
1309 
1310 
1311 /*
1312  * ************************************************************************** *
1313  *									      *
1314  *	       common entry points - for character driver types		      *
1315  *									      *
1316  * ************************************************************************** *
1317  */
1318 /*
1319  * open - gets access to a device
1320  * @dev:
1321  * @openflags:
1322  * @otyp:
1323  * @credp:
1324  *
1325  * Access to a device by one or more application programs is controlled
1326  * through the open() and close() entry points. The primary function of
1327  * open() is to verify that the open request is allowed.
1328  */
1329 static	int
mrsas_open(dev_t * dev,int openflags,int otyp,cred_t * credp)1330 mrsas_open(dev_t *dev, int openflags, int otyp, cred_t *credp)
1331 {
1332 	int	rval = 0;
1333 
1334 	con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1335 
1336 	/* Check root permissions */
1337 	if (drv_priv(credp) != 0) {
1338 		con_log(CL_ANN, (CE_WARN,
1339 		    "mr_sas: Non-root ioctl access denied!"));
1340 		return (EPERM);
1341 	}
1342 
1343 	/* Verify we are being opened as a character device */
1344 	if (otyp != OTYP_CHR) {
1345 		con_log(CL_ANN, (CE_WARN,
1346 		    "mr_sas: ioctl node must be a char node"));
1347 		return (EINVAL);
1348 	}
1349 
1350 	if (ddi_get_soft_state(mrsas_state, MINOR2INST(getminor(*dev)))
1351 	    == NULL) {
1352 		return (ENXIO);
1353 	}
1354 
1355 	if (scsi_hba_open) {
1356 		rval = scsi_hba_open(dev, openflags, otyp, credp);
1357 	}
1358 
1359 	return (rval);
1360 }
1361 
1362 /*
1363  * close - gives up access to a device
1364  * @dev:
1365  * @openflags:
1366  * @otyp:
1367  * @credp:
1368  *
1369  * close() should perform any cleanup necessary to finish using the minor
1370  * device, and prepare the device (and driver) to be opened again.
1371  */
1372 static	int
mrsas_close(dev_t dev,int openflags,int otyp,cred_t * credp)1373 mrsas_close(dev_t dev, int openflags, int otyp, cred_t *credp)
1374 {
1375 	int	rval = 0;
1376 
1377 	con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1378 
1379 	/* no need for locks! */
1380 
1381 	if (scsi_hba_close) {
1382 		rval = scsi_hba_close(dev, openflags, otyp, credp);
1383 	}
1384 
1385 	return (rval);
1386 }
1387 
1388 /*
1389  * ioctl - performs a range of I/O commands for character drivers
1390  * @dev:
1391  * @cmd:
1392  * @arg:
1393  * @mode:
1394  * @credp:
1395  * @rvalp:
1396  *
1397  * ioctl() routine must make sure that user data is copied into or out of the
1398  * kernel address space explicitly using copyin(), copyout(), ddi_copyin(),
1399  * and ddi_copyout(), as appropriate.
1400  * This is a wrapper routine to serialize access to the actual ioctl routine.
1401  * ioctl() should return 0 on success, or the appropriate error number. The
1402  * driver may also set the value returned to the calling process through rvalp.
1403  */
1404 
1405 static int
mrsas_ioctl(dev_t dev,int cmd,intptr_t arg,int mode,cred_t * credp,int * rvalp)1406 mrsas_ioctl(dev_t dev, int cmd, intptr_t arg, int mode, cred_t *credp,
1407     int *rvalp)
1408 {
1409 	int	rval = 0;
1410 
1411 	struct mrsas_instance	*instance;
1412 	struct mrsas_ioctl	*ioctl;
1413 	struct mrsas_aen	aen;
1414 	con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1415 
1416 	instance = ddi_get_soft_state(mrsas_state, MINOR2INST(getminor(dev)));
1417 
1418 	if (instance == NULL) {
1419 		/* invalid minor number */
1420 		con_log(CL_ANN, (CE_WARN, "mr_sas: adapter not found."));
1421 		return (ENXIO);
1422 	}
1423 
1424 	ioctl = (struct mrsas_ioctl *)kmem_zalloc(sizeof (struct mrsas_ioctl),
1425 	    KM_SLEEP);
1426 	ASSERT(ioctl);
1427 
1428 	switch ((uint_t)cmd) {
1429 		case MRSAS_IOCTL_FIRMWARE:
1430 			if (ddi_copyin((void *)arg, ioctl,
1431 			    sizeof (struct mrsas_ioctl), mode)) {
1432 				con_log(CL_ANN, (CE_WARN, "mrsas_ioctl: "
1433 				    "ERROR IOCTL copyin"));
1434 				kmem_free(ioctl, sizeof (struct mrsas_ioctl));
1435 				return (EFAULT);
1436 			}
1437 
1438 			if (ioctl->control_code == MRSAS_DRIVER_IOCTL_COMMON) {
1439 				rval = handle_drv_ioctl(instance, ioctl, mode);
1440 			} else {
1441 				rval = handle_mfi_ioctl(instance, ioctl, mode);
1442 			}
1443 
1444 			if (ddi_copyout((void *)ioctl, (void *)arg,
1445 			    (sizeof (struct mrsas_ioctl) - 1), mode)) {
1446 				con_log(CL_ANN, (CE_WARN,
1447 				    "mrsas_ioctl: copy_to_user failed"));
1448 				rval = 1;
1449 			}
1450 
1451 			break;
1452 		case MRSAS_IOCTL_AEN:
1453 			if (ddi_copyin((void *) arg, &aen,
1454 			    sizeof (struct mrsas_aen), mode)) {
1455 				con_log(CL_ANN, (CE_WARN,
1456 				    "mrsas_ioctl: ERROR AEN copyin"));
1457 				kmem_free(ioctl, sizeof (struct mrsas_ioctl));
1458 				return (EFAULT);
1459 			}
1460 
1461 			rval = handle_mfi_aen(instance, &aen);
1462 
1463 			if (ddi_copyout((void *) &aen, (void *)arg,
1464 			    sizeof (struct mrsas_aen), mode)) {
1465 				con_log(CL_ANN, (CE_WARN,
1466 				    "mrsas_ioctl: copy_to_user failed"));
1467 				rval = 1;
1468 			}
1469 
1470 			break;
1471 		default:
1472 			rval = scsi_hba_ioctl(dev, cmd, arg,
1473 			    mode, credp, rvalp);
1474 
1475 			con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_ioctl: "
1476 			    "scsi_hba_ioctl called, ret = %x.", rval));
1477 	}
1478 
1479 	kmem_free(ioctl, sizeof (struct mrsas_ioctl));
1480 	return (rval);
1481 }
1482 
1483 /*
1484  * ************************************************************************** *
1485  *									      *
1486  *		 common entry points - for block driver types		      *
1487  *									      *
1488  * ************************************************************************** *
1489  */
1490 #ifdef __sparc
1491 /*
1492  * reset - TBD
1493  * @dip:
1494  * @cmd:
1495  *
1496  * TBD
1497  */
1498 /*ARGSUSED*/
1499 static int
mrsas_reset(dev_info_t * dip,ddi_reset_cmd_t cmd)1500 mrsas_reset(dev_info_t *dip, ddi_reset_cmd_t cmd)
1501 {
1502 	int	instance_no;
1503 
1504 	struct mrsas_instance	*instance;
1505 
1506 	instance_no = ddi_get_instance(dip);
1507 	instance = (struct mrsas_instance *)ddi_get_soft_state
1508 	    (mrsas_state, instance_no);
1509 
1510 	con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1511 
1512 	if (!instance) {
1513 		con_log(CL_ANN, (CE_WARN, "mr_sas:%d could not get adapter "
1514 		    "in reset", instance_no));
1515 		return (DDI_FAILURE);
1516 	}
1517 
1518 	instance->func_ptr->disable_intr(instance);
1519 
1520 	con_log(CL_ANN1, (CE_CONT, "flushing cache for instance %d",
1521 	    instance_no));
1522 
1523 	flush_cache(instance);
1524 
1525 	return (DDI_SUCCESS);
1526 }
1527 #else /* __sparc */
1528 /*ARGSUSED*/
1529 static int
mrsas_quiesce(dev_info_t * dip)1530 mrsas_quiesce(dev_info_t *dip)
1531 {
1532 	int	instance_no;
1533 
1534 	struct mrsas_instance	*instance;
1535 
1536 	instance_no = ddi_get_instance(dip);
1537 	instance = (struct mrsas_instance *)ddi_get_soft_state
1538 	    (mrsas_state, instance_no);
1539 
1540 	con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1541 
1542 	if (!instance) {
1543 		con_log(CL_ANN1, (CE_WARN, "mr_sas:%d could not get adapter "
1544 		    "in quiesce", instance_no));
1545 		return (DDI_FAILURE);
1546 	}
1547 	if (instance->deadadapter || instance->adapterresetinprogress) {
1548 		con_log(CL_ANN1, (CE_WARN, "mr_sas:%d adapter is not in "
1549 		    "healthy state", instance_no));
1550 		return (DDI_FAILURE);
1551 	}
1552 
1553 	if (abort_aen_cmd(instance, instance->aen_cmd)) {
1554 		con_log(CL_ANN1, (CE_WARN, "mrsas_quiesce: "
1555 		    "failed to abort prevous AEN command QUIESCE"));
1556 	}
1557 
1558 	if (instance->tbolt) {
1559 		if (abort_syncmap_cmd(instance,
1560 		    instance->map_update_cmd)) {
1561 			dev_err(dip, CE_WARN,
1562 			    "mrsas_detach: failed to abort "
1563 			    "previous syncmap command");
1564 			return (DDI_FAILURE);
1565 		}
1566 	}
1567 
1568 	instance->func_ptr->disable_intr(instance);
1569 
1570 	con_log(CL_ANN1, (CE_CONT, "flushing cache for instance %d",
1571 	    instance_no));
1572 
1573 	flush_cache(instance);
1574 
1575 	if (wait_for_outstanding(instance)) {
1576 		con_log(CL_ANN1,
1577 		    (CE_CONT, "wait_for_outstanding: return FAIL.\n"));
1578 		return (DDI_FAILURE);
1579 	}
1580 	return (DDI_SUCCESS);
1581 }
1582 #endif	/* __sparc */
1583 
1584 /*
1585  * ************************************************************************** *
1586  *									      *
1587  *			    entry points (SCSI HBA)			      *
1588  *									      *
1589  * ************************************************************************** *
1590  */
1591 /*
1592  * tran_tgt_init - initialize a target device instance
1593  * @hba_dip:
1594  * @tgt_dip:
1595  * @tran:
1596  * @sd:
1597  *
1598  * The tran_tgt_init() entry point enables the HBA to allocate and initialize
1599  * any per-target resources. tran_tgt_init() also enables the HBA to qualify
1600  * the device's address as valid and supportable for that particular HBA.
1601  * By returning DDI_FAILURE, the instance of the target driver for that device
1602  * is not probed or attached.
1603  */
1604 /*ARGSUSED*/
1605 static int
mrsas_tran_tgt_init(dev_info_t * hba_dip,dev_info_t * tgt_dip,scsi_hba_tran_t * tran,struct scsi_device * sd)1606 mrsas_tran_tgt_init(dev_info_t *hba_dip, dev_info_t *tgt_dip,
1607     scsi_hba_tran_t *tran, struct scsi_device *sd)
1608 {
1609 	struct mrsas_instance *instance;
1610 	uint16_t tgt = sd->sd_address.a_target;
1611 	uint8_t lun = sd->sd_address.a_lun;
1612 	dev_info_t *child = NULL;
1613 
1614 	con_log(CL_DLEVEL2, (CE_NOTE, "mrsas_tgt_init target %d lun %d",
1615 	    tgt, lun));
1616 
1617 	instance = ADDR2MR(&sd->sd_address);
1618 
1619 	if (ndi_dev_is_persistent_node(tgt_dip) == 0) {
1620 		/*
1621 		 * If no persistent node exists, we don't allow .conf node
1622 		 * to be created.
1623 		 */
1624 		if ((child = mrsas_find_child(instance, tgt, lun)) != NULL) {
1625 			con_log(CL_DLEVEL2,
1626 			    (CE_NOTE, "mrsas_tgt_init find child ="
1627 			    " %p t = %d l = %d", (void *)child, tgt, lun));
1628 			if (ndi_merge_node(tgt_dip, mrsas_name_node) !=
1629 			    DDI_SUCCESS)
1630 				/* Create this .conf node */
1631 				return (DDI_SUCCESS);
1632 		}
1633 		con_log(CL_DLEVEL2, (CE_NOTE, "mrsas_tgt_init in ndi_per "
1634 		    "DDI_FAILURE t = %d l = %d", tgt, lun));
1635 		return (DDI_FAILURE);
1636 
1637 	}
1638 
1639 	con_log(CL_DLEVEL2, (CE_NOTE, "mrsas_tgt_init dev_dip %p tgt_dip %p",
1640 	    (void *)instance->mr_ld_list[tgt].dip, (void *)tgt_dip));
1641 
1642 	if (tgt < MRDRV_MAX_LD && lun == 0) {
1643 		if (instance->mr_ld_list[tgt].dip == NULL &&
1644 		    strcmp(ddi_driver_name(sd->sd_dev), "sd") == 0) {
1645 			mutex_enter(&instance->config_dev_mtx);
1646 			instance->mr_ld_list[tgt].dip = tgt_dip;
1647 			instance->mr_ld_list[tgt].lun_type = MRSAS_LD_LUN;
1648 			instance->mr_ld_list[tgt].flag = MRDRV_TGT_VALID;
1649 			mutex_exit(&instance->config_dev_mtx);
1650 		}
1651 	} else if (instance->tbolt || instance->skinny) {
1652 		if (instance->mr_tbolt_pd_list[tgt].dip == NULL) {
1653 			mutex_enter(&instance->config_dev_mtx);
1654 			instance->mr_tbolt_pd_list[tgt].dip = tgt_dip;
1655 			instance->mr_tbolt_pd_list[tgt].flag =
1656 			    MRDRV_TGT_VALID;
1657 			mutex_exit(&instance->config_dev_mtx);
1658 			con_log(CL_ANN1, (CE_NOTE, "mrsas_tran_tgt_init:"
1659 			    "t%xl%x", tgt, lun));
1660 		}
1661 	}
1662 
1663 	return (DDI_SUCCESS);
1664 }
1665 
1666 /*ARGSUSED*/
1667 static void
mrsas_tran_tgt_free(dev_info_t * hba_dip,dev_info_t * tgt_dip,scsi_hba_tran_t * hba_tran,struct scsi_device * sd)1668 mrsas_tran_tgt_free(dev_info_t *hba_dip, dev_info_t *tgt_dip,
1669     scsi_hba_tran_t *hba_tran, struct scsi_device *sd)
1670 {
1671 	struct mrsas_instance *instance;
1672 	int tgt = sd->sd_address.a_target;
1673 	int lun = sd->sd_address.a_lun;
1674 
1675 	instance = ADDR2MR(&sd->sd_address);
1676 
1677 	con_log(CL_DLEVEL2, (CE_NOTE, "tgt_free t = %d l = %d", tgt, lun));
1678 
1679 	if (tgt < MRDRV_MAX_LD && lun == 0) {
1680 		if (instance->mr_ld_list[tgt].dip == tgt_dip) {
1681 			mutex_enter(&instance->config_dev_mtx);
1682 			instance->mr_ld_list[tgt].dip = NULL;
1683 			mutex_exit(&instance->config_dev_mtx);
1684 		}
1685 	} else if (instance->tbolt || instance->skinny) {
1686 		mutex_enter(&instance->config_dev_mtx);
1687 		instance->mr_tbolt_pd_list[tgt].dip = NULL;
1688 		mutex_exit(&instance->config_dev_mtx);
1689 		con_log(CL_ANN1, (CE_NOTE, "tgt_free: Setting dip = NULL"
1690 		    "for tgt:%x", tgt));
1691 	}
1692 }
1693 
1694 dev_info_t *
mrsas_find_child(struct mrsas_instance * instance,uint16_t tgt,uint8_t lun)1695 mrsas_find_child(struct mrsas_instance *instance, uint16_t tgt, uint8_t lun)
1696 {
1697 	dev_info_t *child = NULL;
1698 	char addr[SCSI_MAXNAMELEN];
1699 	char tmp[MAXNAMELEN];
1700 
1701 	(void) snprintf(addr, sizeof (addr), "%x,%x", tgt, lun);
1702 	for (child = ddi_get_child(instance->dip); child;
1703 	    child = ddi_get_next_sibling(child)) {
1704 
1705 		if (ndi_dev_is_persistent_node(child) == 0) {
1706 			continue;
1707 		}
1708 
1709 		if (mrsas_name_node(child, tmp, MAXNAMELEN) !=
1710 		    DDI_SUCCESS) {
1711 			continue;
1712 		}
1713 
1714 		if (strcmp(addr, tmp) == 0) {
1715 			break;
1716 		}
1717 	}
1718 	con_log(CL_DLEVEL2, (CE_NOTE, "mrsas_find_child: return child = %p",
1719 	    (void *)child));
1720 	return (child);
1721 }
1722 
1723 /*
1724  * mrsas_name_node -
1725  * @dip:
1726  * @name:
1727  * @len:
1728  */
1729 static int
mrsas_name_node(dev_info_t * dip,char * name,int len)1730 mrsas_name_node(dev_info_t *dip, char *name, int len)
1731 {
1732 	int tgt, lun;
1733 
1734 	tgt = ddi_prop_get_int(DDI_DEV_T_ANY, dip,
1735 	    DDI_PROP_DONTPASS, "target", -1);
1736 	con_log(CL_DLEVEL2, (CE_NOTE,
1737 	    "mrsas_name_node: dip %p tgt %d", (void *)dip, tgt));
1738 	if (tgt == -1) {
1739 		return (DDI_FAILURE);
1740 	}
1741 	lun = ddi_prop_get_int(DDI_DEV_T_ANY, dip, DDI_PROP_DONTPASS,
1742 	    "lun", -1);
1743 	con_log(CL_DLEVEL2,
1744 	    (CE_NOTE, "mrsas_name_node: tgt %d lun %d", tgt, lun));
1745 	if (lun == -1) {
1746 		return (DDI_FAILURE);
1747 	}
1748 	(void) snprintf(name, len, "%x,%x", tgt, lun);
1749 	return (DDI_SUCCESS);
1750 }
1751 
1752 /*
1753  * tran_init_pkt - allocate & initialize a scsi_pkt structure
1754  * @ap:
1755  * @pkt:
1756  * @bp:
1757  * @cmdlen:
1758  * @statuslen:
1759  * @tgtlen:
1760  * @flags:
1761  * @callback:
1762  *
1763  * The tran_init_pkt() entry point allocates and initializes a scsi_pkt
1764  * structure and DMA resources for a target driver request. The
1765  * tran_init_pkt() entry point is called when the target driver calls the
1766  * SCSA function scsi_init_pkt(). Each call of the tran_init_pkt() entry point
1767  * is a request to perform one or more of three possible services:
1768  *  - allocation and initialization of a scsi_pkt structure
1769  *  - allocation of DMA resources for data transfer
1770  *  - reallocation of DMA resources for the next portion of the data transfer
1771  */
1772 static struct scsi_pkt *
mrsas_tran_init_pkt(struct scsi_address * ap,register struct scsi_pkt * pkt,struct buf * bp,int cmdlen,int statuslen,int tgtlen,int flags,int (* callback)(),caddr_t arg)1773 mrsas_tran_init_pkt(struct scsi_address *ap, register struct scsi_pkt *pkt,
1774     struct buf *bp, int cmdlen, int statuslen, int tgtlen,
1775     int flags, int (*callback)(), caddr_t arg)
1776 {
1777 	struct scsa_cmd	*acmd;
1778 	struct mrsas_instance	*instance;
1779 	struct scsi_pkt	*new_pkt;
1780 
1781 	con_log(CL_DLEVEL1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1782 
1783 	instance = ADDR2MR(ap);
1784 
1785 	/* step #1 : pkt allocation */
1786 	if (pkt == NULL) {
1787 		pkt = scsi_hba_pkt_alloc(instance->dip, ap, cmdlen, statuslen,
1788 		    tgtlen, sizeof (struct scsa_cmd), callback, arg);
1789 		if (pkt == NULL) {
1790 			return (NULL);
1791 		}
1792 
1793 		acmd = PKT2CMD(pkt);
1794 
1795 		/*
1796 		 * Initialize the new pkt - we redundantly initialize
1797 		 * all the fields for illustrative purposes.
1798 		 */
1799 		acmd->cmd_pkt		= pkt;
1800 		acmd->cmd_flags		= 0;
1801 		acmd->cmd_scblen	= statuslen;
1802 		acmd->cmd_cdblen	= cmdlen;
1803 		acmd->cmd_dmahandle	= NULL;
1804 		acmd->cmd_ncookies	= 0;
1805 		acmd->cmd_cookie	= 0;
1806 		acmd->cmd_cookiecnt	= 0;
1807 		acmd->cmd_nwin		= 0;
1808 
1809 		pkt->pkt_address	= *ap;
1810 		pkt->pkt_comp		= (void (*)())NULL;
1811 		pkt->pkt_flags		= 0;
1812 		pkt->pkt_time		= 0;
1813 		pkt->pkt_resid		= 0;
1814 		pkt->pkt_state		= 0;
1815 		pkt->pkt_statistics	= 0;
1816 		pkt->pkt_reason		= 0;
1817 		new_pkt			= pkt;
1818 	} else {
1819 		acmd = PKT2CMD(pkt);
1820 		new_pkt = NULL;
1821 	}
1822 
1823 	/* step #2 : dma allocation/move */
1824 	if (bp && bp->b_bcount != 0) {
1825 		if (acmd->cmd_dmahandle == NULL) {
1826 			if (mrsas_dma_alloc(instance, pkt, bp, flags,
1827 			    callback) == DDI_FAILURE) {
1828 				if (new_pkt) {
1829 					scsi_hba_pkt_free(ap, new_pkt);
1830 				}
1831 				return ((struct scsi_pkt *)NULL);
1832 			}
1833 		} else {
1834 			if (mrsas_dma_move(instance, pkt, bp) == DDI_FAILURE) {
1835 				return ((struct scsi_pkt *)NULL);
1836 			}
1837 		}
1838 	}
1839 
1840 	return (pkt);
1841 }
1842 
1843 /*
1844  * tran_start - transport a SCSI command to the addressed target
1845  * @ap:
1846  * @pkt:
1847  *
1848  * The tran_start() entry point for a SCSI HBA driver is called to transport a
1849  * SCSI command to the addressed target. The SCSI command is described
1850  * entirely within the scsi_pkt structure, which the target driver allocated
1851  * through the HBA driver's tran_init_pkt() entry point. If the command
1852  * involves a data transfer, DMA resources must also have been allocated for
1853  * the scsi_pkt structure.
1854  *
1855  * Return Values :
1856  *	TRAN_BUSY - request queue is full, no more free scbs
1857  *	TRAN_ACCEPT - pkt has been submitted to the instance
1858  */
1859 static int
mrsas_tran_start(struct scsi_address * ap,register struct scsi_pkt * pkt)1860 mrsas_tran_start(struct scsi_address *ap, register struct scsi_pkt *pkt)
1861 {
1862 	uchar_t		cmd_done = 0;
1863 
1864 	struct mrsas_instance	*instance = ADDR2MR(ap);
1865 	struct mrsas_cmd	*cmd;
1866 
1867 	con_log(CL_DLEVEL1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1868 	if (instance->deadadapter == 1) {
1869 		con_log(CL_ANN1, (CE_WARN,
1870 		    "mrsas_tran_start: return TRAN_FATAL_ERROR "
1871 		    "for IO, as the HBA doesnt take any more IOs"));
1872 		if (pkt) {
1873 			pkt->pkt_reason		= CMD_DEV_GONE;
1874 			pkt->pkt_statistics	= STAT_DISCON;
1875 		}
1876 		return (TRAN_FATAL_ERROR);
1877 	}
1878 
1879 	if (instance->adapterresetinprogress) {
1880 		con_log(CL_ANN1, (CE_NOTE, "mrsas_tran_start: Reset flag set, "
1881 		    "returning mfi_pkt and setting TRAN_BUSY\n"));
1882 		return (TRAN_BUSY);
1883 	}
1884 
1885 	con_log(CL_ANN1, (CE_CONT, "chkpnt:%s:%d:SCSI CDB[0]=0x%x time:%x",
1886 	    __func__, __LINE__, pkt->pkt_cdbp[0], pkt->pkt_time));
1887 
1888 	pkt->pkt_reason	= CMD_CMPLT;
1889 	*pkt->pkt_scbp = STATUS_GOOD; /* clear arq scsi_status */
1890 
1891 	cmd = build_cmd(instance, ap, pkt, &cmd_done);
1892 
1893 	/*
1894 	 * Check if the command is already completed by the mrsas_build_cmd()
1895 	 * routine. In which case the busy_flag would be clear and scb will be
1896 	 * NULL and appropriate reason provided in pkt_reason field
1897 	 */
1898 	if (cmd_done) {
1899 		pkt->pkt_reason = CMD_CMPLT;
1900 		pkt->pkt_scbp[0] = STATUS_GOOD;
1901 		pkt->pkt_state |= STATE_GOT_BUS | STATE_GOT_TARGET
1902 		    | STATE_SENT_CMD;
1903 		if (((pkt->pkt_flags & FLAG_NOINTR) == 0) && pkt->pkt_comp) {
1904 			(*pkt->pkt_comp)(pkt);
1905 		}
1906 
1907 		return (TRAN_ACCEPT);
1908 	}
1909 
1910 	if (cmd == NULL) {
1911 		return (TRAN_BUSY);
1912 	}
1913 
1914 	if ((pkt->pkt_flags & FLAG_NOINTR) == 0) {
1915 		if (instance->fw_outstanding > instance->max_fw_cmds) {
1916 			con_log(CL_ANN, (CE_CONT, "mr_sas:Firmware busy"));
1917 			DTRACE_PROBE2(start_tran_err,
1918 			    uint16_t, instance->fw_outstanding,
1919 			    uint16_t, instance->max_fw_cmds);
1920 			mrsas_return_mfi_pkt(instance, cmd);
1921 			return (TRAN_BUSY);
1922 		}
1923 
1924 		/* Synchronize the Cmd frame for the controller */
1925 		(void) ddi_dma_sync(cmd->frame_dma_obj.dma_handle, 0, 0,
1926 		    DDI_DMA_SYNC_FORDEV);
1927 		con_log(CL_ANN, (CE_CONT, "issue_cmd_ppc: SCSI CDB[0]=0x%x"
1928 		    "cmd->index:%x\n", pkt->pkt_cdbp[0], cmd->index));
1929 		instance->func_ptr->issue_cmd(cmd, instance);
1930 
1931 	} else {
1932 		struct mrsas_header *hdr = &cmd->frame->hdr;
1933 
1934 		instance->func_ptr->issue_cmd_in_poll_mode(instance, cmd);
1935 
1936 		pkt->pkt_reason		= CMD_CMPLT;
1937 		pkt->pkt_statistics	= 0;
1938 		pkt->pkt_state |= STATE_XFERRED_DATA | STATE_GOT_STATUS;
1939 
1940 		switch (ddi_get8(cmd->frame_dma_obj.acc_handle,
1941 		    &hdr->cmd_status)) {
1942 		case MFI_STAT_OK:
1943 			pkt->pkt_scbp[0] = STATUS_GOOD;
1944 			break;
1945 
1946 		case MFI_STAT_SCSI_DONE_WITH_ERROR:
1947 			con_log(CL_ANN, (CE_CONT,
1948 			    "mrsas_tran_start: scsi done with error"));
1949 			pkt->pkt_reason	= CMD_CMPLT;
1950 			pkt->pkt_statistics = 0;
1951 
1952 			((struct scsi_status *)pkt->pkt_scbp)->sts_chk = 1;
1953 			break;
1954 
1955 		case MFI_STAT_DEVICE_NOT_FOUND:
1956 			con_log(CL_ANN, (CE_CONT,
1957 			    "mrsas_tran_start: device not found error"));
1958 			pkt->pkt_reason		= CMD_DEV_GONE;
1959 			pkt->pkt_statistics	= STAT_DISCON;
1960 			break;
1961 
1962 		default:
1963 			((struct scsi_status *)pkt->pkt_scbp)->sts_busy = 1;
1964 		}
1965 
1966 		(void) mrsas_common_check(instance, cmd);
1967 		DTRACE_PROBE2(start_nointr_done, uint8_t, hdr->cmd,
1968 		    uint8_t, hdr->cmd_status);
1969 		mrsas_return_mfi_pkt(instance, cmd);
1970 
1971 		if (pkt->pkt_comp) {
1972 			(*pkt->pkt_comp)(pkt);
1973 		}
1974 
1975 	}
1976 
1977 	return (TRAN_ACCEPT);
1978 }
1979 
1980 /*
1981  * tran_abort - Abort any commands that are currently in transport
1982  * @ap:
1983  * @pkt:
1984  *
1985  * The tran_abort() entry point for a SCSI HBA driver is called to abort any
1986  * commands that are currently in transport for a particular target. This entry
1987  * point is called when a target driver calls scsi_abort(). The tran_abort()
1988  * entry point should attempt to abort the command denoted by the pkt
1989  * parameter. If the pkt parameter is NULL, tran_abort() should attempt to
1990  * abort all outstanding commands in the transport layer for the particular
1991  * target or logical unit.
1992  */
1993 /*ARGSUSED*/
1994 static int
mrsas_tran_abort(struct scsi_address * ap,struct scsi_pkt * pkt)1995 mrsas_tran_abort(struct scsi_address *ap, struct scsi_pkt *pkt)
1996 {
1997 	con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
1998 
1999 	/* abort command not supported by H/W */
2000 
2001 	return (DDI_FAILURE);
2002 }
2003 
2004 /*
2005  * tran_reset - reset either the SCSI bus or target
2006  * @ap:
2007  * @level:
2008  *
2009  * The tran_reset() entry point for a SCSI HBA driver is called to reset either
2010  * the SCSI bus or a particular SCSI target device. This entry point is called
2011  * when a target driver calls scsi_reset(). The tran_reset() entry point must
2012  * reset the SCSI bus if level is RESET_ALL. If level is RESET_TARGET, just the
2013  * particular target or logical unit must be reset.
2014  */
2015 /*ARGSUSED*/
2016 static int
mrsas_tran_reset(struct scsi_address * ap,int level)2017 mrsas_tran_reset(struct scsi_address *ap, int level)
2018 {
2019 	struct mrsas_instance *instance = ADDR2MR(ap);
2020 
2021 	con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
2022 
2023 	if (wait_for_outstanding(instance)) {
2024 		con_log(CL_ANN1,
2025 		    (CE_CONT, "wait_for_outstanding: return FAIL.\n"));
2026 		return (DDI_FAILURE);
2027 	} else {
2028 		return (DDI_SUCCESS);
2029 	}
2030 }
2031 
2032 /*
2033  * tran_getcap - get one of a set of SCSA-defined capabilities
2034  * @ap:
2035  * @cap:
2036  * @whom:
2037  *
2038  * The target driver can request the current setting of the capability for a
2039  * particular target by setting the whom parameter to nonzero. A whom value of
2040  * zero indicates a request for the current setting of the general capability
2041  * for the SCSI bus or for adapter hardware. The tran_getcap() should return -1
2042  * for undefined capabilities or the current value of the requested capability.
2043  */
2044 /*ARGSUSED*/
2045 static int
mrsas_tran_getcap(struct scsi_address * ap,char * cap,int whom)2046 mrsas_tran_getcap(struct scsi_address *ap, char *cap, int whom)
2047 {
2048 	int	rval = 0;
2049 
2050 	struct mrsas_instance	*instance = ADDR2MR(ap);
2051 
2052 	con_log(CL_DLEVEL2, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
2053 
2054 	/* we do allow inquiring about capabilities for other targets */
2055 	if (cap == NULL) {
2056 		return (-1);
2057 	}
2058 
2059 	switch (scsi_hba_lookup_capstr(cap)) {
2060 	case SCSI_CAP_DMA_MAX:
2061 		if (instance->tbolt) {
2062 			/* Limit to 256k max transfer */
2063 			rval = mrsas_tbolt_max_cap_maxxfer;
2064 		} else {
2065 			/* Limit to 16MB max transfer */
2066 			rval = mrsas_max_cap_maxxfer;
2067 		}
2068 		break;
2069 	case SCSI_CAP_MSG_OUT:
2070 		rval = 1;
2071 		break;
2072 	case SCSI_CAP_DISCONNECT:
2073 		rval = 0;
2074 		break;
2075 	case SCSI_CAP_SYNCHRONOUS:
2076 		rval = 0;
2077 		break;
2078 	case SCSI_CAP_WIDE_XFER:
2079 		rval = 1;
2080 		break;
2081 	case SCSI_CAP_TAGGED_QING:
2082 		rval = 1;
2083 		break;
2084 	case SCSI_CAP_UNTAGGED_QING:
2085 		rval = 1;
2086 		break;
2087 	case SCSI_CAP_PARITY:
2088 		rval = 1;
2089 		break;
2090 	case SCSI_CAP_INITIATOR_ID:
2091 		rval = instance->init_id;
2092 		break;
2093 	case SCSI_CAP_ARQ:
2094 		rval = 1;
2095 		break;
2096 	case SCSI_CAP_LINKED_CMDS:
2097 		rval = 0;
2098 		break;
2099 	case SCSI_CAP_RESET_NOTIFICATION:
2100 		rval = 1;
2101 		break;
2102 	case SCSI_CAP_GEOMETRY:
2103 		rval = -1;
2104 
2105 		break;
2106 	default:
2107 		con_log(CL_DLEVEL2, (CE_NOTE, "Default cap coming 0x%x",
2108 		    scsi_hba_lookup_capstr(cap)));
2109 		rval = -1;
2110 		break;
2111 	}
2112 
2113 	return (rval);
2114 }
2115 
2116 /*
2117  * tran_setcap - set one of a set of SCSA-defined capabilities
2118  * @ap:
2119  * @cap:
2120  * @value:
2121  * @whom:
2122  *
2123  * The target driver might request that the new value be set for a particular
2124  * target by setting the whom parameter to nonzero. A whom value of zero
2125  * means that request is to set the new value for the SCSI bus or for adapter
2126  * hardware in general.
2127  * The tran_setcap() should return the following values as appropriate:
2128  * - -1 for undefined capabilities
2129  * - 0 if the HBA driver cannot set the capability to the requested value
2130  * - 1 if the HBA driver is able to set the capability to the requested value
2131  */
2132 /*ARGSUSED*/
2133 static int
mrsas_tran_setcap(struct scsi_address * ap,char * cap,int value,int whom)2134 mrsas_tran_setcap(struct scsi_address *ap, char *cap, int value, int whom)
2135 {
2136 	int		rval = 1;
2137 
2138 	con_log(CL_DLEVEL2, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
2139 
2140 	/* We don't allow setting capabilities for other targets */
2141 	if (cap == NULL || whom == 0) {
2142 		return (-1);
2143 	}
2144 
2145 	switch (scsi_hba_lookup_capstr(cap)) {
2146 		case SCSI_CAP_DMA_MAX:
2147 		case SCSI_CAP_MSG_OUT:
2148 		case SCSI_CAP_PARITY:
2149 		case SCSI_CAP_LINKED_CMDS:
2150 		case SCSI_CAP_RESET_NOTIFICATION:
2151 		case SCSI_CAP_DISCONNECT:
2152 		case SCSI_CAP_SYNCHRONOUS:
2153 		case SCSI_CAP_UNTAGGED_QING:
2154 		case SCSI_CAP_WIDE_XFER:
2155 		case SCSI_CAP_INITIATOR_ID:
2156 		case SCSI_CAP_ARQ:
2157 			/*
2158 			 * None of these are settable via
2159 			 * the capability interface.
2160 			 */
2161 			break;
2162 		case SCSI_CAP_TAGGED_QING:
2163 			rval = 1;
2164 			break;
2165 		case SCSI_CAP_SECTOR_SIZE:
2166 			rval = 1;
2167 			break;
2168 
2169 		case SCSI_CAP_TOTAL_SECTORS:
2170 			rval = 1;
2171 			break;
2172 		default:
2173 			rval = -1;
2174 			break;
2175 	}
2176 
2177 	return (rval);
2178 }
2179 
2180 /*
2181  * tran_destroy_pkt - deallocate scsi_pkt structure
2182  * @ap:
2183  * @pkt:
2184  *
2185  * The tran_destroy_pkt() entry point is the HBA driver function that
2186  * deallocates scsi_pkt structures. The tran_destroy_pkt() entry point is
2187  * called when the target driver calls scsi_destroy_pkt(). The
2188  * tran_destroy_pkt() entry point must free any DMA resources that have been
2189  * allocated for the packet. An implicit DMA synchronization occurs if the
2190  * DMA resources are freed and any cached data remains after the completion
2191  * of the transfer.
2192  */
2193 static void
mrsas_tran_destroy_pkt(struct scsi_address * ap,struct scsi_pkt * pkt)2194 mrsas_tran_destroy_pkt(struct scsi_address *ap, struct scsi_pkt *pkt)
2195 {
2196 	struct scsa_cmd *acmd = PKT2CMD(pkt);
2197 
2198 	con_log(CL_DLEVEL2, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
2199 
2200 	if (acmd->cmd_flags & CFLAG_DMAVALID) {
2201 		acmd->cmd_flags &= ~CFLAG_DMAVALID;
2202 
2203 		(void) ddi_dma_unbind_handle(acmd->cmd_dmahandle);
2204 
2205 		ddi_dma_free_handle(&acmd->cmd_dmahandle);
2206 
2207 		acmd->cmd_dmahandle = NULL;
2208 	}
2209 
2210 	/* free the pkt */
2211 	scsi_hba_pkt_free(ap, pkt);
2212 }
2213 
2214 /*
2215  * tran_dmafree - deallocates DMA resources
2216  * @ap:
2217  * @pkt:
2218  *
2219  * The tran_dmafree() entry point deallocates DMAQ resources that have been
2220  * allocated for a scsi_pkt structure. The tran_dmafree() entry point is
2221  * called when the target driver calls scsi_dmafree(). The tran_dmafree() must
2222  * free only DMA resources allocated for a scsi_pkt structure, not the
2223  * scsi_pkt itself. When DMA resources are freed, a DMA synchronization is
2224  * implicitly performed.
2225  */
2226 /*ARGSUSED*/
2227 static void
mrsas_tran_dmafree(struct scsi_address * ap,struct scsi_pkt * pkt)2228 mrsas_tran_dmafree(struct scsi_address *ap, struct scsi_pkt *pkt)
2229 {
2230 	register struct scsa_cmd *acmd = PKT2CMD(pkt);
2231 
2232 	con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
2233 
2234 	if (acmd->cmd_flags & CFLAG_DMAVALID) {
2235 		acmd->cmd_flags &= ~CFLAG_DMAVALID;
2236 
2237 		(void) ddi_dma_unbind_handle(acmd->cmd_dmahandle);
2238 
2239 		ddi_dma_free_handle(&acmd->cmd_dmahandle);
2240 
2241 		acmd->cmd_dmahandle = NULL;
2242 	}
2243 }
2244 
2245 /*
2246  * tran_sync_pkt - synchronize the DMA object allocated
2247  * @ap:
2248  * @pkt:
2249  *
2250  * The tran_sync_pkt() entry point synchronizes the DMA object allocated for
2251  * the scsi_pkt structure before or after a DMA transfer. The tran_sync_pkt()
2252  * entry point is called when the target driver calls scsi_sync_pkt(). If the
2253  * data transfer direction is a DMA read from device to memory, tran_sync_pkt()
2254  * must synchronize the CPU's view of the data. If the data transfer direction
2255  * is a DMA write from memory to device, tran_sync_pkt() must synchronize the
2256  * device's view of the data.
2257  */
2258 /*ARGSUSED*/
2259 static void
mrsas_tran_sync_pkt(struct scsi_address * ap,struct scsi_pkt * pkt)2260 mrsas_tran_sync_pkt(struct scsi_address *ap, struct scsi_pkt *pkt)
2261 {
2262 	register struct scsa_cmd	*acmd = PKT2CMD(pkt);
2263 
2264 	con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
2265 
2266 	if (acmd->cmd_flags & CFLAG_DMAVALID) {
2267 		(void) ddi_dma_sync(acmd->cmd_dmahandle, acmd->cmd_dma_offset,
2268 		    acmd->cmd_dma_len, (acmd->cmd_flags & CFLAG_DMASEND) ?
2269 		    DDI_DMA_SYNC_FORDEV : DDI_DMA_SYNC_FORCPU);
2270 	}
2271 }
2272 
2273 /*ARGSUSED*/
2274 static int
mrsas_tran_quiesce(dev_info_t * dip)2275 mrsas_tran_quiesce(dev_info_t *dip)
2276 {
2277 	con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
2278 
2279 	return (1);
2280 }
2281 
2282 /*ARGSUSED*/
2283 static int
mrsas_tran_unquiesce(dev_info_t * dip)2284 mrsas_tran_unquiesce(dev_info_t *dip)
2285 {
2286 	con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
2287 
2288 	return (1);
2289 }
2290 
2291 
2292 /*
2293  * mrsas_isr(caddr_t, caddr_t)
2294  *
2295  * The Interrupt Service Routine
2296  *
2297  * Collect status for all completed commands and do callback
2298  *
2299  */
2300 static uint_t
mrsas_isr(caddr_t arg1,caddr_t arg2 __unused)2301 mrsas_isr(caddr_t arg1, caddr_t arg2 __unused)
2302 {
2303 	struct mrsas_instance *instance = (struct mrsas_instance *)arg1;
2304 	int		need_softintr;
2305 	uint32_t	producer;
2306 	uint32_t	consumer;
2307 	uint32_t	context;
2308 	int		retval;
2309 
2310 	struct mrsas_cmd	*cmd;
2311 	struct mrsas_header	*hdr;
2312 	struct scsi_pkt		*pkt;
2313 
2314 	con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
2315 	ASSERT(instance);
2316 	if (instance->tbolt) {
2317 		mutex_enter(&instance->chip_mtx);
2318 		if ((instance->intr_type == DDI_INTR_TYPE_FIXED) &&
2319 		    !(instance->func_ptr->intr_ack(instance))) {
2320 			mutex_exit(&instance->chip_mtx);
2321 			return (DDI_INTR_UNCLAIMED);
2322 		}
2323 		retval = mr_sas_tbolt_process_outstanding_cmd(instance);
2324 		mutex_exit(&instance->chip_mtx);
2325 		return (retval);
2326 	} else {
2327 		if ((instance->intr_type == DDI_INTR_TYPE_FIXED) &&
2328 		    !instance->func_ptr->intr_ack(instance)) {
2329 			return (DDI_INTR_UNCLAIMED);
2330 		}
2331 	}
2332 
2333 	(void) ddi_dma_sync(instance->mfi_internal_dma_obj.dma_handle,
2334 	    0, 0, DDI_DMA_SYNC_FORCPU);
2335 
2336 	if (mrsas_check_dma_handle(instance->mfi_internal_dma_obj.dma_handle)
2337 	    != DDI_SUCCESS) {
2338 		mrsas_fm_ereport(instance, DDI_FM_DEVICE_NO_RESPONSE);
2339 		ddi_fm_service_impact(instance->dip, DDI_SERVICE_LOST);
2340 		con_log(CL_ANN1, (CE_WARN,
2341 		    "mr_sas_isr(): FMA check, returning DDI_INTR_UNCLAIMED"));
2342 		return (DDI_INTR_CLAIMED);
2343 	}
2344 	con_log(CL_ANN1, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
2345 
2346 #ifdef OCRDEBUG
2347 	if (debug_consecutive_timeout_after_ocr_g == 1) {
2348 		con_log(CL_ANN1, (CE_NOTE,
2349 		    "simulating consecutive timeout after ocr"));
2350 		return (DDI_INTR_CLAIMED);
2351 	}
2352 #endif
2353 
2354 	mutex_enter(&instance->completed_pool_mtx);
2355 	mutex_enter(&instance->cmd_pend_mtx);
2356 
2357 	producer = ddi_get32(instance->mfi_internal_dma_obj.acc_handle,
2358 	    instance->producer);
2359 	consumer = ddi_get32(instance->mfi_internal_dma_obj.acc_handle,
2360 	    instance->consumer);
2361 
2362 	con_log(CL_ANN, (CE_CONT, " producer %x consumer %x ",
2363 	    producer, consumer));
2364 	if (producer == consumer) {
2365 		con_log(CL_ANN, (CE_WARN, "producer ==	consumer case"));
2366 		DTRACE_PROBE2(isr_pc_err, uint32_t, producer,
2367 		    uint32_t, consumer);
2368 		mutex_exit(&instance->cmd_pend_mtx);
2369 		mutex_exit(&instance->completed_pool_mtx);
2370 		return (DDI_INTR_CLAIMED);
2371 	}
2372 
2373 	while (consumer != producer) {
2374 		context = ddi_get32(instance->mfi_internal_dma_obj.acc_handle,
2375 		    &instance->reply_queue[consumer]);
2376 		cmd = instance->cmd_list[context];
2377 
2378 		if (cmd->sync_cmd == MRSAS_TRUE) {
2379 			hdr = (struct mrsas_header *)&cmd->frame->hdr;
2380 			if (hdr) {
2381 				mlist_del_init(&cmd->list);
2382 			}
2383 		} else {
2384 			pkt = cmd->pkt;
2385 			if (pkt) {
2386 				mlist_del_init(&cmd->list);
2387 			}
2388 		}
2389 
2390 		mlist_add_tail(&cmd->list, &instance->completed_pool_list);
2391 
2392 		consumer++;
2393 		if (consumer == (instance->max_fw_cmds + 1)) {
2394 			consumer = 0;
2395 		}
2396 	}
2397 	ddi_put32(instance->mfi_internal_dma_obj.acc_handle,
2398 	    instance->consumer, consumer);
2399 	mutex_exit(&instance->cmd_pend_mtx);
2400 	mutex_exit(&instance->completed_pool_mtx);
2401 
2402 	(void) ddi_dma_sync(instance->mfi_internal_dma_obj.dma_handle,
2403 	    0, 0, DDI_DMA_SYNC_FORDEV);
2404 
2405 	if (instance->softint_running) {
2406 		need_softintr = 0;
2407 	} else {
2408 		need_softintr = 1;
2409 	}
2410 
2411 	if (instance->isr_level == HIGH_LEVEL_INTR) {
2412 		if (need_softintr) {
2413 			ddi_trigger_softintr(instance->soft_intr_id);
2414 		}
2415 	} else {
2416 		/*
2417 		 * Not a high-level interrupt, therefore call the soft level
2418 		 * interrupt explicitly
2419 		 */
2420 		(void) mrsas_softintr(instance);
2421 	}
2422 
2423 	return (DDI_INTR_CLAIMED);
2424 }
2425 
2426 
2427 /*
2428  * ************************************************************************** *
2429  *									      *
2430  *				    libraries				      *
2431  *									      *
2432  * ************************************************************************** *
2433  */
2434 /*
2435  * get_mfi_pkt : Get a command from the free pool
2436  * After successful allocation, the caller of this routine
2437  * must clear the frame buffer (memset to zero) before
2438  * using the packet further.
2439  *
2440  * ***** Note *****
2441  * After clearing the frame buffer the context id of the
2442  * frame buffer SHOULD be restored back.
2443  */
2444 struct mrsas_cmd *
mrsas_get_mfi_pkt(struct mrsas_instance * instance)2445 mrsas_get_mfi_pkt(struct mrsas_instance *instance)
2446 {
2447 	mlist_t			*head = &instance->cmd_pool_list;
2448 	struct mrsas_cmd	*cmd = NULL;
2449 
2450 	mutex_enter(&instance->cmd_pool_mtx);
2451 
2452 	if (!mlist_empty(head)) {
2453 		cmd = mlist_entry(head->next, struct mrsas_cmd, list);
2454 		mlist_del_init(head->next);
2455 	}
2456 	if (cmd != NULL) {
2457 		cmd->pkt = NULL;
2458 		cmd->retry_count_for_ocr = 0;
2459 		cmd->drv_pkt_time = 0;
2460 
2461 	}
2462 	mutex_exit(&instance->cmd_pool_mtx);
2463 
2464 	return (cmd);
2465 }
2466 
2467 static struct mrsas_cmd *
get_mfi_app_pkt(struct mrsas_instance * instance)2468 get_mfi_app_pkt(struct mrsas_instance *instance)
2469 {
2470 	mlist_t				*head = &instance->app_cmd_pool_list;
2471 	struct mrsas_cmd	*cmd = NULL;
2472 
2473 	mutex_enter(&instance->app_cmd_pool_mtx);
2474 
2475 	if (!mlist_empty(head)) {
2476 		cmd = mlist_entry(head->next, struct mrsas_cmd, list);
2477 		mlist_del_init(head->next);
2478 	}
2479 	if (cmd != NULL) {
2480 		cmd->pkt = NULL;
2481 		cmd->retry_count_for_ocr = 0;
2482 		cmd->drv_pkt_time = 0;
2483 	}
2484 
2485 	mutex_exit(&instance->app_cmd_pool_mtx);
2486 
2487 	return (cmd);
2488 }
2489 /*
2490  * return_mfi_pkt : Return a cmd to free command pool
2491  */
2492 void
mrsas_return_mfi_pkt(struct mrsas_instance * instance,struct mrsas_cmd * cmd)2493 mrsas_return_mfi_pkt(struct mrsas_instance *instance, struct mrsas_cmd *cmd)
2494 {
2495 	mutex_enter(&instance->cmd_pool_mtx);
2496 	/* use mlist_add_tail for debug assistance */
2497 	mlist_add_tail(&cmd->list, &instance->cmd_pool_list);
2498 
2499 	mutex_exit(&instance->cmd_pool_mtx);
2500 }
2501 
2502 static void
return_mfi_app_pkt(struct mrsas_instance * instance,struct mrsas_cmd * cmd)2503 return_mfi_app_pkt(struct mrsas_instance *instance, struct mrsas_cmd *cmd)
2504 {
2505 	mutex_enter(&instance->app_cmd_pool_mtx);
2506 
2507 	mlist_add(&cmd->list, &instance->app_cmd_pool_list);
2508 
2509 	mutex_exit(&instance->app_cmd_pool_mtx);
2510 }
2511 void
push_pending_mfi_pkt(struct mrsas_instance * instance,struct mrsas_cmd * cmd)2512 push_pending_mfi_pkt(struct mrsas_instance *instance, struct mrsas_cmd *cmd)
2513 {
2514 	struct scsi_pkt *pkt;
2515 	struct mrsas_header	*hdr;
2516 	con_log(CL_DLEVEL2, (CE_NOTE, "push_pending_pkt(): Called\n"));
2517 	mutex_enter(&instance->cmd_pend_mtx);
2518 	mlist_del_init(&cmd->list);
2519 	mlist_add_tail(&cmd->list, &instance->cmd_pend_list);
2520 	if (cmd->sync_cmd == MRSAS_TRUE) {
2521 		hdr = (struct mrsas_header *)&cmd->frame->hdr;
2522 		if (hdr) {
2523 			con_log(CL_ANN1, (CE_CONT,
2524 			    "push_pending_mfi_pkt: "
2525 			    "cmd %p index %x "
2526 			    "time %llx",
2527 			    (void *)cmd, cmd->index,
2528 			    gethrtime()));
2529 			/* Wait for specified interval	*/
2530 			cmd->drv_pkt_time = ddi_get16(
2531 			    cmd->frame_dma_obj.acc_handle, &hdr->timeout);
2532 			if (cmd->drv_pkt_time < debug_timeout_g)
2533 				cmd->drv_pkt_time = (uint16_t)debug_timeout_g;
2534 			con_log(CL_ANN1, (CE_CONT,
2535 			    "push_pending_pkt(): Called IO Timeout Value %x\n",
2536 			    cmd->drv_pkt_time));
2537 		}
2538 		if (hdr && instance->timeout_id == (timeout_id_t)-1) {
2539 			instance->timeout_id = timeout(io_timeout_checker,
2540 			    (void *) instance, drv_usectohz(MRSAS_1_SECOND));
2541 		}
2542 	} else {
2543 		pkt = cmd->pkt;
2544 		if (pkt) {
2545 			con_log(CL_ANN1, (CE_CONT,
2546 			    "push_pending_mfi_pkt: "
2547 			    "cmd %p index %x pkt %p, "
2548 			    "time %llx",
2549 			    (void *)cmd, cmd->index, (void *)pkt,
2550 			    gethrtime()));
2551 			cmd->drv_pkt_time = (uint16_t)debug_timeout_g;
2552 		}
2553 		if (pkt && instance->timeout_id == (timeout_id_t)-1) {
2554 			instance->timeout_id = timeout(io_timeout_checker,
2555 			    (void *) instance, drv_usectohz(MRSAS_1_SECOND));
2556 		}
2557 	}
2558 
2559 	mutex_exit(&instance->cmd_pend_mtx);
2560 
2561 }
2562 
2563 int
mrsas_print_pending_cmds(struct mrsas_instance * instance)2564 mrsas_print_pending_cmds(struct mrsas_instance *instance)
2565 {
2566 	mlist_t *head = &instance->cmd_pend_list;
2567 	mlist_t *tmp = head;
2568 	struct mrsas_cmd *cmd = NULL;
2569 	struct mrsas_header	*hdr;
2570 	unsigned int		flag = 1;
2571 	struct scsi_pkt *pkt;
2572 	int saved_level;
2573 	int cmd_count = 0;
2574 
2575 	saved_level = debug_level_g;
2576 	debug_level_g = CL_ANN1;
2577 
2578 	dev_err(instance->dip, CE_NOTE,
2579 	    "mrsas_print_pending_cmds(): Called");
2580 
2581 	while (flag) {
2582 		mutex_enter(&instance->cmd_pend_mtx);
2583 		tmp	=	tmp->next;
2584 		if (tmp == head) {
2585 			mutex_exit(&instance->cmd_pend_mtx);
2586 			flag = 0;
2587 			con_log(CL_ANN1, (CE_CONT, "mrsas_print_pending_cmds():"
2588 			    " NO MORE CMDS PENDING....\n"));
2589 			break;
2590 		} else {
2591 			cmd = mlist_entry(tmp, struct mrsas_cmd, list);
2592 			mutex_exit(&instance->cmd_pend_mtx);
2593 			if (cmd) {
2594 				if (cmd->sync_cmd == MRSAS_TRUE) {
2595 					hdr = (struct mrsas_header *)
2596 					    &cmd->frame->hdr;
2597 					if (hdr) {
2598 						con_log(CL_ANN1, (CE_CONT,
2599 						    "print: cmd %p index 0x%x "
2600 						    "drv_pkt_time 0x%x (NO-PKT)"
2601 						    " hdr %p\n", (void *)cmd,
2602 						    cmd->index,
2603 						    cmd->drv_pkt_time,
2604 						    (void *)hdr));
2605 					}
2606 				} else {
2607 					pkt = cmd->pkt;
2608 					if (pkt) {
2609 					con_log(CL_ANN1, (CE_CONT,
2610 					    "print: cmd %p index 0x%x "
2611 					    "drv_pkt_time 0x%x pkt %p \n",
2612 					    (void *)cmd, cmd->index,
2613 					    cmd->drv_pkt_time, (void *)pkt));
2614 					}
2615 				}
2616 
2617 				if (++cmd_count == 1) {
2618 					mrsas_print_cmd_details(instance, cmd,
2619 					    0xDD);
2620 				} else {
2621 					mrsas_print_cmd_details(instance, cmd,
2622 					    1);
2623 				}
2624 
2625 			}
2626 		}
2627 	}
2628 	con_log(CL_ANN1, (CE_CONT, "mrsas_print_pending_cmds(): Done\n"));
2629 
2630 
2631 	debug_level_g = saved_level;
2632 
2633 	return (DDI_SUCCESS);
2634 }
2635 
2636 
2637 int
mrsas_complete_pending_cmds(struct mrsas_instance * instance)2638 mrsas_complete_pending_cmds(struct mrsas_instance *instance)
2639 {
2640 
2641 	struct mrsas_cmd *cmd = NULL;
2642 	struct scsi_pkt *pkt;
2643 	struct mrsas_header *hdr;
2644 
2645 	struct mlist_head		*pos, *next;
2646 
2647 	con_log(CL_ANN1, (CE_NOTE,
2648 	    "mrsas_complete_pending_cmds(): Called"));
2649 
2650 	mutex_enter(&instance->cmd_pend_mtx);
2651 	mlist_for_each_safe(pos, next, &instance->cmd_pend_list) {
2652 		cmd = mlist_entry(pos, struct mrsas_cmd, list);
2653 		if (cmd) {
2654 			pkt = cmd->pkt;
2655 			if (pkt) { /* for IO */
2656 				if (((pkt->pkt_flags & FLAG_NOINTR)
2657 				    == 0) && pkt->pkt_comp) {
2658 					pkt->pkt_reason
2659 					    = CMD_DEV_GONE;
2660 					pkt->pkt_statistics
2661 					    = STAT_DISCON;
2662 					con_log(CL_ANN1, (CE_CONT,
2663 					    "fail and posting to scsa "
2664 					    "cmd %p index %x"
2665 					    " pkt %p "
2666 					    "time : %llx",
2667 					    (void *)cmd, cmd->index,
2668 					    (void *)pkt, gethrtime()));
2669 					(*pkt->pkt_comp)(pkt);
2670 				}
2671 			} else { /* for DCMDS */
2672 				if (cmd->sync_cmd == MRSAS_TRUE) {
2673 				hdr = (struct mrsas_header *)&cmd->frame->hdr;
2674 				con_log(CL_ANN1, (CE_CONT,
2675 				    "posting invalid status to application "
2676 				    "cmd %p index %x"
2677 				    " hdr %p "
2678 				    "time : %llx",
2679 				    (void *)cmd, cmd->index,
2680 				    (void *)hdr, gethrtime()));
2681 				hdr->cmd_status = MFI_STAT_INVALID_STATUS;
2682 				complete_cmd_in_sync_mode(instance, cmd);
2683 				}
2684 			}
2685 			mlist_del_init(&cmd->list);
2686 		} else {
2687 			con_log(CL_ANN1, (CE_CONT,
2688 			    "mrsas_complete_pending_cmds:"
2689 			    "NULL command\n"));
2690 		}
2691 		con_log(CL_ANN1, (CE_CONT,
2692 		    "mrsas_complete_pending_cmds:"
2693 		    "looping for more commands\n"));
2694 	}
2695 	mutex_exit(&instance->cmd_pend_mtx);
2696 
2697 	con_log(CL_ANN1, (CE_CONT, "mrsas_complete_pending_cmds(): DONE\n"));
2698 	return (DDI_SUCCESS);
2699 }
2700 
2701 void
mrsas_print_cmd_details(struct mrsas_instance * instance,struct mrsas_cmd * cmd,int detail)2702 mrsas_print_cmd_details(struct mrsas_instance *instance, struct mrsas_cmd *cmd,
2703     int detail)
2704 {
2705 	struct scsi_pkt *pkt = cmd->pkt;
2706 	Mpi2RaidSCSIIORequest_t *scsi_io = cmd->scsi_io_request;
2707 	int i;
2708 	int saved_level;
2709 	ddi_acc_handle_t acc_handle =
2710 	    instance->mpi2_frame_pool_dma_obj.acc_handle;
2711 
2712 	if (detail == 0xDD) {
2713 		saved_level = debug_level_g;
2714 		debug_level_g = CL_ANN1;
2715 	}
2716 
2717 
2718 	if (instance->tbolt) {
2719 		con_log(CL_ANN1, (CE_CONT, "print_cmd_details: cmd %p "
2720 		    "cmd->index 0x%x SMID 0x%x timer 0x%x sec\n",
2721 		    (void *)cmd, cmd->index, cmd->SMID, cmd->drv_pkt_time));
2722 	} else {
2723 		con_log(CL_ANN1, (CE_CONT, "print_cmd_details: cmd %p "
2724 		    "cmd->index 0x%x timer 0x%x sec\n",
2725 		    (void *)cmd, cmd->index, cmd->drv_pkt_time));
2726 	}
2727 
2728 	if (pkt) {
2729 		con_log(CL_ANN1, (CE_CONT, "scsi_pkt CDB[0]=0x%x",
2730 		    pkt->pkt_cdbp[0]));
2731 	} else {
2732 		con_log(CL_ANN1, (CE_CONT, "NO-PKT"));
2733 	}
2734 
2735 	if ((detail == 0xDD) && instance->tbolt) {
2736 		con_log(CL_ANN1, (CE_CONT, "RAID_SCSI_IO_REQUEST\n"));
2737 		con_log(CL_ANN1, (CE_CONT, "DevHandle=0x%X Function=0x%X "
2738 		    "IoFlags=0x%X SGLFlags=0x%X DataLength=0x%X\n",
2739 		    ddi_get16(acc_handle, &scsi_io->DevHandle),
2740 		    ddi_get8(acc_handle, &scsi_io->Function),
2741 		    ddi_get16(acc_handle, &scsi_io->IoFlags),
2742 		    ddi_get16(acc_handle, &scsi_io->SGLFlags),
2743 		    ddi_get32(acc_handle, &scsi_io->DataLength)));
2744 
2745 		for (i = 0; i < 32; i++) {
2746 			con_log(CL_ANN1, (CE_CONT, "CDB[%d]=0x%x ", i,
2747 			    ddi_get8(acc_handle, &scsi_io->CDB.CDB32[i])));
2748 		}
2749 
2750 		con_log(CL_ANN1, (CE_CONT, "RAID-CONTEXT\n"));
2751 		con_log(CL_ANN1, (CE_CONT, "status=0x%X extStatus=0x%X "
2752 		    "ldTargetId=0x%X timeoutValue=0x%X regLockFlags=0x%X "
2753 		    "RAIDFlags=0x%X regLockRowLBA=0x%" PRIu64
2754 		    " regLockLength=0x%X spanArm=0x%X\n",
2755 		    ddi_get8(acc_handle, &scsi_io->RaidContext.status),
2756 		    ddi_get8(acc_handle, &scsi_io->RaidContext.extStatus),
2757 		    ddi_get16(acc_handle, &scsi_io->RaidContext.ldTargetId),
2758 		    ddi_get16(acc_handle, &scsi_io->RaidContext.timeoutValue),
2759 		    ddi_get8(acc_handle, &scsi_io->RaidContext.regLockFlags),
2760 		    ddi_get8(acc_handle, &scsi_io->RaidContext.RAIDFlags),
2761 		    ddi_get64(acc_handle, &scsi_io->RaidContext.regLockRowLBA),
2762 		    ddi_get32(acc_handle, &scsi_io->RaidContext.regLockLength),
2763 		    ddi_get8(acc_handle, &scsi_io->RaidContext.spanArm)));
2764 	}
2765 
2766 	if (detail == 0xDD) {
2767 		debug_level_g = saved_level;
2768 	}
2769 }
2770 
2771 
2772 int
mrsas_issue_pending_cmds(struct mrsas_instance * instance)2773 mrsas_issue_pending_cmds(struct mrsas_instance *instance)
2774 {
2775 	mlist_t *head	=	&instance->cmd_pend_list;
2776 	mlist_t *tmp	=	head->next;
2777 	struct mrsas_cmd *cmd = NULL;
2778 	struct scsi_pkt *pkt;
2779 
2780 	con_log(CL_ANN1, (CE_NOTE, "mrsas_issue_pending_cmds(): Called"));
2781 	while (tmp != head) {
2782 		mutex_enter(&instance->cmd_pend_mtx);
2783 		cmd = mlist_entry(tmp, struct mrsas_cmd, list);
2784 		tmp = tmp->next;
2785 		mutex_exit(&instance->cmd_pend_mtx);
2786 		if (cmd) {
2787 			con_log(CL_ANN1, (CE_CONT,
2788 			    "mrsas_issue_pending_cmds(): "
2789 			    "Got a cmd: cmd %p index 0x%x drv_pkt_time 0x%x ",
2790 			    (void *)cmd, cmd->index, cmd->drv_pkt_time));
2791 
2792 			/* Reset command timeout value */
2793 			if (cmd->drv_pkt_time < debug_timeout_g)
2794 				cmd->drv_pkt_time = (uint16_t)debug_timeout_g;
2795 
2796 			cmd->retry_count_for_ocr++;
2797 
2798 			dev_err(instance->dip, CE_CONT,
2799 			    "cmd retry count = %d\n",
2800 			    cmd->retry_count_for_ocr);
2801 
2802 			if (cmd->retry_count_for_ocr > IO_RETRY_COUNT) {
2803 				dev_err(instance->dip,
2804 				    CE_WARN, "mrsas_issue_pending_cmds(): "
2805 				    "cmd->retry_count exceeded limit >%d\n",
2806 				    IO_RETRY_COUNT);
2807 				mrsas_print_cmd_details(instance, cmd, 0xDD);
2808 
2809 				dev_err(instance->dip, CE_WARN,
2810 				    "mrsas_issue_pending_cmds():"
2811 				    "Calling KILL Adapter");
2812 				if (instance->tbolt)
2813 					mrsas_tbolt_kill_adapter(instance);
2814 				else
2815 					(void) mrsas_kill_adapter(instance);
2816 				return (DDI_FAILURE);
2817 			}
2818 
2819 			pkt = cmd->pkt;
2820 			if (pkt) {
2821 				con_log(CL_ANN1, (CE_CONT,
2822 				    "PENDING PKT-CMD ISSUE: cmd %p index %x "
2823 				    "pkt %p time %llx",
2824 				    (void *)cmd, cmd->index,
2825 				    (void *)pkt,
2826 				    gethrtime()));
2827 
2828 			} else {
2829 				dev_err(instance->dip, CE_CONT,
2830 				    "mrsas_issue_pending_cmds(): NO-PKT, "
2831 				    "cmd %p index 0x%x drv_pkt_time 0x%x",
2832 				    (void *)cmd, cmd->index, cmd->drv_pkt_time);
2833 			}
2834 
2835 
2836 			if (cmd->sync_cmd == MRSAS_TRUE) {
2837 				dev_err(instance->dip, CE_CONT,
2838 				    "mrsas_issue_pending_cmds(): "
2839 				    "SYNC_CMD == TRUE \n");
2840 				instance->func_ptr->issue_cmd_in_sync_mode(
2841 				    instance, cmd);
2842 			} else {
2843 				instance->func_ptr->issue_cmd(cmd, instance);
2844 			}
2845 		} else {
2846 			con_log(CL_ANN1, (CE_CONT,
2847 			    "mrsas_issue_pending_cmds: NULL command\n"));
2848 		}
2849 		con_log(CL_ANN1, (CE_CONT,
2850 		    "mrsas_issue_pending_cmds:"
2851 		    "looping for more commands"));
2852 	}
2853 	con_log(CL_ANN1, (CE_CONT, "mrsas_issue_pending_cmds(): DONE\n"));
2854 	return (DDI_SUCCESS);
2855 }
2856 
2857 
2858 
2859 /*
2860  * destroy_mfi_frame_pool
2861  */
2862 void
destroy_mfi_frame_pool(struct mrsas_instance * instance)2863 destroy_mfi_frame_pool(struct mrsas_instance *instance)
2864 {
2865 	int		i;
2866 	uint32_t	max_cmd = instance->max_fw_cmds;
2867 
2868 	struct mrsas_cmd	*cmd;
2869 
2870 	/* return all frames to pool */
2871 
2872 	for (i = 0; i < max_cmd; i++) {
2873 
2874 		cmd = instance->cmd_list[i];
2875 
2876 		if (cmd->frame_dma_obj_status == DMA_OBJ_ALLOCATED)
2877 			(void) mrsas_free_dma_obj(instance, cmd->frame_dma_obj);
2878 
2879 		cmd->frame_dma_obj_status  = DMA_OBJ_FREED;
2880 	}
2881 
2882 }
2883 
2884 /*
2885  * create_mfi_frame_pool
2886  */
2887 int
create_mfi_frame_pool(struct mrsas_instance * instance)2888 create_mfi_frame_pool(struct mrsas_instance *instance)
2889 {
2890 	int		i = 0;
2891 	int		cookie_cnt;
2892 	uint16_t	max_cmd;
2893 	uint16_t	sge_sz;
2894 	uint32_t	sgl_sz;
2895 	uint32_t	tot_frame_size;
2896 	struct mrsas_cmd	*cmd;
2897 	int			retval = DDI_SUCCESS;
2898 
2899 	max_cmd = instance->max_fw_cmds;
2900 	sge_sz	= sizeof (struct mrsas_sge_ieee);
2901 	/* calculated the number of 64byte frames required for SGL */
2902 	sgl_sz		= sge_sz * instance->max_num_sge;
2903 	tot_frame_size	= sgl_sz + MRMFI_FRAME_SIZE + SENSE_LENGTH;
2904 
2905 	con_log(CL_DLEVEL3, (CE_NOTE, "create_mfi_frame_pool: "
2906 	    "sgl_sz %x tot_frame_size %x", sgl_sz, tot_frame_size));
2907 
2908 	while (i < max_cmd) {
2909 		cmd = instance->cmd_list[i];
2910 
2911 		cmd->frame_dma_obj.size	= tot_frame_size;
2912 		cmd->frame_dma_obj.dma_attr = mrsas_generic_dma_attr;
2913 		cmd->frame_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
2914 		cmd->frame_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
2915 		cmd->frame_dma_obj.dma_attr.dma_attr_sgllen = 1;
2916 		cmd->frame_dma_obj.dma_attr.dma_attr_align = 64;
2917 
2918 		cookie_cnt = mrsas_alloc_dma_obj(instance, &cmd->frame_dma_obj,
2919 		    (uchar_t)DDI_STRUCTURE_LE_ACC);
2920 
2921 		if (cookie_cnt == -1 || cookie_cnt > 1) {
2922 			dev_err(instance->dip, CE_WARN,
2923 			    "create_mfi_frame_pool: could not alloc.");
2924 			retval = DDI_FAILURE;
2925 			goto mrsas_undo_frame_pool;
2926 		}
2927 
2928 		bzero(cmd->frame_dma_obj.buffer, tot_frame_size);
2929 
2930 		cmd->frame_dma_obj_status = DMA_OBJ_ALLOCATED;
2931 		cmd->frame = (union mrsas_frame *)cmd->frame_dma_obj.buffer;
2932 		cmd->frame_phys_addr =
2933 		    cmd->frame_dma_obj.dma_cookie[0].dmac_address;
2934 
2935 		cmd->sense = (uint8_t *)(((unsigned long)
2936 		    cmd->frame_dma_obj.buffer) +
2937 		    tot_frame_size - SENSE_LENGTH);
2938 		cmd->sense_phys_addr =
2939 		    cmd->frame_dma_obj.dma_cookie[0].dmac_address +
2940 		    tot_frame_size - SENSE_LENGTH;
2941 
2942 		if (!cmd->frame || !cmd->sense) {
2943 			dev_err(instance->dip, CE_WARN,
2944 			    "pci_pool_alloc failed");
2945 			retval = ENOMEM;
2946 			goto mrsas_undo_frame_pool;
2947 		}
2948 
2949 		ddi_put32(cmd->frame_dma_obj.acc_handle,
2950 		    &cmd->frame->io.context, cmd->index);
2951 		i++;
2952 
2953 		con_log(CL_DLEVEL3, (CE_NOTE, "[%x]-%x",
2954 		    cmd->index, cmd->frame_phys_addr));
2955 	}
2956 
2957 	return (DDI_SUCCESS);
2958 
2959 mrsas_undo_frame_pool:
2960 	if (i > 0)
2961 		destroy_mfi_frame_pool(instance);
2962 
2963 	return (retval);
2964 }
2965 
2966 /*
2967  * free_additional_dma_buffer
2968  */
2969 static void
free_additional_dma_buffer(struct mrsas_instance * instance)2970 free_additional_dma_buffer(struct mrsas_instance *instance)
2971 {
2972 	if (instance->mfi_internal_dma_obj.status == DMA_OBJ_ALLOCATED) {
2973 		(void) mrsas_free_dma_obj(instance,
2974 		    instance->mfi_internal_dma_obj);
2975 		instance->mfi_internal_dma_obj.status = DMA_OBJ_FREED;
2976 	}
2977 
2978 	if (instance->mfi_evt_detail_obj.status == DMA_OBJ_ALLOCATED) {
2979 		(void) mrsas_free_dma_obj(instance,
2980 		    instance->mfi_evt_detail_obj);
2981 		instance->mfi_evt_detail_obj.status = DMA_OBJ_FREED;
2982 	}
2983 }
2984 
2985 /*
2986  * alloc_additional_dma_buffer
2987  */
2988 static int
alloc_additional_dma_buffer(struct mrsas_instance * instance)2989 alloc_additional_dma_buffer(struct mrsas_instance *instance)
2990 {
2991 	uint32_t	reply_q_sz;
2992 	uint32_t	internal_buf_size = PAGESIZE*2;
2993 
2994 	/* max cmds plus 1 + producer & consumer */
2995 	reply_q_sz = sizeof (uint32_t) * (instance->max_fw_cmds + 1 + 2);
2996 
2997 	instance->mfi_internal_dma_obj.size = internal_buf_size;
2998 	instance->mfi_internal_dma_obj.dma_attr	= mrsas_generic_dma_attr;
2999 	instance->mfi_internal_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
3000 	instance->mfi_internal_dma_obj.dma_attr.dma_attr_count_max =
3001 	    0xFFFFFFFFU;
3002 	instance->mfi_internal_dma_obj.dma_attr.dma_attr_sgllen	= 1;
3003 
3004 	if (mrsas_alloc_dma_obj(instance, &instance->mfi_internal_dma_obj,
3005 	    (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
3006 		dev_err(instance->dip, CE_WARN,
3007 		    "could not alloc reply queue");
3008 		return (DDI_FAILURE);
3009 	}
3010 
3011 	bzero(instance->mfi_internal_dma_obj.buffer, internal_buf_size);
3012 
3013 	instance->mfi_internal_dma_obj.status |= DMA_OBJ_ALLOCATED;
3014 
3015 	instance->producer = (uint32_t *)((unsigned long)
3016 	    instance->mfi_internal_dma_obj.buffer);
3017 	instance->consumer = (uint32_t *)((unsigned long)
3018 	    instance->mfi_internal_dma_obj.buffer + 4);
3019 	instance->reply_queue = (uint32_t *)((unsigned long)
3020 	    instance->mfi_internal_dma_obj.buffer + 8);
3021 	instance->internal_buf = (caddr_t)(((unsigned long)
3022 	    instance->mfi_internal_dma_obj.buffer) + reply_q_sz + 8);
3023 	instance->internal_buf_dmac_add =
3024 	    instance->mfi_internal_dma_obj.dma_cookie[0].dmac_address +
3025 	    (reply_q_sz + 8);
3026 	instance->internal_buf_size = internal_buf_size -
3027 	    (reply_q_sz + 8);
3028 
3029 	/* allocate evt_detail */
3030 	instance->mfi_evt_detail_obj.size = sizeof (struct mrsas_evt_detail);
3031 	instance->mfi_evt_detail_obj.dma_attr = mrsas_generic_dma_attr;
3032 	instance->mfi_evt_detail_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
3033 	instance->mfi_evt_detail_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
3034 	instance->mfi_evt_detail_obj.dma_attr.dma_attr_sgllen = 1;
3035 	instance->mfi_evt_detail_obj.dma_attr.dma_attr_align = 1;
3036 
3037 	if (mrsas_alloc_dma_obj(instance, &instance->mfi_evt_detail_obj,
3038 	    (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
3039 		dev_err(instance->dip, CE_WARN, "alloc_additional_dma_buffer: "
3040 		    "could not allocate data transfer buffer.");
3041 		goto mrsas_undo_internal_buff;
3042 	}
3043 
3044 	bzero(instance->mfi_evt_detail_obj.buffer,
3045 	    sizeof (struct mrsas_evt_detail));
3046 
3047 	instance->mfi_evt_detail_obj.status |= DMA_OBJ_ALLOCATED;
3048 
3049 	return (DDI_SUCCESS);
3050 
3051 mrsas_undo_internal_buff:
3052 	if (instance->mfi_internal_dma_obj.status == DMA_OBJ_ALLOCATED) {
3053 		(void) mrsas_free_dma_obj(instance,
3054 		    instance->mfi_internal_dma_obj);
3055 		instance->mfi_internal_dma_obj.status = DMA_OBJ_FREED;
3056 	}
3057 
3058 	return (DDI_FAILURE);
3059 }
3060 
3061 
3062 void
mrsas_free_cmd_pool(struct mrsas_instance * instance)3063 mrsas_free_cmd_pool(struct mrsas_instance *instance)
3064 {
3065 	int		i;
3066 	uint32_t	max_cmd;
3067 	size_t		sz;
3068 
3069 	/* already freed */
3070 	if (instance->cmd_list == NULL) {
3071 		return;
3072 	}
3073 
3074 	max_cmd = instance->max_fw_cmds;
3075 
3076 	/* size of cmd_list array */
3077 	sz = sizeof (struct mrsas_cmd *) * max_cmd;
3078 
3079 	/* First free each cmd */
3080 	for (i = 0; i < max_cmd; i++) {
3081 		if (instance->cmd_list[i] != NULL) {
3082 			kmem_free(instance->cmd_list[i],
3083 			    sizeof (struct mrsas_cmd));
3084 		}
3085 
3086 		instance->cmd_list[i] = NULL;
3087 	}
3088 
3089 	/* Now, free cmd_list array */
3090 	if (instance->cmd_list != NULL)
3091 		kmem_free(instance->cmd_list, sz);
3092 
3093 	instance->cmd_list = NULL;
3094 
3095 	INIT_LIST_HEAD(&instance->cmd_pool_list);
3096 	INIT_LIST_HEAD(&instance->cmd_pend_list);
3097 	if (instance->tbolt) {
3098 		INIT_LIST_HEAD(&instance->cmd_app_pool_list);
3099 	} else {
3100 		INIT_LIST_HEAD(&instance->app_cmd_pool_list);
3101 	}
3102 
3103 }
3104 
3105 
3106 /*
3107  * mrsas_alloc_cmd_pool
3108  */
3109 int
mrsas_alloc_cmd_pool(struct mrsas_instance * instance)3110 mrsas_alloc_cmd_pool(struct mrsas_instance *instance)
3111 {
3112 	int		i;
3113 	int		count;
3114 	uint32_t	max_cmd;
3115 	uint32_t	reserve_cmd;
3116 	size_t		sz;
3117 
3118 	struct mrsas_cmd	*cmd;
3119 
3120 	max_cmd = instance->max_fw_cmds;
3121 	con_log(CL_ANN1, (CE_NOTE, "mrsas_alloc_cmd_pool: "
3122 	    "max_cmd %x", max_cmd));
3123 
3124 
3125 	sz = sizeof (struct mrsas_cmd *) * max_cmd;
3126 
3127 	/*
3128 	 * instance->cmd_list is an array of struct mrsas_cmd pointers.
3129 	 * Allocate the dynamic array first and then allocate individual
3130 	 * commands.
3131 	 */
3132 	instance->cmd_list = kmem_zalloc(sz, KM_SLEEP);
3133 	ASSERT(instance->cmd_list);
3134 
3135 	/* create a frame pool and assign one frame to each cmd */
3136 	for (count = 0; count < max_cmd; count++) {
3137 		instance->cmd_list[count] =
3138 		    kmem_zalloc(sizeof (struct mrsas_cmd), KM_SLEEP);
3139 		ASSERT(instance->cmd_list[count]);
3140 	}
3141 
3142 	/* add all the commands to command pool */
3143 
3144 	INIT_LIST_HEAD(&instance->cmd_pool_list);
3145 	INIT_LIST_HEAD(&instance->cmd_pend_list);
3146 	INIT_LIST_HEAD(&instance->app_cmd_pool_list);
3147 
3148 	/*
3149 	 * When max_cmd is lower than MRSAS_APP_RESERVED_CMDS, how do I split
3150 	 * into app_cmd and regular cmd?  For now, just take
3151 	 * max(1/8th of max, 4);
3152 	 */
3153 	reserve_cmd = min(MRSAS_APP_RESERVED_CMDS,
3154 	    max(max_cmd >> 3, MRSAS_APP_MIN_RESERVED_CMDS));
3155 
3156 	for (i = 0; i < reserve_cmd; i++) {
3157 		cmd = instance->cmd_list[i];
3158 		cmd->index = i;
3159 		mlist_add_tail(&cmd->list, &instance->app_cmd_pool_list);
3160 	}
3161 
3162 
3163 	for (i = reserve_cmd; i < max_cmd; i++) {
3164 		cmd = instance->cmd_list[i];
3165 		cmd->index = i;
3166 		mlist_add_tail(&cmd->list, &instance->cmd_pool_list);
3167 	}
3168 
3169 	return (DDI_SUCCESS);
3170 
3171 mrsas_undo_cmds:
3172 	if (count > 0) {
3173 		/* free each cmd */
3174 		for (i = 0; i < count; i++) {
3175 			if (instance->cmd_list[i] != NULL) {
3176 				kmem_free(instance->cmd_list[i],
3177 				    sizeof (struct mrsas_cmd));
3178 			}
3179 			instance->cmd_list[i] = NULL;
3180 		}
3181 	}
3182 
3183 mrsas_undo_cmd_list:
3184 	if (instance->cmd_list != NULL)
3185 		kmem_free(instance->cmd_list, sz);
3186 	instance->cmd_list = NULL;
3187 
3188 	return (DDI_FAILURE);
3189 }
3190 
3191 
3192 /*
3193  * free_space_for_mfi
3194  */
3195 static void
free_space_for_mfi(struct mrsas_instance * instance)3196 free_space_for_mfi(struct mrsas_instance *instance)
3197 {
3198 
3199 	/* already freed */
3200 	if (instance->cmd_list == NULL) {
3201 		return;
3202 	}
3203 
3204 	/* Free additional dma buffer */
3205 	free_additional_dma_buffer(instance);
3206 
3207 	/* Free the MFI frame pool */
3208 	destroy_mfi_frame_pool(instance);
3209 
3210 	/* Free all the commands in the cmd_list */
3211 	/* Free the cmd_list buffer itself */
3212 	mrsas_free_cmd_pool(instance);
3213 }
3214 
3215 /*
3216  * alloc_space_for_mfi
3217  */
3218 static int
alloc_space_for_mfi(struct mrsas_instance * instance)3219 alloc_space_for_mfi(struct mrsas_instance *instance)
3220 {
3221 	/* Allocate command pool (memory for cmd_list & individual commands) */
3222 	if (mrsas_alloc_cmd_pool(instance)) {
3223 		dev_err(instance->dip, CE_WARN, "error creating cmd pool");
3224 		return (DDI_FAILURE);
3225 	}
3226 
3227 	/* Allocate MFI Frame pool */
3228 	if (create_mfi_frame_pool(instance)) {
3229 		dev_err(instance->dip, CE_WARN,
3230 		    "error creating frame DMA pool");
3231 		goto mfi_undo_cmd_pool;
3232 	}
3233 
3234 	/* Allocate additional DMA buffer */
3235 	if (alloc_additional_dma_buffer(instance)) {
3236 		dev_err(instance->dip, CE_WARN,
3237 		    "error creating frame DMA pool");
3238 		goto mfi_undo_frame_pool;
3239 	}
3240 
3241 	return (DDI_SUCCESS);
3242 
3243 mfi_undo_frame_pool:
3244 	destroy_mfi_frame_pool(instance);
3245 
3246 mfi_undo_cmd_pool:
3247 	mrsas_free_cmd_pool(instance);
3248 
3249 	return (DDI_FAILURE);
3250 }
3251 
3252 
3253 
3254 /*
3255  * get_ctrl_info
3256  */
3257 static int
get_ctrl_info(struct mrsas_instance * instance,struct mrsas_ctrl_info * ctrl_info)3258 get_ctrl_info(struct mrsas_instance *instance,
3259     struct mrsas_ctrl_info *ctrl_info)
3260 {
3261 	int	ret = 0;
3262 
3263 	struct mrsas_cmd		*cmd;
3264 	struct mrsas_dcmd_frame	*dcmd;
3265 	struct mrsas_ctrl_info	*ci;
3266 
3267 	if (instance->tbolt) {
3268 		cmd = get_raid_msg_mfi_pkt(instance);
3269 	} else {
3270 		cmd = mrsas_get_mfi_pkt(instance);
3271 	}
3272 
3273 	if (!cmd) {
3274 		con_log(CL_ANN, (CE_WARN,
3275 		    "Failed to get a cmd for ctrl info"));
3276 		DTRACE_PROBE2(info_mfi_err, uint16_t, instance->fw_outstanding,
3277 		    uint16_t, instance->max_fw_cmds);
3278 		return (DDI_FAILURE);
3279 	}
3280 
3281 	/* Clear the frame buffer and assign back the context id */
3282 	(void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
3283 	ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
3284 	    cmd->index);
3285 
3286 	dcmd = &cmd->frame->dcmd;
3287 
3288 	ci = (struct mrsas_ctrl_info *)instance->internal_buf;
3289 
3290 	if (!ci) {
3291 		dev_err(instance->dip, CE_WARN,
3292 		    "Failed to alloc mem for ctrl info");
3293 		mrsas_return_mfi_pkt(instance, cmd);
3294 		return (DDI_FAILURE);
3295 	}
3296 
3297 	(void) memset(ci, 0, sizeof (struct mrsas_ctrl_info));
3298 
3299 	/* for( i = 0; i < DCMD_MBOX_SZ; i++ ) dcmd->mbox.b[i] = 0; */
3300 	(void) memset(dcmd->mbox.b, 0, DCMD_MBOX_SZ);
3301 
3302 	ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->cmd, MFI_CMD_OP_DCMD);
3303 	ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->cmd_status,
3304 	    MFI_CMD_STATUS_POLL_MODE);
3305 	ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->sge_count, 1);
3306 	ddi_put16(cmd->frame_dma_obj.acc_handle, &dcmd->flags,
3307 	    MFI_FRAME_DIR_READ);
3308 	ddi_put16(cmd->frame_dma_obj.acc_handle, &dcmd->timeout, 0);
3309 	ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->data_xfer_len,
3310 	    sizeof (struct mrsas_ctrl_info));
3311 	ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->opcode,
3312 	    MR_DCMD_CTRL_GET_INFO);
3313 	ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->sgl.sge32[0].phys_addr,
3314 	    instance->internal_buf_dmac_add);
3315 	ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->sgl.sge32[0].length,
3316 	    sizeof (struct mrsas_ctrl_info));
3317 
3318 	cmd->frame_count = 1;
3319 
3320 	if (instance->tbolt) {
3321 		mr_sas_tbolt_build_mfi_cmd(instance, cmd);
3322 	}
3323 
3324 	if (!instance->func_ptr->issue_cmd_in_poll_mode(instance, cmd)) {
3325 		ret = 0;
3326 
3327 		ctrl_info->max_request_size = ddi_get32(
3328 		    cmd->frame_dma_obj.acc_handle, &ci->max_request_size);
3329 
3330 		ctrl_info->ld_present_count = ddi_get16(
3331 		    cmd->frame_dma_obj.acc_handle, &ci->ld_present_count);
3332 
3333 		ctrl_info->properties.on_off_properties = ddi_get32(
3334 		    cmd->frame_dma_obj.acc_handle,
3335 		    &ci->properties.on_off_properties);
3336 		ddi_rep_get8(cmd->frame_dma_obj.acc_handle,
3337 		    (uint8_t *)(ctrl_info->product_name),
3338 		    (uint8_t *)(ci->product_name), 80 * sizeof (char),
3339 		    DDI_DEV_AUTOINCR);
3340 		/* should get more members of ci with ddi_get when needed */
3341 	} else {
3342 		dev_err(instance->dip, CE_WARN,
3343 		    "get_ctrl_info: Ctrl info failed");
3344 		ret = -1;
3345 	}
3346 
3347 	if (mrsas_common_check(instance, cmd) != DDI_SUCCESS) {
3348 		ret = -1;
3349 	}
3350 	if (instance->tbolt) {
3351 		return_raid_msg_mfi_pkt(instance, cmd);
3352 	} else {
3353 		mrsas_return_mfi_pkt(instance, cmd);
3354 	}
3355 
3356 	return (ret);
3357 }
3358 
3359 /*
3360  * abort_aen_cmd
3361  */
3362 static int
abort_aen_cmd(struct mrsas_instance * instance,struct mrsas_cmd * cmd_to_abort)3363 abort_aen_cmd(struct mrsas_instance *instance,
3364     struct mrsas_cmd *cmd_to_abort)
3365 {
3366 	int	ret = 0;
3367 
3368 	struct mrsas_cmd		*cmd;
3369 	struct mrsas_abort_frame	*abort_fr;
3370 
3371 	con_log(CL_ANN1, (CE_NOTE, "chkpnt: abort_aen:%d", __LINE__));
3372 
3373 	if (instance->tbolt) {
3374 		cmd = get_raid_msg_mfi_pkt(instance);
3375 	} else {
3376 		cmd = mrsas_get_mfi_pkt(instance);
3377 	}
3378 
3379 	if (!cmd) {
3380 		con_log(CL_ANN1, (CE_WARN,
3381 		    "abort_aen_cmd():Failed to get a cmd for abort_aen_cmd"));
3382 		DTRACE_PROBE2(abort_mfi_err, uint16_t, instance->fw_outstanding,
3383 		    uint16_t, instance->max_fw_cmds);
3384 		return (DDI_FAILURE);
3385 	}
3386 
3387 	/* Clear the frame buffer and assign back the context id */
3388 	(void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
3389 	ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
3390 	    cmd->index);
3391 
3392 	abort_fr = &cmd->frame->abort;
3393 
3394 	/* prepare and issue the abort frame */
3395 	ddi_put8(cmd->frame_dma_obj.acc_handle,
3396 	    &abort_fr->cmd, MFI_CMD_OP_ABORT);
3397 	ddi_put8(cmd->frame_dma_obj.acc_handle, &abort_fr->cmd_status,
3398 	    MFI_CMD_STATUS_SYNC_MODE);
3399 	ddi_put16(cmd->frame_dma_obj.acc_handle, &abort_fr->flags, 0);
3400 	ddi_put32(cmd->frame_dma_obj.acc_handle, &abort_fr->abort_context,
3401 	    cmd_to_abort->index);
3402 	ddi_put32(cmd->frame_dma_obj.acc_handle,
3403 	    &abort_fr->abort_mfi_phys_addr_lo, cmd_to_abort->frame_phys_addr);
3404 	ddi_put32(cmd->frame_dma_obj.acc_handle,
3405 	    &abort_fr->abort_mfi_phys_addr_hi, 0);
3406 
3407 	instance->aen_cmd->abort_aen = 1;
3408 
3409 	cmd->frame_count = 1;
3410 
3411 	if (instance->tbolt) {
3412 		mr_sas_tbolt_build_mfi_cmd(instance, cmd);
3413 	}
3414 
3415 	if (instance->func_ptr->issue_cmd_in_poll_mode(instance, cmd)) {
3416 		con_log(CL_ANN1, (CE_WARN,
3417 		    "abort_aen_cmd: issue_cmd_in_poll_mode failed"));
3418 		ret = -1;
3419 	} else {
3420 		ret = 0;
3421 	}
3422 
3423 	instance->aen_cmd->abort_aen = 1;
3424 	instance->aen_cmd = 0;
3425 
3426 	if (instance->tbolt) {
3427 		return_raid_msg_mfi_pkt(instance, cmd);
3428 	} else {
3429 		mrsas_return_mfi_pkt(instance, cmd);
3430 	}
3431 
3432 	atomic_add_16(&instance->fw_outstanding, (-1));
3433 
3434 	return (ret);
3435 }
3436 
3437 
3438 static int
mrsas_build_init_cmd(struct mrsas_instance * instance,struct mrsas_cmd ** cmd_ptr)3439 mrsas_build_init_cmd(struct mrsas_instance *instance,
3440     struct mrsas_cmd **cmd_ptr)
3441 {
3442 	struct mrsas_cmd		*cmd;
3443 	struct mrsas_init_frame		*init_frame;
3444 	struct mrsas_init_queue_info	*initq_info;
3445 	struct mrsas_drv_ver		drv_ver_info;
3446 
3447 
3448 	/*
3449 	 * Prepare a init frame. Note the init frame points to queue info
3450 	 * structure. Each frame has SGL allocated after first 64 bytes. For
3451 	 * this frame - since we don't need any SGL - we use SGL's space as
3452 	 * queue info structure
3453 	 */
3454 	cmd = *cmd_ptr;
3455 
3456 
3457 	/* Clear the frame buffer and assign back the context id */
3458 	(void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
3459 	ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
3460 	    cmd->index);
3461 
3462 	init_frame = (struct mrsas_init_frame *)cmd->frame;
3463 	initq_info = (struct mrsas_init_queue_info *)
3464 	    ((unsigned long)init_frame + 64);
3465 
3466 	(void) memset(init_frame, 0, MRMFI_FRAME_SIZE);
3467 	(void) memset(initq_info, 0, sizeof (struct mrsas_init_queue_info));
3468 
3469 	ddi_put32(cmd->frame_dma_obj.acc_handle, &initq_info->init_flags, 0);
3470 
3471 	ddi_put32(cmd->frame_dma_obj.acc_handle,
3472 	    &initq_info->reply_queue_entries, instance->max_fw_cmds + 1);
3473 
3474 	ddi_put32(cmd->frame_dma_obj.acc_handle,
3475 	    &initq_info->producer_index_phys_addr_hi, 0);
3476 	ddi_put32(cmd->frame_dma_obj.acc_handle,
3477 	    &initq_info->producer_index_phys_addr_lo,
3478 	    instance->mfi_internal_dma_obj.dma_cookie[0].dmac_address);
3479 
3480 	ddi_put32(cmd->frame_dma_obj.acc_handle,
3481 	    &initq_info->consumer_index_phys_addr_hi, 0);
3482 	ddi_put32(cmd->frame_dma_obj.acc_handle,
3483 	    &initq_info->consumer_index_phys_addr_lo,
3484 	    instance->mfi_internal_dma_obj.dma_cookie[0].dmac_address + 4);
3485 
3486 	ddi_put32(cmd->frame_dma_obj.acc_handle,
3487 	    &initq_info->reply_queue_start_phys_addr_hi, 0);
3488 	ddi_put32(cmd->frame_dma_obj.acc_handle,
3489 	    &initq_info->reply_queue_start_phys_addr_lo,
3490 	    instance->mfi_internal_dma_obj.dma_cookie[0].dmac_address + 8);
3491 
3492 	ddi_put8(cmd->frame_dma_obj.acc_handle,
3493 	    &init_frame->cmd, MFI_CMD_OP_INIT);
3494 	ddi_put8(cmd->frame_dma_obj.acc_handle, &init_frame->cmd_status,
3495 	    MFI_CMD_STATUS_POLL_MODE);
3496 	ddi_put16(cmd->frame_dma_obj.acc_handle, &init_frame->flags, 0);
3497 	ddi_put32(cmd->frame_dma_obj.acc_handle,
3498 	    &init_frame->queue_info_new_phys_addr_lo,
3499 	    cmd->frame_phys_addr + 64);
3500 	ddi_put32(cmd->frame_dma_obj.acc_handle,
3501 	    &init_frame->queue_info_new_phys_addr_hi, 0);
3502 
3503 
3504 	/* fill driver version information */
3505 	fill_up_drv_ver(&drv_ver_info);
3506 
3507 	/* allocate the driver version data transfer buffer */
3508 	instance->drv_ver_dma_obj.size = sizeof (drv_ver_info.drv_ver);
3509 	instance->drv_ver_dma_obj.dma_attr = mrsas_generic_dma_attr;
3510 	instance->drv_ver_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
3511 	instance->drv_ver_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
3512 	instance->drv_ver_dma_obj.dma_attr.dma_attr_sgllen = 1;
3513 	instance->drv_ver_dma_obj.dma_attr.dma_attr_align = 1;
3514 
3515 	if (mrsas_alloc_dma_obj(instance, &instance->drv_ver_dma_obj,
3516 	    (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
3517 		con_log(CL_ANN, (CE_WARN,
3518 		    "init_mfi : Could not allocate driver version buffer."));
3519 		return (DDI_FAILURE);
3520 	}
3521 	/* copy driver version to dma buffer */
3522 	(void) memset(instance->drv_ver_dma_obj.buffer, 0,
3523 	    sizeof (drv_ver_info.drv_ver));
3524 	ddi_rep_put8(cmd->frame_dma_obj.acc_handle,
3525 	    (uint8_t *)drv_ver_info.drv_ver,
3526 	    (uint8_t *)instance->drv_ver_dma_obj.buffer,
3527 	    sizeof (drv_ver_info.drv_ver), DDI_DEV_AUTOINCR);
3528 
3529 
3530 	/* copy driver version physical address to init frame */
3531 	ddi_put64(cmd->frame_dma_obj.acc_handle, &init_frame->driverversion,
3532 	    instance->drv_ver_dma_obj.dma_cookie[0].dmac_address);
3533 
3534 	ddi_put32(cmd->frame_dma_obj.acc_handle, &init_frame->data_xfer_len,
3535 	    sizeof (struct mrsas_init_queue_info));
3536 
3537 	cmd->frame_count = 1;
3538 
3539 	*cmd_ptr = cmd;
3540 
3541 	return (DDI_SUCCESS);
3542 }
3543 
3544 
3545 /*
3546  * mrsas_init_adapter_ppc - Initialize MFI interface adapter.
3547  */
3548 int
mrsas_init_adapter_ppc(struct mrsas_instance * instance)3549 mrsas_init_adapter_ppc(struct mrsas_instance *instance)
3550 {
3551 	struct mrsas_cmd		*cmd;
3552 
3553 	/*
3554 	 * allocate memory for mfi adapter(cmd pool, individual commands, mfi
3555 	 * frames etc
3556 	 */
3557 	if (alloc_space_for_mfi(instance) != DDI_SUCCESS) {
3558 		con_log(CL_ANN, (CE_NOTE,
3559 		    "Error, failed to allocate memory for MFI adapter"));
3560 		return (DDI_FAILURE);
3561 	}
3562 
3563 	/* Build INIT command */
3564 	cmd = mrsas_get_mfi_pkt(instance);
3565 	if (cmd == NULL) {
3566 		DTRACE_PROBE2(init_adapter_mfi_err, uint16_t,
3567 		    instance->fw_outstanding, uint16_t, instance->max_fw_cmds);
3568 		return (DDI_FAILURE);
3569 	}
3570 
3571 	if (mrsas_build_init_cmd(instance, &cmd) != DDI_SUCCESS) {
3572 		con_log(CL_ANN,
3573 		    (CE_NOTE, "Error, failed to build INIT command"));
3574 
3575 		goto fail_undo_alloc_mfi_space;
3576 	}
3577 
3578 	/*
3579 	 * Disable interrupt before sending init frame ( see linux driver code)
3580 	 * send INIT MFI frame in polled mode
3581 	 */
3582 	if (instance->func_ptr->issue_cmd_in_poll_mode(instance, cmd)) {
3583 		con_log(CL_ANN, (CE_WARN, "failed to init firmware"));
3584 		goto fail_fw_init;
3585 	}
3586 
3587 	if (mrsas_common_check(instance, cmd) != DDI_SUCCESS)
3588 		goto fail_fw_init;
3589 	mrsas_return_mfi_pkt(instance, cmd);
3590 
3591 	if (ctio_enable &&
3592 	    (instance->func_ptr->read_fw_status_reg(instance) & 0x04000000)) {
3593 		con_log(CL_ANN, (CE_NOTE, "mr_sas: IEEE SGL's supported"));
3594 		instance->flag_ieee = 1;
3595 	} else {
3596 		instance->flag_ieee = 0;
3597 	}
3598 
3599 	ASSERT(!instance->skinny || instance->flag_ieee);
3600 
3601 	instance->unroll.alloc_space_mfi = 1;
3602 	instance->unroll.verBuff = 1;
3603 
3604 	return (DDI_SUCCESS);
3605 
3606 
3607 fail_fw_init:
3608 	(void) mrsas_free_dma_obj(instance, instance->drv_ver_dma_obj);
3609 
3610 fail_undo_alloc_mfi_space:
3611 	mrsas_return_mfi_pkt(instance, cmd);
3612 	free_space_for_mfi(instance);
3613 
3614 	return (DDI_FAILURE);
3615 
3616 }
3617 
3618 /*
3619  * mrsas_init_adapter - Initialize adapter.
3620  */
3621 int
mrsas_init_adapter(struct mrsas_instance * instance)3622 mrsas_init_adapter(struct mrsas_instance *instance)
3623 {
3624 	struct mrsas_ctrl_info		ctrl_info;
3625 
3626 
3627 	/* we expect the FW state to be READY */
3628 	if (mfi_state_transition_to_ready(instance)) {
3629 		con_log(CL_ANN, (CE_WARN, "mr_sas: F/W is not ready"));
3630 		return (DDI_FAILURE);
3631 	}
3632 
3633 	/* get various operational parameters from status register */
3634 	instance->max_num_sge =
3635 	    (instance->func_ptr->read_fw_status_reg(instance) &
3636 	    0xFF0000) >> 0x10;
3637 	instance->max_num_sge =
3638 	    (instance->max_num_sge > MRSAS_MAX_SGE_CNT) ?
3639 	    MRSAS_MAX_SGE_CNT : instance->max_num_sge;
3640 
3641 	/*
3642 	 * Reduce the max supported cmds by 1. This is to ensure that the
3643 	 * reply_q_sz (1 more than the max cmd that driver may send)
3644 	 * does not exceed max cmds that the FW can support
3645 	 */
3646 	instance->max_fw_cmds =
3647 	    instance->func_ptr->read_fw_status_reg(instance) & 0xFFFF;
3648 	instance->max_fw_cmds = instance->max_fw_cmds - 1;
3649 
3650 
3651 
3652 	/* Initialize adapter */
3653 	if (instance->func_ptr->init_adapter(instance) != DDI_SUCCESS) {
3654 		con_log(CL_ANN,
3655 		    (CE_WARN, "mr_sas: could not initialize adapter"));
3656 		return (DDI_FAILURE);
3657 	}
3658 
3659 	/* gather misc FW related information */
3660 	instance->disable_online_ctrl_reset = 0;
3661 
3662 	if (!get_ctrl_info(instance, &ctrl_info)) {
3663 		instance->max_sectors_per_req = ctrl_info.max_request_size;
3664 		con_log(CL_ANN1, (CE_NOTE,
3665 		    "product name %s ld present %d",
3666 		    ctrl_info.product_name, ctrl_info.ld_present_count));
3667 	} else {
3668 		instance->max_sectors_per_req = instance->max_num_sge *
3669 		    PAGESIZE / 512;
3670 	}
3671 
3672 	if (ctrl_info.properties.on_off_properties & DISABLE_OCR_PROP_FLAG)
3673 		instance->disable_online_ctrl_reset = 1;
3674 
3675 	return (DDI_SUCCESS);
3676 
3677 }
3678 
3679 
3680 
3681 static int
mrsas_issue_init_mfi(struct mrsas_instance * instance)3682 mrsas_issue_init_mfi(struct mrsas_instance *instance)
3683 {
3684 	struct mrsas_cmd		*cmd;
3685 	struct mrsas_init_frame		*init_frame;
3686 	struct mrsas_init_queue_info	*initq_info;
3687 
3688 /*
3689  * Prepare a init frame. Note the init frame points to queue info
3690  * structure. Each frame has SGL allocated after first 64 bytes. For
3691  * this frame - since we don't need any SGL - we use SGL's space as
3692  * queue info structure
3693  */
3694 	con_log(CL_ANN1, (CE_NOTE,
3695 	    "mrsas_issue_init_mfi: entry\n"));
3696 	cmd = get_mfi_app_pkt(instance);
3697 
3698 	if (!cmd) {
3699 		con_log(CL_ANN1, (CE_WARN,
3700 		    "mrsas_issue_init_mfi: get_pkt failed\n"));
3701 		return (DDI_FAILURE);
3702 	}
3703 
3704 	/* Clear the frame buffer and assign back the context id */
3705 	(void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
3706 	ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
3707 	    cmd->index);
3708 
3709 	init_frame = (struct mrsas_init_frame *)cmd->frame;
3710 	initq_info = (struct mrsas_init_queue_info *)
3711 	    ((unsigned long)init_frame + 64);
3712 
3713 	(void) memset(init_frame, 0, MRMFI_FRAME_SIZE);
3714 	(void) memset(initq_info, 0, sizeof (struct mrsas_init_queue_info));
3715 
3716 	ddi_put32(cmd->frame_dma_obj.acc_handle, &initq_info->init_flags, 0);
3717 
3718 	ddi_put32(cmd->frame_dma_obj.acc_handle,
3719 	    &initq_info->reply_queue_entries, instance->max_fw_cmds + 1);
3720 	ddi_put32(cmd->frame_dma_obj.acc_handle,
3721 	    &initq_info->producer_index_phys_addr_hi, 0);
3722 	ddi_put32(cmd->frame_dma_obj.acc_handle,
3723 	    &initq_info->producer_index_phys_addr_lo,
3724 	    instance->mfi_internal_dma_obj.dma_cookie[0].dmac_address);
3725 	ddi_put32(cmd->frame_dma_obj.acc_handle,
3726 	    &initq_info->consumer_index_phys_addr_hi, 0);
3727 	ddi_put32(cmd->frame_dma_obj.acc_handle,
3728 	    &initq_info->consumer_index_phys_addr_lo,
3729 	    instance->mfi_internal_dma_obj.dma_cookie[0].dmac_address + 4);
3730 
3731 	ddi_put32(cmd->frame_dma_obj.acc_handle,
3732 	    &initq_info->reply_queue_start_phys_addr_hi, 0);
3733 	ddi_put32(cmd->frame_dma_obj.acc_handle,
3734 	    &initq_info->reply_queue_start_phys_addr_lo,
3735 	    instance->mfi_internal_dma_obj.dma_cookie[0].dmac_address + 8);
3736 
3737 	ddi_put8(cmd->frame_dma_obj.acc_handle,
3738 	    &init_frame->cmd, MFI_CMD_OP_INIT);
3739 	ddi_put8(cmd->frame_dma_obj.acc_handle, &init_frame->cmd_status,
3740 	    MFI_CMD_STATUS_POLL_MODE);
3741 	ddi_put16(cmd->frame_dma_obj.acc_handle, &init_frame->flags, 0);
3742 	ddi_put32(cmd->frame_dma_obj.acc_handle,
3743 	    &init_frame->queue_info_new_phys_addr_lo,
3744 	    cmd->frame_phys_addr + 64);
3745 	ddi_put32(cmd->frame_dma_obj.acc_handle,
3746 	    &init_frame->queue_info_new_phys_addr_hi, 0);
3747 
3748 	ddi_put32(cmd->frame_dma_obj.acc_handle, &init_frame->data_xfer_len,
3749 	    sizeof (struct mrsas_init_queue_info));
3750 
3751 	cmd->frame_count = 1;
3752 
3753 	/* issue the init frame in polled mode */
3754 	if (instance->func_ptr->issue_cmd_in_poll_mode(instance, cmd)) {
3755 		con_log(CL_ANN1, (CE_WARN,
3756 		    "mrsas_issue_init_mfi():failed to "
3757 		    "init firmware"));
3758 		return_mfi_app_pkt(instance, cmd);
3759 		return (DDI_FAILURE);
3760 	}
3761 
3762 	if (mrsas_common_check(instance, cmd) != DDI_SUCCESS) {
3763 		return_mfi_app_pkt(instance, cmd);
3764 		return (DDI_FAILURE);
3765 	}
3766 
3767 	return_mfi_app_pkt(instance, cmd);
3768 	con_log(CL_ANN1, (CE_CONT, "mrsas_issue_init_mfi: Done"));
3769 
3770 	return (DDI_SUCCESS);
3771 }
3772 /*
3773  * mfi_state_transition_to_ready	: Move the FW to READY state
3774  *
3775  * @reg_set			: MFI register set
3776  */
3777 int
mfi_state_transition_to_ready(struct mrsas_instance * instance)3778 mfi_state_transition_to_ready(struct mrsas_instance *instance)
3779 {
3780 	int		i;
3781 	uint8_t		max_wait;
3782 	uint32_t	fw_ctrl = 0;
3783 	uint32_t	fw_state;
3784 	uint32_t	cur_state;
3785 	uint32_t	cur_abs_reg_val;
3786 	uint32_t	prev_abs_reg_val;
3787 	uint32_t	status;
3788 
3789 	cur_abs_reg_val =
3790 	    instance->func_ptr->read_fw_status_reg(instance);
3791 	fw_state =
3792 	    cur_abs_reg_val & MFI_STATE_MASK;
3793 	con_log(CL_ANN1, (CE_CONT,
3794 	    "mfi_state_transition_to_ready:FW state = 0x%x", fw_state));
3795 
3796 	while (fw_state != MFI_STATE_READY) {
3797 		con_log(CL_ANN, (CE_CONT,
3798 		    "mfi_state_transition_to_ready:FW state%x", fw_state));
3799 
3800 		switch (fw_state) {
3801 		case MFI_STATE_FAULT:
3802 			con_log(CL_ANN, (CE_NOTE,
3803 			    "mr_sas: FW in FAULT state!!"));
3804 
3805 			return (ENODEV);
3806 		case MFI_STATE_WAIT_HANDSHAKE:
3807 			/* set the CLR bit in IMR0 */
3808 			con_log(CL_ANN1, (CE_NOTE,
3809 			    "mr_sas: FW waiting for HANDSHAKE"));
3810 			/*
3811 			 * PCI_Hot Plug: MFI F/W requires
3812 			 * (MFI_INIT_CLEAR_HANDSHAKE|MFI_INIT_HOTPLUG)
3813 			 * to be set
3814 			 */
3815 			/* WR_IB_MSG_0(MFI_INIT_CLEAR_HANDSHAKE, instance); */
3816 			if (!instance->tbolt && !instance->skinny) {
3817 				WR_IB_DOORBELL(MFI_INIT_CLEAR_HANDSHAKE |
3818 				    MFI_INIT_HOTPLUG, instance);
3819 			} else {
3820 				WR_RESERVED0_REGISTER(MFI_INIT_CLEAR_HANDSHAKE |
3821 				    MFI_INIT_HOTPLUG, instance);
3822 			}
3823 			max_wait	= (instance->tbolt == 1) ? 180 : 2;
3824 			cur_state	= MFI_STATE_WAIT_HANDSHAKE;
3825 			break;
3826 		case MFI_STATE_BOOT_MESSAGE_PENDING:
3827 			/* set the CLR bit in IMR0 */
3828 			con_log(CL_ANN1, (CE_NOTE,
3829 			    "mr_sas: FW state boot message pending"));
3830 			/*
3831 			 * PCI_Hot Plug: MFI F/W requires
3832 			 * (MFI_INIT_CLEAR_HANDSHAKE|MFI_INIT_HOTPLUG)
3833 			 * to be set
3834 			 */
3835 			if (!instance->tbolt && !instance->skinny) {
3836 				WR_IB_DOORBELL(MFI_INIT_HOTPLUG, instance);
3837 			} else {
3838 				WR_RESERVED0_REGISTER(MFI_INIT_HOTPLUG,
3839 				    instance);
3840 			}
3841 			max_wait	= (instance->tbolt == 1) ? 180 : 10;
3842 			cur_state	= MFI_STATE_BOOT_MESSAGE_PENDING;
3843 			break;
3844 		case MFI_STATE_OPERATIONAL:
3845 			/* bring it to READY state; assuming max wait 2 secs */
3846 			instance->func_ptr->disable_intr(instance);
3847 			con_log(CL_ANN1, (CE_NOTE,
3848 			    "mr_sas: FW in OPERATIONAL state"));
3849 			/*
3850 			 * PCI_Hot Plug: MFI F/W requires
3851 			 * (MFI_INIT_READY | MFI_INIT_MFIMODE | MFI_INIT_ABORT)
3852 			 * to be set
3853 			 */
3854 			/* WR_IB_DOORBELL(MFI_INIT_READY, instance); */
3855 			if (!instance->tbolt && !instance->skinny) {
3856 				WR_IB_DOORBELL(MFI_RESET_FLAGS, instance);
3857 			} else {
3858 				WR_RESERVED0_REGISTER(MFI_RESET_FLAGS,
3859 				    instance);
3860 
3861 				for (i = 0; i < (10 * 1000); i++) {
3862 					status =
3863 					    RD_RESERVED0_REGISTER(instance);
3864 					if (status & 1) {
3865 						delay(1 *
3866 						    drv_usectohz(MILLISEC));
3867 					} else {
3868 						break;
3869 					}
3870 				}
3871 
3872 			}
3873 			max_wait	= (instance->tbolt == 1) ? 180 : 10;
3874 			cur_state	= MFI_STATE_OPERATIONAL;
3875 			break;
3876 		case MFI_STATE_UNDEFINED:
3877 			/* this state should not last for more than 2 seconds */
3878 			con_log(CL_ANN1, (CE_NOTE, "FW state undefined"));
3879 
3880 			max_wait	= (instance->tbolt == 1) ? 180 : 2;
3881 			cur_state	= MFI_STATE_UNDEFINED;
3882 			break;
3883 		case MFI_STATE_BB_INIT:
3884 			max_wait	= (instance->tbolt == 1) ? 180 : 2;
3885 			cur_state	= MFI_STATE_BB_INIT;
3886 			break;
3887 		case MFI_STATE_FW_INIT:
3888 			max_wait	= (instance->tbolt == 1) ? 180 : 2;
3889 			cur_state	= MFI_STATE_FW_INIT;
3890 			break;
3891 		case MFI_STATE_FW_INIT_2:
3892 			max_wait	= 180;
3893 			cur_state	= MFI_STATE_FW_INIT_2;
3894 			break;
3895 		case MFI_STATE_DEVICE_SCAN:
3896 			max_wait	= 180;
3897 			cur_state	= MFI_STATE_DEVICE_SCAN;
3898 			prev_abs_reg_val = cur_abs_reg_val;
3899 			con_log(CL_NONE, (CE_NOTE,
3900 			    "Device scan in progress ...\n"));
3901 			break;
3902 		case MFI_STATE_FLUSH_CACHE:
3903 			max_wait	= 180;
3904 			cur_state	= MFI_STATE_FLUSH_CACHE;
3905 			break;
3906 		default:
3907 			con_log(CL_ANN1, (CE_NOTE,
3908 			    "mr_sas: Unknown state 0x%x", fw_state));
3909 			return (ENODEV);
3910 		}
3911 
3912 		/* the cur_state should not last for more than max_wait secs */
3913 		for (i = 0; i < (max_wait * MILLISEC); i++) {
3914 			/* fw_state = RD_OB_MSG_0(instance) & MFI_STATE_MASK; */
3915 			cur_abs_reg_val =
3916 			    instance->func_ptr->read_fw_status_reg(instance);
3917 			fw_state = cur_abs_reg_val & MFI_STATE_MASK;
3918 
3919 			if (fw_state == cur_state) {
3920 				delay(1 * drv_usectohz(MILLISEC));
3921 			} else {
3922 				break;
3923 			}
3924 		}
3925 		if (fw_state == MFI_STATE_DEVICE_SCAN) {
3926 			if (prev_abs_reg_val != cur_abs_reg_val) {
3927 				continue;
3928 			}
3929 		}
3930 
3931 		/* return error if fw_state hasn't changed after max_wait */
3932 		if (fw_state == cur_state) {
3933 			con_log(CL_ANN1, (CE_WARN,
3934 			    "FW state hasn't changed in %d secs", max_wait));
3935 			return (ENODEV);
3936 		}
3937 	};
3938 
3939 	/* This may also need to apply to Skinny, but for now, don't worry. */
3940 	if (!instance->tbolt && !instance->skinny) {
3941 		fw_ctrl = RD_IB_DOORBELL(instance);
3942 		con_log(CL_ANN1, (CE_CONT,
3943 		    "mfi_state_transition_to_ready:FW ctrl = 0x%x", fw_ctrl));
3944 
3945 		/*
3946 		 * Write 0xF to the doorbell register to do the following.
3947 		 * - Abort all outstanding commands (bit 0).
3948 		 * - Transition from OPERATIONAL to READY state (bit 1).
3949 		 * - Discard (possible) low MFA posted in 64-bit mode (bit-2).
3950 		 * - Set to release FW to continue running (i.e. BIOS handshake
3951 		 *   (bit 3).
3952 		 */
3953 		WR_IB_DOORBELL(0xF, instance);
3954 	}
3955 
3956 	if (mrsas_check_acc_handle(instance->regmap_handle) != DDI_SUCCESS) {
3957 		return (EIO);
3958 	}
3959 
3960 	return (DDI_SUCCESS);
3961 }
3962 
3963 /*
3964  * get_seq_num
3965  */
3966 static int
get_seq_num(struct mrsas_instance * instance,struct mrsas_evt_log_info * eli)3967 get_seq_num(struct mrsas_instance *instance,
3968     struct mrsas_evt_log_info *eli)
3969 {
3970 	int	ret = DDI_SUCCESS;
3971 
3972 	dma_obj_t			dcmd_dma_obj;
3973 	struct mrsas_cmd		*cmd;
3974 	struct mrsas_dcmd_frame		*dcmd;
3975 	struct mrsas_evt_log_info *eli_tmp;
3976 	if (instance->tbolt) {
3977 		cmd = get_raid_msg_mfi_pkt(instance);
3978 	} else {
3979 		cmd = mrsas_get_mfi_pkt(instance);
3980 	}
3981 
3982 	if (!cmd) {
3983 		dev_err(instance->dip, CE_WARN, "failed to get a cmd");
3984 		DTRACE_PROBE2(seq_num_mfi_err, uint16_t,
3985 		    instance->fw_outstanding, uint16_t, instance->max_fw_cmds);
3986 		return (ENOMEM);
3987 	}
3988 
3989 	/* Clear the frame buffer and assign back the context id */
3990 	(void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
3991 	ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
3992 	    cmd->index);
3993 
3994 	dcmd = &cmd->frame->dcmd;
3995 
3996 	/* allocate the data transfer buffer */
3997 	dcmd_dma_obj.size = sizeof (struct mrsas_evt_log_info);
3998 	dcmd_dma_obj.dma_attr = mrsas_generic_dma_attr;
3999 	dcmd_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
4000 	dcmd_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
4001 	dcmd_dma_obj.dma_attr.dma_attr_sgllen = 1;
4002 	dcmd_dma_obj.dma_attr.dma_attr_align = 1;
4003 
4004 	if (mrsas_alloc_dma_obj(instance, &dcmd_dma_obj,
4005 	    (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
4006 		dev_err(instance->dip, CE_WARN,
4007 		    "get_seq_num: could not allocate data transfer buffer.");
4008 		return (DDI_FAILURE);
4009 	}
4010 
4011 	(void) memset(dcmd_dma_obj.buffer, 0,
4012 	    sizeof (struct mrsas_evt_log_info));
4013 
4014 	(void) memset(dcmd->mbox.b, 0, DCMD_MBOX_SZ);
4015 
4016 	ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->cmd, MFI_CMD_OP_DCMD);
4017 	ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->cmd_status, 0);
4018 	ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->sge_count, 1);
4019 	ddi_put16(cmd->frame_dma_obj.acc_handle, &dcmd->flags,
4020 	    MFI_FRAME_DIR_READ);
4021 	ddi_put16(cmd->frame_dma_obj.acc_handle, &dcmd->timeout, 0);
4022 	ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->data_xfer_len,
4023 	    sizeof (struct mrsas_evt_log_info));
4024 	ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->opcode,
4025 	    MR_DCMD_CTRL_EVENT_GET_INFO);
4026 	ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->sgl.sge32[0].length,
4027 	    sizeof (struct mrsas_evt_log_info));
4028 	ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->sgl.sge32[0].phys_addr,
4029 	    dcmd_dma_obj.dma_cookie[0].dmac_address);
4030 
4031 	cmd->sync_cmd = MRSAS_TRUE;
4032 	cmd->frame_count = 1;
4033 
4034 	if (instance->tbolt) {
4035 		mr_sas_tbolt_build_mfi_cmd(instance, cmd);
4036 	}
4037 
4038 	if (instance->func_ptr->issue_cmd_in_sync_mode(instance, cmd)) {
4039 		dev_err(instance->dip, CE_WARN, "get_seq_num: "
4040 		    "failed to issue MRSAS_DCMD_CTRL_EVENT_GET_INFO");
4041 		ret = DDI_FAILURE;
4042 	} else {
4043 		eli_tmp = (struct mrsas_evt_log_info *)dcmd_dma_obj.buffer;
4044 		eli->newest_seq_num = ddi_get32(cmd->frame_dma_obj.acc_handle,
4045 		    &eli_tmp->newest_seq_num);
4046 		ret = DDI_SUCCESS;
4047 	}
4048 
4049 	if (mrsas_free_dma_obj(instance, dcmd_dma_obj) != DDI_SUCCESS)
4050 		ret = DDI_FAILURE;
4051 
4052 	if (instance->tbolt) {
4053 		return_raid_msg_mfi_pkt(instance, cmd);
4054 	} else {
4055 		mrsas_return_mfi_pkt(instance, cmd);
4056 	}
4057 
4058 	return (ret);
4059 }
4060 
4061 /*
4062  * start_mfi_aen
4063  */
4064 static int
start_mfi_aen(struct mrsas_instance * instance)4065 start_mfi_aen(struct mrsas_instance *instance)
4066 {
4067 	int	ret = 0;
4068 
4069 	struct mrsas_evt_log_info	eli;
4070 	union mrsas_evt_class_locale	class_locale;
4071 
4072 	/* get the latest sequence number from FW */
4073 	(void) memset(&eli, 0, sizeof (struct mrsas_evt_log_info));
4074 
4075 	if (get_seq_num(instance, &eli)) {
4076 		dev_err(instance->dip, CE_WARN,
4077 		    "start_mfi_aen: failed to get seq num");
4078 		return (-1);
4079 	}
4080 
4081 	/* register AEN with FW for latest sequence number plus 1 */
4082 	class_locale.members.reserved	= 0;
4083 	class_locale.members.locale	= LE_16(MR_EVT_LOCALE_ALL);
4084 	class_locale.members.class	= MR_EVT_CLASS_INFO;
4085 	class_locale.word	= LE_32(class_locale.word);
4086 	ret = register_mfi_aen(instance, eli.newest_seq_num + 1,
4087 	    class_locale.word);
4088 
4089 	if (ret) {
4090 		dev_err(instance->dip, CE_WARN,
4091 		    "start_mfi_aen: aen registration failed");
4092 		return (-1);
4093 	}
4094 
4095 
4096 	return (ret);
4097 }
4098 
4099 /*
4100  * flush_cache
4101  */
4102 static void
flush_cache(struct mrsas_instance * instance)4103 flush_cache(struct mrsas_instance *instance)
4104 {
4105 	struct mrsas_cmd		*cmd = NULL;
4106 	struct mrsas_dcmd_frame		*dcmd;
4107 	if (instance->tbolt) {
4108 		cmd = get_raid_msg_mfi_pkt(instance);
4109 	} else {
4110 		cmd = mrsas_get_mfi_pkt(instance);
4111 	}
4112 
4113 	if (!cmd) {
4114 		con_log(CL_ANN1, (CE_WARN,
4115 		    "flush_cache():Failed to get a cmd for flush_cache"));
4116 		DTRACE_PROBE2(flush_cache_err, uint16_t,
4117 		    instance->fw_outstanding, uint16_t, instance->max_fw_cmds);
4118 		return;
4119 	}
4120 
4121 	/* Clear the frame buffer and assign back the context id */
4122 	(void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
4123 	ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
4124 	    cmd->index);
4125 
4126 	dcmd = &cmd->frame->dcmd;
4127 
4128 	(void) memset(dcmd->mbox.b, 0, DCMD_MBOX_SZ);
4129 
4130 	ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->cmd, MFI_CMD_OP_DCMD);
4131 	ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->cmd_status, 0x0);
4132 	ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->sge_count, 0);
4133 	ddi_put16(cmd->frame_dma_obj.acc_handle, &dcmd->flags,
4134 	    MFI_FRAME_DIR_NONE);
4135 	ddi_put16(cmd->frame_dma_obj.acc_handle, &dcmd->timeout, 0);
4136 	ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->data_xfer_len, 0);
4137 	ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->opcode,
4138 	    MR_DCMD_CTRL_CACHE_FLUSH);
4139 	ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->mbox.b[0],
4140 	    MR_FLUSH_CTRL_CACHE | MR_FLUSH_DISK_CACHE);
4141 
4142 	cmd->frame_count = 1;
4143 
4144 	if (instance->tbolt) {
4145 		mr_sas_tbolt_build_mfi_cmd(instance, cmd);
4146 	}
4147 
4148 	if (instance->func_ptr->issue_cmd_in_poll_mode(instance, cmd)) {
4149 		con_log(CL_ANN1, (CE_WARN,
4150 	    "flush_cache: failed to issue MFI_DCMD_CTRL_CACHE_FLUSH"));
4151 	}
4152 	con_log(CL_ANN1, (CE_CONT, "flush_cache done"));
4153 	if (instance->tbolt) {
4154 		return_raid_msg_mfi_pkt(instance, cmd);
4155 	} else {
4156 		mrsas_return_mfi_pkt(instance, cmd);
4157 	}
4158 
4159 }
4160 
4161 /*
4162  * service_mfi_aen-	Completes an AEN command
4163  * @instance:			Adapter soft state
4164  * @cmd:			Command to be completed
4165  *
4166  */
4167 void
service_mfi_aen(struct mrsas_instance * instance,struct mrsas_cmd * cmd)4168 service_mfi_aen(struct mrsas_instance *instance, struct mrsas_cmd *cmd)
4169 {
4170 	uint32_t	seq_num;
4171 	struct mrsas_evt_detail *evt_detail =
4172 	    (struct mrsas_evt_detail *)instance->mfi_evt_detail_obj.buffer;
4173 	int		rval = 0;
4174 	int		tgt = 0;
4175 	uint8_t		dtype;
4176 	mrsas_pd_address_t	*pd_addr;
4177 	ddi_acc_handle_t		acc_handle;
4178 
4179 	con_log(CL_ANN, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
4180 
4181 	acc_handle = cmd->frame_dma_obj.acc_handle;
4182 	cmd->cmd_status = ddi_get8(acc_handle, &cmd->frame->io.cmd_status);
4183 	if (cmd->cmd_status == ENODATA) {
4184 		cmd->cmd_status = 0;
4185 	}
4186 
4187 	/*
4188 	 * log the MFI AEN event to the sysevent queue so that
4189 	 * application will get noticed
4190 	 */
4191 	if (ddi_log_sysevent(instance->dip, DDI_VENDOR_LSI, "LSIMEGA", "SAS",
4192 	    NULL, NULL, DDI_NOSLEEP) != DDI_SUCCESS) {
4193 		int	instance_no = ddi_get_instance(instance->dip);
4194 		con_log(CL_ANN, (CE_WARN,
4195 		    "mr_sas%d: Failed to log AEN event", instance_no));
4196 	}
4197 	/*
4198 	 * Check for any ld devices that has changed state. i.e. online
4199 	 * or offline.
4200 	 */
4201 	con_log(CL_ANN1, (CE_CONT,
4202 	    "AEN: code = %x class = %x locale = %x args = %x",
4203 	    ddi_get32(acc_handle, &evt_detail->code),
4204 	    evt_detail->cl.members.class,
4205 	    ddi_get16(acc_handle, &evt_detail->cl.members.locale),
4206 	    ddi_get8(acc_handle, &evt_detail->arg_type)));
4207 
4208 	switch (ddi_get32(acc_handle, &evt_detail->code)) {
4209 	case MR_EVT_CFG_CLEARED: {
4210 		for (tgt = 0; tgt < MRDRV_MAX_LD; tgt++) {
4211 			if (instance->mr_ld_list[tgt].dip != NULL) {
4212 				mutex_enter(&instance->config_dev_mtx);
4213 				instance->mr_ld_list[tgt].flag =
4214 				    (uint8_t)~MRDRV_TGT_VALID;
4215 				mutex_exit(&instance->config_dev_mtx);
4216 				rval = mrsas_service_evt(instance, tgt, 0,
4217 				    MRSAS_EVT_UNCONFIG_TGT, 0);
4218 				con_log(CL_ANN1, (CE_WARN,
4219 				    "mr_sas: CFG CLEARED AEN rval = %d "
4220 				    "tgt id = %d", rval, tgt));
4221 			}
4222 		}
4223 		break;
4224 	}
4225 
4226 	case MR_EVT_LD_DELETED: {
4227 		tgt = ddi_get16(acc_handle, &evt_detail->args.ld.target_id);
4228 		mutex_enter(&instance->config_dev_mtx);
4229 		instance->mr_ld_list[tgt].flag = (uint8_t)~MRDRV_TGT_VALID;
4230 		mutex_exit(&instance->config_dev_mtx);
4231 		rval = mrsas_service_evt(instance,
4232 		    ddi_get16(acc_handle, &evt_detail->args.ld.target_id), 0,
4233 		    MRSAS_EVT_UNCONFIG_TGT, 0);
4234 		con_log(CL_ANN1, (CE_WARN, "mr_sas: LD DELETED AEN rval = %d "
4235 		    "tgt id = %d index = %d", rval,
4236 		    ddi_get16(acc_handle, &evt_detail->args.ld.target_id),
4237 		    ddi_get8(acc_handle, &evt_detail->args.ld.ld_index)));
4238 		break;
4239 	} /* End of MR_EVT_LD_DELETED */
4240 
4241 	case MR_EVT_LD_CREATED: {
4242 		rval = mrsas_service_evt(instance,
4243 		    ddi_get16(acc_handle, &evt_detail->args.ld.target_id), 0,
4244 		    MRSAS_EVT_CONFIG_TGT, 0);
4245 		con_log(CL_ANN1, (CE_WARN, "mr_sas: LD CREATED AEN rval = %d "
4246 		    "tgt id = %d index = %d", rval,
4247 		    ddi_get16(acc_handle, &evt_detail->args.ld.target_id),
4248 		    ddi_get8(acc_handle, &evt_detail->args.ld.ld_index)));
4249 		break;
4250 	} /* End of MR_EVT_LD_CREATED */
4251 
4252 	case MR_EVT_PD_REMOVED_EXT: {
4253 		if (instance->tbolt || instance->skinny) {
4254 			pd_addr = &evt_detail->args.pd_addr;
4255 			dtype = pd_addr->scsi_dev_type;
4256 			con_log(CL_DLEVEL1, (CE_NOTE,
4257 			    " MR_EVT_PD_REMOVED_EXT: dtype = %x,"
4258 			    " arg_type = %d ", dtype, evt_detail->arg_type));
4259 			tgt = ddi_get16(acc_handle,
4260 			    &evt_detail->args.pd.device_id);
4261 			mutex_enter(&instance->config_dev_mtx);
4262 			instance->mr_tbolt_pd_list[tgt].flag =
4263 			    (uint8_t)~MRDRV_TGT_VALID;
4264 			mutex_exit(&instance->config_dev_mtx);
4265 			rval = mrsas_service_evt(instance, ddi_get16(
4266 			    acc_handle, &evt_detail->args.pd.device_id),
4267 			    1, MRSAS_EVT_UNCONFIG_TGT, 0);
4268 			con_log(CL_ANN1, (CE_WARN, "mr_sas: PD_REMOVED:"
4269 			    "rval = %d tgt id = %d ", rval,
4270 			    ddi_get16(acc_handle,
4271 			    &evt_detail->args.pd.device_id)));
4272 		}
4273 		break;
4274 	} /* End of MR_EVT_PD_REMOVED_EXT */
4275 
4276 	case MR_EVT_PD_INSERTED_EXT: {
4277 		if (instance->tbolt || instance->skinny) {
4278 			rval = mrsas_service_evt(instance,
4279 			    ddi_get16(acc_handle,
4280 			    &evt_detail->args.pd.device_id),
4281 			    1, MRSAS_EVT_CONFIG_TGT, 0);
4282 			con_log(CL_ANN1, (CE_WARN, "mr_sas: PD_INSERTEDi_EXT:"
4283 			    "rval = %d tgt id = %d ", rval,
4284 			    ddi_get16(acc_handle,
4285 			    &evt_detail->args.pd.device_id)));
4286 		}
4287 		break;
4288 	} /* End of MR_EVT_PD_INSERTED_EXT */
4289 
4290 	case MR_EVT_PD_STATE_CHANGE: {
4291 		if (instance->tbolt || instance->skinny) {
4292 			tgt = ddi_get16(acc_handle,
4293 			    &evt_detail->args.pd.device_id);
4294 			if ((evt_detail->args.pd_state.prevState ==
4295 			    PD_SYSTEM) &&
4296 			    (evt_detail->args.pd_state.newState != PD_SYSTEM)) {
4297 				mutex_enter(&instance->config_dev_mtx);
4298 				instance->mr_tbolt_pd_list[tgt].flag =
4299 				    (uint8_t)~MRDRV_TGT_VALID;
4300 				mutex_exit(&instance->config_dev_mtx);
4301 				rval = mrsas_service_evt(instance,
4302 				    ddi_get16(acc_handle,
4303 				    &evt_detail->args.pd.device_id),
4304 				    1, MRSAS_EVT_UNCONFIG_TGT, 0);
4305 				con_log(CL_ANN1, (CE_WARN, "mr_sas: PD_REMOVED:"
4306 				    "rval = %d tgt id = %d ", rval,
4307 				    ddi_get16(acc_handle,
4308 				    &evt_detail->args.pd.device_id)));
4309 				break;
4310 			}
4311 			if ((evt_detail->args.pd_state.prevState
4312 			    == UNCONFIGURED_GOOD) &&
4313 			    (evt_detail->args.pd_state.newState == PD_SYSTEM)) {
4314 				rval = mrsas_service_evt(instance,
4315 				    ddi_get16(acc_handle,
4316 				    &evt_detail->args.pd.device_id),
4317 				    1, MRSAS_EVT_CONFIG_TGT, 0);
4318 				con_log(CL_ANN1, (CE_WARN,
4319 				    "mr_sas: PD_INSERTED: rval = %d "
4320 				    " tgt id = %d ", rval,
4321 				    ddi_get16(acc_handle,
4322 				    &evt_detail->args.pd.device_id)));
4323 				break;
4324 			}
4325 		}
4326 		break;
4327 	}
4328 
4329 	} /* End of Main Switch */
4330 
4331 	/* get copy of seq_num and class/locale for re-registration */
4332 	seq_num = ddi_get32(acc_handle, &evt_detail->seq_num);
4333 	seq_num++;
4334 	(void) memset(instance->mfi_evt_detail_obj.buffer, 0,
4335 	    sizeof (struct mrsas_evt_detail));
4336 
4337 	ddi_put8(acc_handle, &cmd->frame->dcmd.cmd_status, 0x0);
4338 	ddi_put32(acc_handle, &cmd->frame->dcmd.mbox.w[0], seq_num);
4339 
4340 	instance->aen_seq_num = seq_num;
4341 
4342 	cmd->frame_count = 1;
4343 
4344 	cmd->retry_count_for_ocr = 0;
4345 	cmd->drv_pkt_time = 0;
4346 
4347 	/* Issue the aen registration frame */
4348 	instance->func_ptr->issue_cmd(cmd, instance);
4349 }
4350 
4351 /*
4352  * complete_cmd_in_sync_mode -	Completes an internal command
4353  * @instance:			Adapter soft state
4354  * @cmd:			Command to be completed
4355  *
4356  * The issue_cmd_in_sync_mode() function waits for a command to complete
4357  * after it issues a command. This function wakes up that waiting routine by
4358  * calling wake_up() on the wait queue.
4359  */
4360 static void
complete_cmd_in_sync_mode(struct mrsas_instance * instance,struct mrsas_cmd * cmd)4361 complete_cmd_in_sync_mode(struct mrsas_instance *instance,
4362     struct mrsas_cmd *cmd)
4363 {
4364 	cmd->cmd_status = ddi_get8(cmd->frame_dma_obj.acc_handle,
4365 	    &cmd->frame->io.cmd_status);
4366 
4367 	cmd->sync_cmd = MRSAS_FALSE;
4368 
4369 	con_log(CL_ANN1, (CE_NOTE, "complete_cmd_in_sync_mode called %p \n",
4370 	    (void *)cmd));
4371 
4372 	mutex_enter(&instance->int_cmd_mtx);
4373 	if (cmd->cmd_status == ENODATA) {
4374 		cmd->cmd_status = 0;
4375 	}
4376 	cv_broadcast(&instance->int_cmd_cv);
4377 	mutex_exit(&instance->int_cmd_mtx);
4378 
4379 }
4380 
4381 /*
4382  * Call this function inside mrsas_softintr.
4383  * mrsas_initiate_ocr_if_fw_is_faulty  - Initiates OCR if FW status is faulty
4384  * @instance:			Adapter soft state
4385  */
4386 
4387 static uint32_t
mrsas_initiate_ocr_if_fw_is_faulty(struct mrsas_instance * instance)4388 mrsas_initiate_ocr_if_fw_is_faulty(struct mrsas_instance *instance)
4389 {
4390 	uint32_t	cur_abs_reg_val;
4391 	uint32_t	fw_state;
4392 
4393 	cur_abs_reg_val =  instance->func_ptr->read_fw_status_reg(instance);
4394 	fw_state = cur_abs_reg_val & MFI_STATE_MASK;
4395 	if (fw_state == MFI_STATE_FAULT) {
4396 		if (instance->disable_online_ctrl_reset == 1) {
4397 			dev_err(instance->dip, CE_WARN,
4398 			    "mrsas_initiate_ocr_if_fw_is_faulty: "
4399 			    "FW in Fault state, detected in ISR: "
4400 			    "FW doesn't support ocr ");
4401 
4402 			return (ADAPTER_RESET_NOT_REQUIRED);
4403 		} else {
4404 			con_log(CL_ANN, (CE_NOTE,
4405 			    "mrsas_initiate_ocr_if_fw_is_faulty: FW in Fault "
4406 			    "state, detected in ISR: FW supports ocr "));
4407 
4408 			return (ADAPTER_RESET_REQUIRED);
4409 		}
4410 	}
4411 
4412 	return (ADAPTER_RESET_NOT_REQUIRED);
4413 }
4414 
4415 /*
4416  * mrsas_softintr - The Software ISR
4417  * @param arg	: HBA soft state
4418  *
4419  * called from high-level interrupt if hi-level interrupt are not there,
4420  * otherwise triggered as a soft interrupt
4421  */
4422 static uint_t
mrsas_softintr(struct mrsas_instance * instance)4423 mrsas_softintr(struct mrsas_instance *instance)
4424 {
4425 	struct scsi_pkt		*pkt;
4426 	struct scsa_cmd		*acmd;
4427 	struct mrsas_cmd	*cmd;
4428 	struct mlist_head	*pos, *next;
4429 	mlist_t			process_list;
4430 	struct mrsas_header	*hdr;
4431 	struct scsi_arq_status	*arqstat;
4432 
4433 	con_log(CL_ANN1, (CE_NOTE, "mrsas_softintr() called."));
4434 
4435 	ASSERT(instance);
4436 
4437 	mutex_enter(&instance->completed_pool_mtx);
4438 
4439 	if (mlist_empty(&instance->completed_pool_list)) {
4440 		mutex_exit(&instance->completed_pool_mtx);
4441 		return (DDI_INTR_CLAIMED);
4442 	}
4443 
4444 	instance->softint_running = 1;
4445 
4446 	INIT_LIST_HEAD(&process_list);
4447 	mlist_splice(&instance->completed_pool_list, &process_list);
4448 	INIT_LIST_HEAD(&instance->completed_pool_list);
4449 
4450 	mutex_exit(&instance->completed_pool_mtx);
4451 
4452 	/* perform all callbacks first, before releasing the SCBs */
4453 	mlist_for_each_safe(pos, next, &process_list) {
4454 		cmd = mlist_entry(pos, struct mrsas_cmd, list);
4455 
4456 		/* syncronize the Cmd frame for the controller */
4457 		(void) ddi_dma_sync(cmd->frame_dma_obj.dma_handle,
4458 		    0, 0, DDI_DMA_SYNC_FORCPU);
4459 
4460 		if (mrsas_check_dma_handle(cmd->frame_dma_obj.dma_handle) !=
4461 		    DDI_SUCCESS) {
4462 			mrsas_fm_ereport(instance, DDI_FM_DEVICE_NO_RESPONSE);
4463 			ddi_fm_service_impact(instance->dip, DDI_SERVICE_LOST);
4464 			con_log(CL_ANN1, (CE_WARN,
4465 			    "mrsas_softintr: "
4466 			    "FMA check reports DMA handle failure"));
4467 			return (DDI_INTR_CLAIMED);
4468 		}
4469 
4470 		hdr = &cmd->frame->hdr;
4471 
4472 		/* remove the internal command from the process list */
4473 		mlist_del_init(&cmd->list);
4474 
4475 		switch (ddi_get8(cmd->frame_dma_obj.acc_handle, &hdr->cmd)) {
4476 		case MFI_CMD_OP_PD_SCSI:
4477 		case MFI_CMD_OP_LD_SCSI:
4478 		case MFI_CMD_OP_LD_READ:
4479 		case MFI_CMD_OP_LD_WRITE:
4480 			/*
4481 			 * MFI_CMD_OP_PD_SCSI and MFI_CMD_OP_LD_SCSI
4482 			 * could have been issued either through an
4483 			 * IO path or an IOCTL path. If it was via IOCTL,
4484 			 * we will send it to internal completion.
4485 			 */
4486 			if (cmd->sync_cmd == MRSAS_TRUE) {
4487 				complete_cmd_in_sync_mode(instance, cmd);
4488 				break;
4489 			}
4490 
4491 			/* regular commands */
4492 			acmd =	cmd->cmd;
4493 			pkt =	CMD2PKT(acmd);
4494 
4495 			if (acmd->cmd_flags & CFLAG_DMAVALID) {
4496 				if (acmd->cmd_flags & CFLAG_CONSISTENT) {
4497 					(void) ddi_dma_sync(acmd->cmd_dmahandle,
4498 					    acmd->cmd_dma_offset,
4499 					    acmd->cmd_dma_len,
4500 					    DDI_DMA_SYNC_FORCPU);
4501 				}
4502 			}
4503 
4504 			pkt->pkt_reason		= CMD_CMPLT;
4505 			pkt->pkt_statistics	= 0;
4506 			pkt->pkt_state = STATE_GOT_BUS
4507 			    | STATE_GOT_TARGET | STATE_SENT_CMD
4508 			    | STATE_XFERRED_DATA | STATE_GOT_STATUS;
4509 
4510 			con_log(CL_ANN, (CE_CONT,
4511 			    "CDB[0] = %x completed for %s: size %lx context %x",
4512 			    pkt->pkt_cdbp[0], ((acmd->islogical) ? "LD" : "PD"),
4513 			    acmd->cmd_dmacount, hdr->context));
4514 			DTRACE_PROBE3(softintr_cdb, uint8_t, pkt->pkt_cdbp[0],
4515 			    uint_t, acmd->cmd_cdblen, ulong_t,
4516 			    acmd->cmd_dmacount);
4517 
4518 			if (pkt->pkt_cdbp[0] == SCMD_INQUIRY) {
4519 				struct scsi_inquiry	*inq;
4520 
4521 				if (acmd->cmd_dmacount != 0) {
4522 					bp_mapin(acmd->cmd_buf);
4523 					inq = (struct scsi_inquiry *)
4524 					    acmd->cmd_buf->b_un.b_addr;
4525 
4526 					if (hdr->cmd_status == MFI_STAT_OK) {
4527 						display_scsi_inquiry(
4528 						    (caddr_t)inq);
4529 					}
4530 				}
4531 			}
4532 
4533 			DTRACE_PROBE2(softintr_done, uint8_t, hdr->cmd,
4534 			    uint8_t, hdr->cmd_status);
4535 
4536 			switch (hdr->cmd_status) {
4537 			case MFI_STAT_OK:
4538 				pkt->pkt_scbp[0] = STATUS_GOOD;
4539 				break;
4540 			case MFI_STAT_LD_CC_IN_PROGRESS:
4541 			case MFI_STAT_LD_RECON_IN_PROGRESS:
4542 				pkt->pkt_scbp[0] = STATUS_GOOD;
4543 				break;
4544 			case MFI_STAT_LD_INIT_IN_PROGRESS:
4545 				con_log(CL_ANN,
4546 				    (CE_WARN, "Initialization in Progress"));
4547 				pkt->pkt_reason	= CMD_TRAN_ERR;
4548 
4549 				break;
4550 			case MFI_STAT_SCSI_DONE_WITH_ERROR:
4551 				con_log(CL_ANN, (CE_CONT, "scsi_done error"));
4552 
4553 				pkt->pkt_reason	= CMD_CMPLT;
4554 				((struct scsi_status *)
4555 				    pkt->pkt_scbp)->sts_chk = 1;
4556 
4557 				if (pkt->pkt_cdbp[0] == SCMD_TEST_UNIT_READY) {
4558 					con_log(CL_ANN,
4559 					    (CE_WARN, "TEST_UNIT_READY fail"));
4560 				} else {
4561 					pkt->pkt_state |= STATE_ARQ_DONE;
4562 					arqstat = (void *)(pkt->pkt_scbp);
4563 					arqstat->sts_rqpkt_reason = CMD_CMPLT;
4564 					arqstat->sts_rqpkt_resid = 0;
4565 					arqstat->sts_rqpkt_state |=
4566 					    STATE_GOT_BUS | STATE_GOT_TARGET
4567 					    | STATE_SENT_CMD
4568 					    | STATE_XFERRED_DATA;
4569 					*(uint8_t *)&arqstat->sts_rqpkt_status =
4570 					    STATUS_GOOD;
4571 					ddi_rep_get8(
4572 					    cmd->frame_dma_obj.acc_handle,
4573 					    (uint8_t *)
4574 					    &(arqstat->sts_sensedata),
4575 					    cmd->sense,
4576 					    sizeof (struct scsi_extended_sense),
4577 					    DDI_DEV_AUTOINCR);
4578 				}
4579 				break;
4580 			case MFI_STAT_LD_OFFLINE:
4581 			case MFI_STAT_DEVICE_NOT_FOUND:
4582 				con_log(CL_ANN, (CE_CONT,
4583 				"mrsas_softintr:device not found error"));
4584 				pkt->pkt_reason	= CMD_DEV_GONE;
4585 				pkt->pkt_statistics  = STAT_DISCON;
4586 				break;
4587 			case MFI_STAT_LD_LBA_OUT_OF_RANGE:
4588 				pkt->pkt_state |= STATE_ARQ_DONE;
4589 				pkt->pkt_reason	= CMD_CMPLT;
4590 				((struct scsi_status *)
4591 				    pkt->pkt_scbp)->sts_chk = 1;
4592 
4593 				arqstat = (void *)(pkt->pkt_scbp);
4594 				arqstat->sts_rqpkt_reason = CMD_CMPLT;
4595 				arqstat->sts_rqpkt_resid = 0;
4596 				arqstat->sts_rqpkt_state |= STATE_GOT_BUS
4597 				    | STATE_GOT_TARGET | STATE_SENT_CMD
4598 				    | STATE_XFERRED_DATA;
4599 				*(uint8_t *)&arqstat->sts_rqpkt_status =
4600 				    STATUS_GOOD;
4601 
4602 				arqstat->sts_sensedata.es_valid = 1;
4603 				arqstat->sts_sensedata.es_key =
4604 				    KEY_ILLEGAL_REQUEST;
4605 				arqstat->sts_sensedata.es_class =
4606 				    CLASS_EXTENDED_SENSE;
4607 
4608 				/*
4609 				 * LOGICAL BLOCK ADDRESS OUT OF RANGE:
4610 				 * ASC: 0x21h; ASCQ: 0x00h;
4611 				 */
4612 				arqstat->sts_sensedata.es_add_code = 0x21;
4613 				arqstat->sts_sensedata.es_qual_code = 0x00;
4614 
4615 				break;
4616 
4617 			default:
4618 				con_log(CL_ANN, (CE_CONT, "Unknown status!"));
4619 				pkt->pkt_reason	= CMD_TRAN_ERR;
4620 
4621 				break;
4622 			}
4623 
4624 			atomic_add_16(&instance->fw_outstanding, (-1));
4625 
4626 			(void) mrsas_common_check(instance, cmd);
4627 
4628 			if (acmd->cmd_dmahandle) {
4629 				if (mrsas_check_dma_handle(
4630 				    acmd->cmd_dmahandle) != DDI_SUCCESS) {
4631 					ddi_fm_service_impact(instance->dip,
4632 					    DDI_SERVICE_UNAFFECTED);
4633 					pkt->pkt_reason = CMD_TRAN_ERR;
4634 					pkt->pkt_statistics = 0;
4635 				}
4636 			}
4637 
4638 			mrsas_return_mfi_pkt(instance, cmd);
4639 
4640 			/* Call the callback routine */
4641 			if (((pkt->pkt_flags & FLAG_NOINTR) == 0) &&
4642 			    pkt->pkt_comp) {
4643 				(*pkt->pkt_comp)(pkt);
4644 			}
4645 
4646 			break;
4647 
4648 		case MFI_CMD_OP_SMP:
4649 		case MFI_CMD_OP_STP:
4650 			complete_cmd_in_sync_mode(instance, cmd);
4651 			break;
4652 
4653 		case MFI_CMD_OP_DCMD:
4654 			/* see if got an event notification */
4655 			if (ddi_get32(cmd->frame_dma_obj.acc_handle,
4656 			    &cmd->frame->dcmd.opcode) ==
4657 			    MR_DCMD_CTRL_EVENT_WAIT) {
4658 				if ((instance->aen_cmd == cmd) &&
4659 				    (instance->aen_cmd->abort_aen)) {
4660 					con_log(CL_ANN, (CE_WARN,
4661 					    "mrsas_softintr: "
4662 					    "aborted_aen returned"));
4663 				} else {
4664 					atomic_add_16(&instance->fw_outstanding,
4665 					    (-1));
4666 					service_mfi_aen(instance, cmd);
4667 				}
4668 			} else {
4669 				complete_cmd_in_sync_mode(instance, cmd);
4670 			}
4671 
4672 			break;
4673 
4674 		case MFI_CMD_OP_ABORT:
4675 			con_log(CL_ANN, (CE_NOTE, "MFI_CMD_OP_ABORT complete"));
4676 			/*
4677 			 * MFI_CMD_OP_ABORT successfully completed
4678 			 * in the synchronous mode
4679 			 */
4680 			complete_cmd_in_sync_mode(instance, cmd);
4681 			break;
4682 
4683 		default:
4684 			mrsas_fm_ereport(instance, DDI_FM_DEVICE_NO_RESPONSE);
4685 			ddi_fm_service_impact(instance->dip, DDI_SERVICE_LOST);
4686 
4687 			if (cmd->pkt != NULL) {
4688 				pkt = cmd->pkt;
4689 				if (((pkt->pkt_flags & FLAG_NOINTR) == 0) &&
4690 				    pkt->pkt_comp) {
4691 
4692 					con_log(CL_ANN1, (CE_CONT, "posting to "
4693 					    "scsa cmd %p index %x pkt %p"
4694 					    "time %llx, default ", (void *)cmd,
4695 					    cmd->index, (void *)pkt,
4696 					    gethrtime()));
4697 
4698 					(*pkt->pkt_comp)(pkt);
4699 
4700 				}
4701 			}
4702 			con_log(CL_ANN, (CE_WARN, "Cmd type unknown !"));
4703 			break;
4704 		}
4705 	}
4706 
4707 	instance->softint_running = 0;
4708 
4709 	return (DDI_INTR_CLAIMED);
4710 }
4711 
4712 /*
4713  * mrsas_alloc_dma_obj
4714  *
4715  * Allocate the memory and other resources for an dma object.
4716  */
4717 int
mrsas_alloc_dma_obj(struct mrsas_instance * instance,dma_obj_t * obj,uchar_t endian_flags)4718 mrsas_alloc_dma_obj(struct mrsas_instance *instance, dma_obj_t *obj,
4719     uchar_t endian_flags)
4720 {
4721 	int	i;
4722 	size_t	alen = 0;
4723 	uint_t	cookie_cnt;
4724 	struct ddi_device_acc_attr tmp_endian_attr;
4725 
4726 	tmp_endian_attr = endian_attr;
4727 	tmp_endian_attr.devacc_attr_endian_flags = endian_flags;
4728 	tmp_endian_attr.devacc_attr_access = DDI_DEFAULT_ACC;
4729 
4730 	i = ddi_dma_alloc_handle(instance->dip, &obj->dma_attr,
4731 	    DDI_DMA_SLEEP, NULL, &obj->dma_handle);
4732 	if (i != DDI_SUCCESS) {
4733 
4734 		switch (i) {
4735 			case DDI_DMA_BADATTR :
4736 				con_log(CL_ANN, (CE_WARN,
4737 				"Failed ddi_dma_alloc_handle- Bad attribute"));
4738 				break;
4739 			case DDI_DMA_NORESOURCES :
4740 				con_log(CL_ANN, (CE_WARN,
4741 				"Failed ddi_dma_alloc_handle- No Resources"));
4742 				break;
4743 			default :
4744 				con_log(CL_ANN, (CE_WARN,
4745 				"Failed ddi_dma_alloc_handle: "
4746 				"unknown status %d", i));
4747 				break;
4748 		}
4749 
4750 		return (-1);
4751 	}
4752 
4753 	if ((ddi_dma_mem_alloc(obj->dma_handle, obj->size, &tmp_endian_attr,
4754 	    DDI_DMA_RDWR | DDI_DMA_STREAMING, DDI_DMA_SLEEP, NULL,
4755 	    &obj->buffer, &alen, &obj->acc_handle) != DDI_SUCCESS) ||
4756 	    alen < obj->size) {
4757 
4758 		ddi_dma_free_handle(&obj->dma_handle);
4759 
4760 		con_log(CL_ANN, (CE_WARN, "Failed : ddi_dma_mem_alloc"));
4761 
4762 		return (-1);
4763 	}
4764 
4765 	if (ddi_dma_addr_bind_handle(obj->dma_handle, NULL, obj->buffer,
4766 	    obj->size, DDI_DMA_RDWR | DDI_DMA_STREAMING, DDI_DMA_SLEEP,
4767 	    NULL, &obj->dma_cookie[0], &cookie_cnt) != DDI_SUCCESS) {
4768 
4769 		ddi_dma_mem_free(&obj->acc_handle);
4770 		ddi_dma_free_handle(&obj->dma_handle);
4771 
4772 		con_log(CL_ANN, (CE_WARN, "Failed : ddi_dma_addr_bind_handle"));
4773 
4774 		return (-1);
4775 	}
4776 
4777 	if (mrsas_check_dma_handle(obj->dma_handle) != DDI_SUCCESS) {
4778 		ddi_fm_service_impact(instance->dip, DDI_SERVICE_LOST);
4779 		return (-1);
4780 	}
4781 
4782 	if (mrsas_check_acc_handle(obj->acc_handle) != DDI_SUCCESS) {
4783 		ddi_fm_service_impact(instance->dip, DDI_SERVICE_LOST);
4784 		return (-1);
4785 	}
4786 
4787 	return (cookie_cnt);
4788 }
4789 
4790 /*
4791  * mrsas_free_dma_obj(struct mrsas_instance *, dma_obj_t)
4792  *
4793  * De-allocate the memory and other resources for an dma object, which must
4794  * have been alloated by a previous call to mrsas_alloc_dma_obj()
4795  */
4796 int
mrsas_free_dma_obj(struct mrsas_instance * instance,dma_obj_t obj)4797 mrsas_free_dma_obj(struct mrsas_instance *instance, dma_obj_t obj)
4798 {
4799 
4800 	if ((obj.dma_handle == NULL) || (obj.acc_handle == NULL)) {
4801 		return (DDI_SUCCESS);
4802 	}
4803 
4804 	/*
4805 	 * NOTE: These check-handle functions fail if *_handle == NULL, but
4806 	 * this function succeeds because of the previous check.
4807 	 */
4808 	if (mrsas_check_dma_handle(obj.dma_handle) != DDI_SUCCESS) {
4809 		ddi_fm_service_impact(instance->dip, DDI_SERVICE_UNAFFECTED);
4810 		return (DDI_FAILURE);
4811 	}
4812 
4813 	if (mrsas_check_acc_handle(obj.acc_handle) != DDI_SUCCESS) {
4814 		ddi_fm_service_impact(instance->dip, DDI_SERVICE_UNAFFECTED);
4815 		return (DDI_FAILURE);
4816 	}
4817 
4818 	(void) ddi_dma_unbind_handle(obj.dma_handle);
4819 	ddi_dma_mem_free(&obj.acc_handle);
4820 	ddi_dma_free_handle(&obj.dma_handle);
4821 	obj.acc_handle = NULL;
4822 	return (DDI_SUCCESS);
4823 }
4824 
4825 /*
4826  * mrsas_dma_alloc(instance_t *, struct scsi_pkt *, struct buf *,
4827  * int, int (*)())
4828  *
4829  * Allocate dma resources for a new scsi command
4830  */
4831 int
mrsas_dma_alloc(struct mrsas_instance * instance,struct scsi_pkt * pkt,struct buf * bp,int flags,int (* callback)())4832 mrsas_dma_alloc(struct mrsas_instance *instance, struct scsi_pkt *pkt,
4833     struct buf *bp, int flags, int (*callback)())
4834 {
4835 	int	dma_flags;
4836 	int	(*cb)(caddr_t);
4837 	int	i;
4838 
4839 	ddi_dma_attr_t	tmp_dma_attr = mrsas_generic_dma_attr;
4840 	struct scsa_cmd	*acmd = PKT2CMD(pkt);
4841 
4842 	acmd->cmd_buf = bp;
4843 
4844 	if (bp->b_flags & B_READ) {
4845 		acmd->cmd_flags &= ~CFLAG_DMASEND;
4846 		dma_flags = DDI_DMA_READ;
4847 	} else {
4848 		acmd->cmd_flags |= CFLAG_DMASEND;
4849 		dma_flags = DDI_DMA_WRITE;
4850 	}
4851 
4852 	if (flags & PKT_CONSISTENT) {
4853 		acmd->cmd_flags |= CFLAG_CONSISTENT;
4854 		dma_flags |= DDI_DMA_CONSISTENT;
4855 	}
4856 
4857 	if (flags & PKT_DMA_PARTIAL) {
4858 		dma_flags |= DDI_DMA_PARTIAL;
4859 	}
4860 
4861 	dma_flags |= DDI_DMA_REDZONE;
4862 
4863 	cb = (callback == NULL_FUNC) ? DDI_DMA_DONTWAIT : DDI_DMA_SLEEP;
4864 
4865 	tmp_dma_attr.dma_attr_sgllen = instance->max_num_sge;
4866 	tmp_dma_attr.dma_attr_addr_hi = 0xffffffffffffffffull;
4867 	if (instance->tbolt) {
4868 		/* OCR-RESET FIX */
4869 		tmp_dma_attr.dma_attr_count_max =
4870 		    (U64)mrsas_tbolt_max_cap_maxxfer;  /* limit to 256K */
4871 		tmp_dma_attr.dma_attr_maxxfer =
4872 		    (U64)mrsas_tbolt_max_cap_maxxfer;  /* limit to 256K */
4873 	}
4874 
4875 	if ((i = ddi_dma_alloc_handle(instance->dip, &tmp_dma_attr,
4876 	    cb, 0, &acmd->cmd_dmahandle)) != DDI_SUCCESS) {
4877 		switch (i) {
4878 		case DDI_DMA_BADATTR:
4879 			bioerror(bp, EFAULT);
4880 			return (DDI_FAILURE);
4881 
4882 		case DDI_DMA_NORESOURCES:
4883 			bioerror(bp, 0);
4884 			return (DDI_FAILURE);
4885 
4886 		default:
4887 			con_log(CL_ANN, (CE_PANIC, "ddi_dma_alloc_handle: "
4888 			    "impossible result (0x%x)", i));
4889 			bioerror(bp, EFAULT);
4890 			return (DDI_FAILURE);
4891 		}
4892 	}
4893 
4894 	i = ddi_dma_buf_bind_handle(acmd->cmd_dmahandle, bp, dma_flags,
4895 	    cb, 0, &acmd->cmd_dmacookies[0], &acmd->cmd_ncookies);
4896 
4897 	switch (i) {
4898 	case DDI_DMA_PARTIAL_MAP:
4899 		if ((dma_flags & DDI_DMA_PARTIAL) == 0) {
4900 			con_log(CL_ANN, (CE_PANIC, "ddi_dma_buf_bind_handle: "
4901 			    "DDI_DMA_PARTIAL_MAP impossible"));
4902 			goto no_dma_cookies;
4903 		}
4904 
4905 		if (ddi_dma_numwin(acmd->cmd_dmahandle, &acmd->cmd_nwin) ==
4906 		    DDI_FAILURE) {
4907 			con_log(CL_ANN, (CE_PANIC, "ddi_dma_numwin failed"));
4908 			goto no_dma_cookies;
4909 		}
4910 
4911 		if (ddi_dma_getwin(acmd->cmd_dmahandle, acmd->cmd_curwin,
4912 		    &acmd->cmd_dma_offset, &acmd->cmd_dma_len,
4913 		    &acmd->cmd_dmacookies[0], &acmd->cmd_ncookies) ==
4914 		    DDI_FAILURE) {
4915 
4916 			con_log(CL_ANN, (CE_PANIC, "ddi_dma_getwin failed"));
4917 			goto no_dma_cookies;
4918 		}
4919 
4920 		goto get_dma_cookies;
4921 	case DDI_DMA_MAPPED:
4922 		acmd->cmd_nwin = 1;
4923 		acmd->cmd_dma_len = 0;
4924 		acmd->cmd_dma_offset = 0;
4925 
4926 get_dma_cookies:
4927 		i = 0;
4928 		acmd->cmd_dmacount = 0;
4929 		for (;;) {
4930 			acmd->cmd_dmacount +=
4931 			    acmd->cmd_dmacookies[i++].dmac_size;
4932 
4933 			if (i == instance->max_num_sge ||
4934 			    i == acmd->cmd_ncookies)
4935 				break;
4936 
4937 			ddi_dma_nextcookie(acmd->cmd_dmahandle,
4938 			    &acmd->cmd_dmacookies[i]);
4939 		}
4940 
4941 		acmd->cmd_cookie = i;
4942 		acmd->cmd_cookiecnt = i;
4943 
4944 		acmd->cmd_flags |= CFLAG_DMAVALID;
4945 
4946 		if (bp->b_bcount >= acmd->cmd_dmacount) {
4947 			pkt->pkt_resid = bp->b_bcount - acmd->cmd_dmacount;
4948 		} else {
4949 			pkt->pkt_resid = 0;
4950 		}
4951 
4952 		return (DDI_SUCCESS);
4953 	case DDI_DMA_NORESOURCES:
4954 		bioerror(bp, 0);
4955 		break;
4956 	case DDI_DMA_NOMAPPING:
4957 		bioerror(bp, EFAULT);
4958 		break;
4959 	case DDI_DMA_TOOBIG:
4960 		bioerror(bp, EINVAL);
4961 		break;
4962 	case DDI_DMA_INUSE:
4963 		con_log(CL_ANN, (CE_PANIC, "ddi_dma_buf_bind_handle:"
4964 		    " DDI_DMA_INUSE impossible"));
4965 		break;
4966 	default:
4967 		con_log(CL_ANN, (CE_PANIC, "ddi_dma_buf_bind_handle: "
4968 		    "impossible result (0x%x)", i));
4969 		break;
4970 	}
4971 
4972 no_dma_cookies:
4973 	ddi_dma_free_handle(&acmd->cmd_dmahandle);
4974 	acmd->cmd_dmahandle = NULL;
4975 	acmd->cmd_flags &= ~CFLAG_DMAVALID;
4976 	return (DDI_FAILURE);
4977 }
4978 
4979 /*
4980  * mrsas_dma_move(struct mrsas_instance *, struct scsi_pkt *, struct buf *)
4981  *
4982  * move dma resources to next dma window
4983  *
4984  */
4985 int
mrsas_dma_move(struct mrsas_instance * instance,struct scsi_pkt * pkt,struct buf * bp)4986 mrsas_dma_move(struct mrsas_instance *instance, struct scsi_pkt *pkt,
4987     struct buf *bp)
4988 {
4989 	int	i = 0;
4990 
4991 	struct scsa_cmd	*acmd = PKT2CMD(pkt);
4992 
4993 	/*
4994 	 * If there are no more cookies remaining in this window,
4995 	 * must move to the next window first.
4996 	 */
4997 	if (acmd->cmd_cookie == acmd->cmd_ncookies) {
4998 		if (acmd->cmd_curwin == acmd->cmd_nwin && acmd->cmd_nwin == 1) {
4999 			return (DDI_SUCCESS);
5000 		}
5001 
5002 		/* at last window, cannot move */
5003 		if (++acmd->cmd_curwin >= acmd->cmd_nwin) {
5004 			return (DDI_FAILURE);
5005 		}
5006 
5007 		if (ddi_dma_getwin(acmd->cmd_dmahandle, acmd->cmd_curwin,
5008 		    &acmd->cmd_dma_offset, &acmd->cmd_dma_len,
5009 		    &acmd->cmd_dmacookies[0], &acmd->cmd_ncookies) ==
5010 		    DDI_FAILURE) {
5011 			return (DDI_FAILURE);
5012 		}
5013 
5014 		acmd->cmd_cookie = 0;
5015 	} else {
5016 		/* still more cookies in this window - get the next one */
5017 		ddi_dma_nextcookie(acmd->cmd_dmahandle,
5018 		    &acmd->cmd_dmacookies[0]);
5019 	}
5020 
5021 	/* get remaining cookies in this window, up to our maximum */
5022 	for (;;) {
5023 		acmd->cmd_dmacount += acmd->cmd_dmacookies[i++].dmac_size;
5024 		acmd->cmd_cookie++;
5025 
5026 		if (i == instance->max_num_sge ||
5027 		    acmd->cmd_cookie == acmd->cmd_ncookies) {
5028 			break;
5029 		}
5030 
5031 		ddi_dma_nextcookie(acmd->cmd_dmahandle,
5032 		    &acmd->cmd_dmacookies[i]);
5033 	}
5034 
5035 	acmd->cmd_cookiecnt = i;
5036 
5037 	if (bp->b_bcount >= acmd->cmd_dmacount) {
5038 		pkt->pkt_resid = bp->b_bcount - acmd->cmd_dmacount;
5039 	} else {
5040 		pkt->pkt_resid = 0;
5041 	}
5042 
5043 	return (DDI_SUCCESS);
5044 }
5045 
5046 /*
5047  * build_cmd
5048  */
5049 static struct mrsas_cmd *
build_cmd(struct mrsas_instance * instance,struct scsi_address * ap,struct scsi_pkt * pkt,uchar_t * cmd_done)5050 build_cmd(struct mrsas_instance *instance, struct scsi_address *ap,
5051     struct scsi_pkt *pkt, uchar_t *cmd_done)
5052 {
5053 	uint16_t	flags = 0;
5054 	uint32_t	i;
5055 	uint32_t	sge_bytes;
5056 	uint32_t	tmp_data_xfer_len;
5057 	ddi_acc_handle_t acc_handle;
5058 	struct mrsas_cmd		*cmd;
5059 	struct mrsas_sge64		*mfi_sgl;
5060 	struct mrsas_sge_ieee		*mfi_sgl_ieee;
5061 	struct scsa_cmd			*acmd = PKT2CMD(pkt);
5062 	struct mrsas_pthru_frame	*pthru;
5063 	struct mrsas_io_frame		*ldio;
5064 
5065 	/* find out if this is logical or physical drive command.  */
5066 	acmd->islogical = MRDRV_IS_LOGICAL(ap);
5067 	acmd->device_id = MAP_DEVICE_ID(instance, ap);
5068 	*cmd_done = 0;
5069 
5070 	/* get the command packet */
5071 	if (!(cmd = mrsas_get_mfi_pkt(instance))) {
5072 		DTRACE_PROBE2(build_cmd_mfi_err, uint16_t,
5073 		    instance->fw_outstanding, uint16_t, instance->max_fw_cmds);
5074 		return (NULL);
5075 	}
5076 
5077 	acc_handle = cmd->frame_dma_obj.acc_handle;
5078 
5079 	/* Clear the frame buffer and assign back the context id */
5080 	(void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
5081 	ddi_put32(acc_handle, &cmd->frame->hdr.context, cmd->index);
5082 
5083 	cmd->pkt = pkt;
5084 	cmd->cmd = acmd;
5085 	DTRACE_PROBE3(build_cmds, uint8_t, pkt->pkt_cdbp[0],
5086 	    ulong_t, acmd->cmd_dmacount, ulong_t, acmd->cmd_dma_len);
5087 
5088 	/* lets get the command directions */
5089 	if (acmd->cmd_flags & CFLAG_DMASEND) {
5090 		flags = MFI_FRAME_DIR_WRITE;
5091 
5092 		if (acmd->cmd_flags & CFLAG_CONSISTENT) {
5093 			(void) ddi_dma_sync(acmd->cmd_dmahandle,
5094 			    acmd->cmd_dma_offset, acmd->cmd_dma_len,
5095 			    DDI_DMA_SYNC_FORDEV);
5096 		}
5097 	} else if (acmd->cmd_flags & ~CFLAG_DMASEND) {
5098 		flags = MFI_FRAME_DIR_READ;
5099 
5100 		if (acmd->cmd_flags & CFLAG_CONSISTENT) {
5101 			(void) ddi_dma_sync(acmd->cmd_dmahandle,
5102 			    acmd->cmd_dma_offset, acmd->cmd_dma_len,
5103 			    DDI_DMA_SYNC_FORCPU);
5104 		}
5105 	} else {
5106 		flags = MFI_FRAME_DIR_NONE;
5107 	}
5108 
5109 	if (instance->flag_ieee) {
5110 		flags |= MFI_FRAME_IEEE;
5111 	}
5112 	flags |= MFI_FRAME_SGL64;
5113 
5114 	switch (pkt->pkt_cdbp[0]) {
5115 
5116 	/*
5117 	 * case SCMD_SYNCHRONIZE_CACHE:
5118 	 *	flush_cache(instance);
5119 	 *	mrsas_return_mfi_pkt(instance, cmd);
5120 	 *	*cmd_done = 1;
5121 	 *
5122 	 *	return (NULL);
5123 	 */
5124 
5125 	case SCMD_READ:
5126 	case SCMD_WRITE:
5127 	case SCMD_READ_G1:
5128 	case SCMD_WRITE_G1:
5129 	case SCMD_READ_G4:
5130 	case SCMD_WRITE_G4:
5131 	case SCMD_READ_G5:
5132 	case SCMD_WRITE_G5:
5133 		if (acmd->islogical) {
5134 			ldio = (struct mrsas_io_frame *)cmd->frame;
5135 
5136 			/*
5137 			 * preare the Logical IO frame:
5138 			 * 2nd bit is zero for all read cmds
5139 			 */
5140 			ddi_put8(acc_handle, &ldio->cmd,
5141 			    (pkt->pkt_cdbp[0] & 0x02) ? MFI_CMD_OP_LD_WRITE
5142 			    : MFI_CMD_OP_LD_READ);
5143 			ddi_put8(acc_handle, &ldio->cmd_status, 0x0);
5144 			ddi_put8(acc_handle, &ldio->scsi_status, 0x0);
5145 			ddi_put8(acc_handle, &ldio->target_id, acmd->device_id);
5146 			ddi_put16(acc_handle, &ldio->timeout, 0);
5147 			ddi_put8(acc_handle, &ldio->reserved_0, 0);
5148 			ddi_put16(acc_handle, &ldio->pad_0, 0);
5149 			ddi_put16(acc_handle, &ldio->flags, flags);
5150 
5151 			/* Initialize sense Information */
5152 			bzero(cmd->sense, SENSE_LENGTH);
5153 			ddi_put8(acc_handle, &ldio->sense_len, SENSE_LENGTH);
5154 			ddi_put32(acc_handle, &ldio->sense_buf_phys_addr_hi, 0);
5155 			ddi_put32(acc_handle, &ldio->sense_buf_phys_addr_lo,
5156 			    cmd->sense_phys_addr);
5157 			ddi_put32(acc_handle, &ldio->start_lba_hi, 0);
5158 			ddi_put8(acc_handle, &ldio->access_byte,
5159 			    (acmd->cmd_cdblen != 6) ? pkt->pkt_cdbp[1] : 0);
5160 			ddi_put8(acc_handle, &ldio->sge_count,
5161 			    acmd->cmd_cookiecnt);
5162 			if (instance->flag_ieee) {
5163 				mfi_sgl_ieee =
5164 				    (struct mrsas_sge_ieee *)&ldio->sgl;
5165 			} else {
5166 				mfi_sgl = (struct mrsas_sge64	*)&ldio->sgl;
5167 			}
5168 
5169 			(void) ddi_get32(acc_handle, &ldio->context);
5170 
5171 			if (acmd->cmd_cdblen == CDB_GROUP0) {
5172 				/* 6-byte cdb */
5173 				ddi_put32(acc_handle, &ldio->lba_count, (
5174 				    (uint16_t)(pkt->pkt_cdbp[4])));
5175 
5176 				ddi_put32(acc_handle, &ldio->start_lba_lo, (
5177 				    ((uint32_t)(pkt->pkt_cdbp[3])) |
5178 				    ((uint32_t)(pkt->pkt_cdbp[2]) << 8) |
5179 				    ((uint32_t)((pkt->pkt_cdbp[1]) & 0x1F)
5180 				    << 16)));
5181 			} else if (acmd->cmd_cdblen == CDB_GROUP1) {
5182 				/* 10-byte cdb */
5183 				ddi_put32(acc_handle, &ldio->lba_count, (
5184 				    ((uint16_t)(pkt->pkt_cdbp[8])) |
5185 				    ((uint16_t)(pkt->pkt_cdbp[7]) << 8)));
5186 
5187 				ddi_put32(acc_handle, &ldio->start_lba_lo, (
5188 				    ((uint32_t)(pkt->pkt_cdbp[5])) |
5189 				    ((uint32_t)(pkt->pkt_cdbp[4]) << 8) |
5190 				    ((uint32_t)(pkt->pkt_cdbp[3]) << 16) |
5191 				    ((uint32_t)(pkt->pkt_cdbp[2]) << 24)));
5192 			} else if (acmd->cmd_cdblen == CDB_GROUP5) {
5193 				/* 12-byte cdb */
5194 				ddi_put32(acc_handle, &ldio->lba_count, (
5195 				    ((uint32_t)(pkt->pkt_cdbp[9])) |
5196 				    ((uint32_t)(pkt->pkt_cdbp[8]) << 8) |
5197 				    ((uint32_t)(pkt->pkt_cdbp[7]) << 16) |
5198 				    ((uint32_t)(pkt->pkt_cdbp[6]) << 24)));
5199 
5200 				ddi_put32(acc_handle, &ldio->start_lba_lo, (
5201 				    ((uint32_t)(pkt->pkt_cdbp[5])) |
5202 				    ((uint32_t)(pkt->pkt_cdbp[4]) << 8) |
5203 				    ((uint32_t)(pkt->pkt_cdbp[3]) << 16) |
5204 				    ((uint32_t)(pkt->pkt_cdbp[2]) << 24)));
5205 			} else if (acmd->cmd_cdblen == CDB_GROUP4) {
5206 				/* 16-byte cdb */
5207 				ddi_put32(acc_handle, &ldio->lba_count, (
5208 				    ((uint32_t)(pkt->pkt_cdbp[13])) |
5209 				    ((uint32_t)(pkt->pkt_cdbp[12]) << 8) |
5210 				    ((uint32_t)(pkt->pkt_cdbp[11]) << 16) |
5211 				    ((uint32_t)(pkt->pkt_cdbp[10]) << 24)));
5212 
5213 				ddi_put32(acc_handle, &ldio->start_lba_lo, (
5214 				    ((uint32_t)(pkt->pkt_cdbp[9])) |
5215 				    ((uint32_t)(pkt->pkt_cdbp[8]) << 8) |
5216 				    ((uint32_t)(pkt->pkt_cdbp[7]) << 16) |
5217 				    ((uint32_t)(pkt->pkt_cdbp[6]) << 24)));
5218 
5219 				ddi_put32(acc_handle, &ldio->start_lba_hi, (
5220 				    ((uint32_t)(pkt->pkt_cdbp[5])) |
5221 				    ((uint32_t)(pkt->pkt_cdbp[4]) << 8) |
5222 				    ((uint32_t)(pkt->pkt_cdbp[3]) << 16) |
5223 				    ((uint32_t)(pkt->pkt_cdbp[2]) << 24)));
5224 			}
5225 
5226 			break;
5227 		}
5228 		/* For all non-rd/wr and physical disk cmds */
5229 		/* FALLTHROUGH */
5230 	default:
5231 
5232 		switch (pkt->pkt_cdbp[0]) {
5233 		case SCMD_MODE_SENSE:
5234 		case SCMD_MODE_SENSE_G1: {
5235 			union scsi_cdb	*cdbp;
5236 			uint16_t	page_code;
5237 
5238 			cdbp = (void *)pkt->pkt_cdbp;
5239 			page_code = (uint16_t)cdbp->cdb_un.sg.scsi[0];
5240 			switch (page_code) {
5241 			case 0x3:
5242 			case 0x4:
5243 				(void) mrsas_mode_sense_build(pkt);
5244 				mrsas_return_mfi_pkt(instance, cmd);
5245 				*cmd_done = 1;
5246 				return (NULL);
5247 			}
5248 			break;
5249 		}
5250 		default:
5251 			break;
5252 		}
5253 
5254 		pthru	= (struct mrsas_pthru_frame *)cmd->frame;
5255 
5256 		/* prepare the DCDB frame */
5257 		ddi_put8(acc_handle, &pthru->cmd, (acmd->islogical) ?
5258 		    MFI_CMD_OP_LD_SCSI : MFI_CMD_OP_PD_SCSI);
5259 		ddi_put8(acc_handle, &pthru->cmd_status, 0x0);
5260 		ddi_put8(acc_handle, &pthru->scsi_status, 0x0);
5261 		ddi_put8(acc_handle, &pthru->target_id, acmd->device_id);
5262 		ddi_put8(acc_handle, &pthru->lun, 0);
5263 		ddi_put8(acc_handle, &pthru->cdb_len, acmd->cmd_cdblen);
5264 		ddi_put16(acc_handle, &pthru->timeout, 0);
5265 		ddi_put16(acc_handle, &pthru->flags, flags);
5266 		tmp_data_xfer_len = 0;
5267 		for (i = 0; i < acmd->cmd_cookiecnt; i++) {
5268 			tmp_data_xfer_len += acmd->cmd_dmacookies[i].dmac_size;
5269 		}
5270 		ddi_put32(acc_handle, &pthru->data_xfer_len,
5271 		    tmp_data_xfer_len);
5272 		ddi_put8(acc_handle, &pthru->sge_count, acmd->cmd_cookiecnt);
5273 		if (instance->flag_ieee) {
5274 			mfi_sgl_ieee = (struct mrsas_sge_ieee *)&pthru->sgl;
5275 		} else {
5276 			mfi_sgl	= (struct mrsas_sge64 *)&pthru->sgl;
5277 		}
5278 
5279 		bzero(cmd->sense, SENSE_LENGTH);
5280 		ddi_put8(acc_handle, &pthru->sense_len, SENSE_LENGTH);
5281 		ddi_put32(acc_handle, &pthru->sense_buf_phys_addr_hi, 0);
5282 		ddi_put32(acc_handle, &pthru->sense_buf_phys_addr_lo,
5283 		    cmd->sense_phys_addr);
5284 
5285 		(void) ddi_get32(acc_handle, &pthru->context);
5286 		ddi_rep_put8(acc_handle, (uint8_t *)pkt->pkt_cdbp,
5287 		    (uint8_t *)pthru->cdb, acmd->cmd_cdblen, DDI_DEV_AUTOINCR);
5288 
5289 		break;
5290 	}
5291 
5292 	/* prepare the scatter-gather list for the firmware */
5293 	if (instance->flag_ieee) {
5294 		for (i = 0; i < acmd->cmd_cookiecnt; i++, mfi_sgl_ieee++) {
5295 			ddi_put64(acc_handle, &mfi_sgl_ieee->phys_addr,
5296 			    acmd->cmd_dmacookies[i].dmac_laddress);
5297 			ddi_put32(acc_handle, &mfi_sgl_ieee->length,
5298 			    acmd->cmd_dmacookies[i].dmac_size);
5299 		}
5300 		sge_bytes = sizeof (struct mrsas_sge_ieee)*acmd->cmd_cookiecnt;
5301 	} else {
5302 		for (i = 0; i < acmd->cmd_cookiecnt; i++, mfi_sgl++) {
5303 			ddi_put64(acc_handle, &mfi_sgl->phys_addr,
5304 			    acmd->cmd_dmacookies[i].dmac_laddress);
5305 			ddi_put32(acc_handle, &mfi_sgl->length,
5306 			    acmd->cmd_dmacookies[i].dmac_size);
5307 		}
5308 		sge_bytes = sizeof (struct mrsas_sge64)*acmd->cmd_cookiecnt;
5309 	}
5310 
5311 	cmd->frame_count = (sge_bytes / MRMFI_FRAME_SIZE) +
5312 	    ((sge_bytes % MRMFI_FRAME_SIZE) ? 1 : 0) + 1;
5313 
5314 	if (cmd->frame_count >= 8) {
5315 		cmd->frame_count = 8;
5316 	}
5317 
5318 	return (cmd);
5319 }
5320 
5321 /*
5322  * wait_for_outstanding -	Wait for all outstanding cmds
5323  * @instance:				Adapter soft state
5324  *
5325  * This function waits for upto MRDRV_RESET_WAIT_TIME seconds for FW to
5326  * complete all its outstanding commands. Returns error if one or more IOs
5327  * are pending after this time period.
5328  */
5329 static int
wait_for_outstanding(struct mrsas_instance * instance)5330 wait_for_outstanding(struct mrsas_instance *instance)
5331 {
5332 	int		i;
5333 	uint32_t	wait_time = 90;
5334 
5335 	for (i = 0; i < wait_time; i++) {
5336 		if (!instance->fw_outstanding) {
5337 			break;
5338 		}
5339 
5340 		drv_usecwait(MILLISEC); /* wait for 1000 usecs */;
5341 	}
5342 
5343 	if (instance->fw_outstanding) {
5344 		return (1);
5345 	}
5346 
5347 	return (0);
5348 }
5349 
5350 /*
5351  * issue_mfi_pthru
5352  */
5353 static int
issue_mfi_pthru(struct mrsas_instance * instance,struct mrsas_ioctl * ioctl,struct mrsas_cmd * cmd,int mode)5354 issue_mfi_pthru(struct mrsas_instance *instance, struct mrsas_ioctl *ioctl,
5355     struct mrsas_cmd *cmd, int mode)
5356 {
5357 	void		*ubuf;
5358 	uint32_t	kphys_addr = 0;
5359 	uint32_t	xferlen = 0;
5360 	uint32_t	new_xfer_length = 0;
5361 	uint_t		model;
5362 	ddi_acc_handle_t	acc_handle = cmd->frame_dma_obj.acc_handle;
5363 	dma_obj_t			pthru_dma_obj;
5364 	struct mrsas_pthru_frame	*kpthru;
5365 	struct mrsas_pthru_frame	*pthru;
5366 	int i;
5367 	pthru = &cmd->frame->pthru;
5368 	kpthru = (struct mrsas_pthru_frame *)&ioctl->frame[0];
5369 
5370 	if (instance->adapterresetinprogress) {
5371 		con_log(CL_ANN1, (CE_WARN, "issue_mfi_pthru: Reset flag set, "
5372 		"returning mfi_pkt and setting TRAN_BUSY\n"));
5373 		return (DDI_FAILURE);
5374 	}
5375 	model = ddi_model_convert_from(mode & FMODELS);
5376 	if (model == DDI_MODEL_ILP32) {
5377 		con_log(CL_ANN1, (CE_CONT, "issue_mfi_pthru: DDI_MODEL_LP32"));
5378 
5379 		xferlen	= kpthru->sgl.sge32[0].length;
5380 
5381 		ubuf	= (void *)(ulong_t)kpthru->sgl.sge32[0].phys_addr;
5382 	} else {
5383 #ifdef _ILP32
5384 		con_log(CL_ANN1, (CE_CONT, "issue_mfi_pthru: DDI_MODEL_LP32"));
5385 		xferlen	= kpthru->sgl.sge32[0].length;
5386 		ubuf	= (void *)(ulong_t)kpthru->sgl.sge32[0].phys_addr;
5387 #else
5388 		con_log(CL_ANN1, (CE_CONT, "issue_mfi_pthru: DDI_MODEL_LP64"));
5389 		xferlen	= kpthru->sgl.sge64[0].length;
5390 		ubuf	= (void *)(ulong_t)kpthru->sgl.sge64[0].phys_addr;
5391 #endif
5392 	}
5393 
5394 	if (xferlen) {
5395 		/* means IOCTL requires DMA */
5396 		/* allocate the data transfer buffer */
5397 		/* pthru_dma_obj.size = xferlen; */
5398 		MRSAS_GET_BOUNDARY_ALIGNED_LEN(xferlen, new_xfer_length,
5399 		    PAGESIZE);
5400 		pthru_dma_obj.size = new_xfer_length;
5401 		pthru_dma_obj.dma_attr = mrsas_generic_dma_attr;
5402 		pthru_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
5403 		pthru_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
5404 		pthru_dma_obj.dma_attr.dma_attr_sgllen = 1;
5405 		pthru_dma_obj.dma_attr.dma_attr_align = 1;
5406 
5407 		/* allocate kernel buffer for DMA */
5408 		if (mrsas_alloc_dma_obj(instance, &pthru_dma_obj,
5409 		    (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
5410 			con_log(CL_ANN, (CE_WARN, "issue_mfi_pthru: "
5411 			    "could not allocate data transfer buffer."));
5412 			return (DDI_FAILURE);
5413 		}
5414 		(void) memset(pthru_dma_obj.buffer, 0, xferlen);
5415 
5416 		/* If IOCTL requires DMA WRITE, do ddi_copyin IOCTL data copy */
5417 		if (kpthru->flags & MFI_FRAME_DIR_WRITE) {
5418 			for (i = 0; i < xferlen; i++) {
5419 				if (ddi_copyin((uint8_t *)ubuf+i,
5420 				    (uint8_t *)pthru_dma_obj.buffer+i,
5421 				    1, mode)) {
5422 					con_log(CL_ANN, (CE_WARN,
5423 					    "issue_mfi_pthru : "
5424 					    "copy from user space failed"));
5425 					return (DDI_FAILURE);
5426 				}
5427 			}
5428 		}
5429 
5430 		kphys_addr = pthru_dma_obj.dma_cookie[0].dmac_address;
5431 	}
5432 
5433 	ddi_put8(acc_handle, &pthru->cmd, kpthru->cmd);
5434 	ddi_put8(acc_handle, &pthru->sense_len, SENSE_LENGTH);
5435 	ddi_put8(acc_handle, &pthru->cmd_status, 0);
5436 	ddi_put8(acc_handle, &pthru->scsi_status, 0);
5437 	ddi_put8(acc_handle, &pthru->target_id, kpthru->target_id);
5438 	ddi_put8(acc_handle, &pthru->lun, kpthru->lun);
5439 	ddi_put8(acc_handle, &pthru->cdb_len, kpthru->cdb_len);
5440 	ddi_put8(acc_handle, &pthru->sge_count, kpthru->sge_count);
5441 	ddi_put16(acc_handle, &pthru->timeout, kpthru->timeout);
5442 	ddi_put32(acc_handle, &pthru->data_xfer_len, kpthru->data_xfer_len);
5443 
5444 	ddi_put32(acc_handle, &pthru->sense_buf_phys_addr_hi, 0);
5445 	pthru->sense_buf_phys_addr_lo = cmd->sense_phys_addr;
5446 	/* ddi_put32(acc_handle, &pthru->sense_buf_phys_addr_lo, 0); */
5447 
5448 	ddi_rep_put8(acc_handle, (uint8_t *)kpthru->cdb, (uint8_t *)pthru->cdb,
5449 	    pthru->cdb_len, DDI_DEV_AUTOINCR);
5450 
5451 	ddi_put16(acc_handle, &pthru->flags, kpthru->flags & ~MFI_FRAME_SGL64);
5452 	ddi_put32(acc_handle, &pthru->sgl.sge32[0].length, xferlen);
5453 	ddi_put32(acc_handle, &pthru->sgl.sge32[0].phys_addr, kphys_addr);
5454 
5455 	cmd->sync_cmd = MRSAS_TRUE;
5456 	cmd->frame_count = 1;
5457 
5458 	if (instance->tbolt) {
5459 		mr_sas_tbolt_build_mfi_cmd(instance, cmd);
5460 	}
5461 
5462 	if (instance->func_ptr->issue_cmd_in_sync_mode(instance, cmd)) {
5463 		con_log(CL_ANN, (CE_WARN,
5464 		    "issue_mfi_pthru: fw_ioctl failed"));
5465 	} else {
5466 		if (xferlen && kpthru->flags & MFI_FRAME_DIR_READ) {
5467 			for (i = 0; i < xferlen; i++) {
5468 				if (ddi_copyout(
5469 				    (uint8_t *)pthru_dma_obj.buffer+i,
5470 				    (uint8_t *)ubuf+i, 1, mode)) {
5471 					con_log(CL_ANN, (CE_WARN,
5472 					    "issue_mfi_pthru : "
5473 					    "copy to user space failed"));
5474 					return (DDI_FAILURE);
5475 				}
5476 			}
5477 		}
5478 	}
5479 
5480 	kpthru->cmd_status = ddi_get8(acc_handle, &pthru->cmd_status);
5481 	kpthru->scsi_status = ddi_get8(acc_handle, &pthru->scsi_status);
5482 
5483 	con_log(CL_ANN, (CE_CONT, "issue_mfi_pthru: cmd_status %x, "
5484 	    "scsi_status %x", kpthru->cmd_status, kpthru->scsi_status));
5485 	DTRACE_PROBE3(issue_pthru, uint8_t, kpthru->cmd, uint8_t,
5486 	    kpthru->cmd_status, uint8_t, kpthru->scsi_status);
5487 
5488 	if (kpthru->sense_len) {
5489 		uint_t sense_len = SENSE_LENGTH;
5490 		void *sense_ubuf =
5491 		    (void *)(ulong_t)kpthru->sense_buf_phys_addr_lo;
5492 		if (kpthru->sense_len <= SENSE_LENGTH) {
5493 			sense_len = kpthru->sense_len;
5494 		}
5495 
5496 		for (i = 0; i < sense_len; i++) {
5497 			if (ddi_copyout(
5498 			    (uint8_t *)cmd->sense+i,
5499 			    (uint8_t *)sense_ubuf+i, 1, mode)) {
5500 				con_log(CL_ANN, (CE_WARN,
5501 				    "issue_mfi_pthru : "
5502 				    "copy to user space failed"));
5503 			}
5504 			con_log(CL_DLEVEL1, (CE_WARN,
5505 			    "Copying Sense info sense_buff[%d] = 0x%X",
5506 			    i, *((uint8_t *)cmd->sense + i)));
5507 		}
5508 	}
5509 	(void) ddi_dma_sync(cmd->frame_dma_obj.dma_handle, 0, 0,
5510 	    DDI_DMA_SYNC_FORDEV);
5511 
5512 	if (xferlen) {
5513 		/* free kernel buffer */
5514 		if (mrsas_free_dma_obj(instance, pthru_dma_obj) != DDI_SUCCESS)
5515 			return (DDI_FAILURE);
5516 	}
5517 
5518 	return (DDI_SUCCESS);
5519 }
5520 
5521 /*
5522  * issue_mfi_dcmd
5523  */
5524 static int
issue_mfi_dcmd(struct mrsas_instance * instance,struct mrsas_ioctl * ioctl,struct mrsas_cmd * cmd,int mode)5525 issue_mfi_dcmd(struct mrsas_instance *instance, struct mrsas_ioctl *ioctl,
5526     struct mrsas_cmd *cmd, int mode)
5527 {
5528 	void		*ubuf;
5529 	uint32_t	kphys_addr = 0;
5530 	uint32_t	xferlen = 0;
5531 	uint32_t	new_xfer_length = 0;
5532 	uint32_t	model;
5533 	dma_obj_t	dcmd_dma_obj;
5534 	struct mrsas_dcmd_frame	*kdcmd;
5535 	struct mrsas_dcmd_frame	*dcmd;
5536 	ddi_acc_handle_t	acc_handle = cmd->frame_dma_obj.acc_handle;
5537 	int i;
5538 	dcmd = &cmd->frame->dcmd;
5539 	kdcmd = (struct mrsas_dcmd_frame *)&ioctl->frame[0];
5540 
5541 	if (instance->adapterresetinprogress) {
5542 		con_log(CL_ANN1, (CE_NOTE, "Reset flag set, "
5543 		"returning mfi_pkt and setting TRAN_BUSY"));
5544 		return (DDI_FAILURE);
5545 	}
5546 	model = ddi_model_convert_from(mode & FMODELS);
5547 	if (model == DDI_MODEL_ILP32) {
5548 		con_log(CL_ANN1, (CE_CONT, "issue_mfi_dcmd: DDI_MODEL_ILP32"));
5549 
5550 		xferlen	= kdcmd->sgl.sge32[0].length;
5551 
5552 		ubuf	= (void *)(ulong_t)kdcmd->sgl.sge32[0].phys_addr;
5553 	} else {
5554 #ifdef _ILP32
5555 		con_log(CL_ANN1, (CE_CONT, "issue_mfi_dcmd: DDI_MODEL_ILP32"));
5556 		xferlen	= kdcmd->sgl.sge32[0].length;
5557 		ubuf	= (void *)(ulong_t)kdcmd->sgl.sge32[0].phys_addr;
5558 #else
5559 		con_log(CL_ANN1, (CE_CONT, "issue_mfi_dcmd: DDI_MODEL_LP64"));
5560 		xferlen	= kdcmd->sgl.sge64[0].length;
5561 		ubuf	= (void *)(ulong_t)kdcmd->sgl.sge64[0].phys_addr;
5562 #endif
5563 	}
5564 	if (xferlen) {
5565 		/* means IOCTL requires DMA */
5566 		/* allocate the data transfer buffer */
5567 		/* dcmd_dma_obj.size = xferlen; */
5568 		MRSAS_GET_BOUNDARY_ALIGNED_LEN(xferlen, new_xfer_length,
5569 		    PAGESIZE);
5570 		dcmd_dma_obj.size = new_xfer_length;
5571 		dcmd_dma_obj.dma_attr = mrsas_generic_dma_attr;
5572 		dcmd_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
5573 		dcmd_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
5574 		dcmd_dma_obj.dma_attr.dma_attr_sgllen = 1;
5575 		dcmd_dma_obj.dma_attr.dma_attr_align = 1;
5576 
5577 		/* allocate kernel buffer for DMA */
5578 			if (mrsas_alloc_dma_obj(instance, &dcmd_dma_obj,
5579 			    (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
5580 				con_log(CL_ANN,
5581 				    (CE_WARN, "issue_mfi_dcmd: could not "
5582 				    "allocate data transfer buffer."));
5583 				return (DDI_FAILURE);
5584 			}
5585 		(void) memset(dcmd_dma_obj.buffer, 0, xferlen);
5586 
5587 		/* If IOCTL requires DMA WRITE, do ddi_copyin IOCTL data copy */
5588 		if (kdcmd->flags & MFI_FRAME_DIR_WRITE) {
5589 			for (i = 0; i < xferlen; i++) {
5590 				if (ddi_copyin((uint8_t *)ubuf + i,
5591 				    (uint8_t *)dcmd_dma_obj.buffer + i,
5592 				    1, mode)) {
5593 					con_log(CL_ANN, (CE_WARN,
5594 					    "issue_mfi_dcmd : "
5595 					    "copy from user space failed"));
5596 					return (DDI_FAILURE);
5597 				}
5598 			}
5599 		}
5600 
5601 		kphys_addr = dcmd_dma_obj.dma_cookie[0].dmac_address;
5602 	}
5603 
5604 	ddi_put8(acc_handle, &dcmd->cmd, kdcmd->cmd);
5605 	ddi_put8(acc_handle, &dcmd->cmd_status, 0);
5606 	ddi_put8(acc_handle, &dcmd->sge_count, kdcmd->sge_count);
5607 	ddi_put16(acc_handle, &dcmd->timeout, kdcmd->timeout);
5608 	ddi_put32(acc_handle, &dcmd->data_xfer_len, kdcmd->data_xfer_len);
5609 	ddi_put32(acc_handle, &dcmd->opcode, kdcmd->opcode);
5610 
5611 	ddi_rep_put8(acc_handle, (uint8_t *)kdcmd->mbox.b,
5612 	    (uint8_t *)dcmd->mbox.b, DCMD_MBOX_SZ, DDI_DEV_AUTOINCR);
5613 
5614 	ddi_put16(acc_handle, &dcmd->flags, kdcmd->flags & ~MFI_FRAME_SGL64);
5615 	ddi_put32(acc_handle, &dcmd->sgl.sge32[0].length, xferlen);
5616 	ddi_put32(acc_handle, &dcmd->sgl.sge32[0].phys_addr, kphys_addr);
5617 
5618 	cmd->sync_cmd = MRSAS_TRUE;
5619 	cmd->frame_count = 1;
5620 
5621 	if (instance->tbolt) {
5622 		mr_sas_tbolt_build_mfi_cmd(instance, cmd);
5623 	}
5624 
5625 	if (instance->func_ptr->issue_cmd_in_sync_mode(instance, cmd)) {
5626 		con_log(CL_ANN, (CE_WARN, "issue_mfi_dcmd: fw_ioctl failed"));
5627 	} else {
5628 		if (xferlen && (kdcmd->flags & MFI_FRAME_DIR_READ)) {
5629 			for (i = 0; i < xferlen; i++) {
5630 				if (ddi_copyout(
5631 				    (uint8_t *)dcmd_dma_obj.buffer + i,
5632 				    (uint8_t *)ubuf + i,
5633 				    1, mode)) {
5634 					con_log(CL_ANN, (CE_WARN,
5635 					    "issue_mfi_dcmd : "
5636 					    "copy to user space failed"));
5637 					return (DDI_FAILURE);
5638 				}
5639 			}
5640 		}
5641 	}
5642 
5643 	kdcmd->cmd_status = ddi_get8(acc_handle, &dcmd->cmd_status);
5644 	con_log(CL_ANN,
5645 	    (CE_CONT, "issue_mfi_dcmd: cmd_status %x", kdcmd->cmd_status));
5646 	DTRACE_PROBE3(issue_dcmd, uint32_t, kdcmd->opcode, uint8_t,
5647 	    kdcmd->cmd, uint8_t, kdcmd->cmd_status);
5648 
5649 	if (xferlen) {
5650 		/* free kernel buffer */
5651 		if (mrsas_free_dma_obj(instance, dcmd_dma_obj) != DDI_SUCCESS)
5652 			return (DDI_FAILURE);
5653 	}
5654 
5655 	return (DDI_SUCCESS);
5656 }
5657 
5658 /*
5659  * issue_mfi_smp
5660  */
5661 static int
issue_mfi_smp(struct mrsas_instance * instance,struct mrsas_ioctl * ioctl,struct mrsas_cmd * cmd,int mode)5662 issue_mfi_smp(struct mrsas_instance *instance, struct mrsas_ioctl *ioctl,
5663     struct mrsas_cmd *cmd, int mode)
5664 {
5665 	void		*request_ubuf;
5666 	void		*response_ubuf;
5667 	uint32_t	request_xferlen = 0;
5668 	uint32_t	response_xferlen = 0;
5669 	uint32_t	new_xfer_length1 = 0;
5670 	uint32_t	new_xfer_length2 = 0;
5671 	uint_t		model;
5672 	dma_obj_t			request_dma_obj;
5673 	dma_obj_t			response_dma_obj;
5674 	ddi_acc_handle_t	acc_handle = cmd->frame_dma_obj.acc_handle;
5675 	struct mrsas_smp_frame		*ksmp;
5676 	struct mrsas_smp_frame		*smp;
5677 	struct mrsas_sge32		*sge32;
5678 #ifndef _ILP32
5679 	struct mrsas_sge64		*sge64;
5680 #endif
5681 	int i;
5682 	uint64_t			tmp_sas_addr;
5683 
5684 	smp = &cmd->frame->smp;
5685 	ksmp = (struct mrsas_smp_frame *)&ioctl->frame[0];
5686 
5687 	if (instance->adapterresetinprogress) {
5688 		con_log(CL_ANN1, (CE_WARN, "Reset flag set, "
5689 		"returning mfi_pkt and setting TRAN_BUSY\n"));
5690 		return (DDI_FAILURE);
5691 	}
5692 	model = ddi_model_convert_from(mode & FMODELS);
5693 	if (model == DDI_MODEL_ILP32) {
5694 		con_log(CL_ANN1, (CE_CONT, "issue_mfi_smp: DDI_MODEL_ILP32"));
5695 
5696 		sge32			= &ksmp->sgl[0].sge32[0];
5697 		response_xferlen	= sge32[0].length;
5698 		request_xferlen		= sge32[1].length;
5699 		con_log(CL_ANN, (CE_CONT, "issue_mfi_smp: "
5700 		    "response_xferlen = %x, request_xferlen = %x",
5701 		    response_xferlen, request_xferlen));
5702 
5703 		response_ubuf	= (void *)(ulong_t)sge32[0].phys_addr;
5704 		request_ubuf	= (void *)(ulong_t)sge32[1].phys_addr;
5705 		con_log(CL_ANN1, (CE_CONT, "issue_mfi_smp: "
5706 		    "response_ubuf = %p, request_ubuf = %p",
5707 		    response_ubuf, request_ubuf));
5708 	} else {
5709 #ifdef _ILP32
5710 		con_log(CL_ANN1, (CE_CONT, "issue_mfi_smp: DDI_MODEL_ILP32"));
5711 
5712 		sge32			= &ksmp->sgl[0].sge32[0];
5713 		response_xferlen	= sge32[0].length;
5714 		request_xferlen		= sge32[1].length;
5715 		con_log(CL_ANN, (CE_CONT, "issue_mfi_smp: "
5716 		    "response_xferlen = %x, request_xferlen = %x",
5717 		    response_xferlen, request_xferlen));
5718 
5719 		response_ubuf	= (void *)(ulong_t)sge32[0].phys_addr;
5720 		request_ubuf	= (void *)(ulong_t)sge32[1].phys_addr;
5721 		con_log(CL_ANN1, (CE_CONT, "issue_mfi_smp: "
5722 		    "response_ubuf = %p, request_ubuf = %p",
5723 		    response_ubuf, request_ubuf));
5724 #else
5725 		con_log(CL_ANN1, (CE_CONT, "issue_mfi_smp: DDI_MODEL_LP64"));
5726 
5727 		sge64			= &ksmp->sgl[0].sge64[0];
5728 		response_xferlen	= sge64[0].length;
5729 		request_xferlen		= sge64[1].length;
5730 
5731 		response_ubuf	= (void *)(ulong_t)sge64[0].phys_addr;
5732 		request_ubuf	= (void *)(ulong_t)sge64[1].phys_addr;
5733 #endif
5734 	}
5735 	if (request_xferlen) {
5736 		/* means IOCTL requires DMA */
5737 		/* allocate the data transfer buffer */
5738 		/* request_dma_obj.size = request_xferlen; */
5739 		MRSAS_GET_BOUNDARY_ALIGNED_LEN(request_xferlen,
5740 		    new_xfer_length1, PAGESIZE);
5741 		request_dma_obj.size = new_xfer_length1;
5742 		request_dma_obj.dma_attr = mrsas_generic_dma_attr;
5743 		request_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
5744 		request_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
5745 		request_dma_obj.dma_attr.dma_attr_sgllen = 1;
5746 		request_dma_obj.dma_attr.dma_attr_align = 1;
5747 
5748 		/* allocate kernel buffer for DMA */
5749 		if (mrsas_alloc_dma_obj(instance, &request_dma_obj,
5750 		    (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
5751 			con_log(CL_ANN, (CE_WARN, "issue_mfi_smp: "
5752 			    "could not allocate data transfer buffer."));
5753 			return (DDI_FAILURE);
5754 		}
5755 		(void) memset(request_dma_obj.buffer, 0, request_xferlen);
5756 
5757 		/* If IOCTL requires DMA WRITE, do ddi_copyin IOCTL data copy */
5758 		for (i = 0; i < request_xferlen; i++) {
5759 			if (ddi_copyin((uint8_t *)request_ubuf + i,
5760 			    (uint8_t *)request_dma_obj.buffer + i,
5761 			    1, mode)) {
5762 				con_log(CL_ANN, (CE_WARN, "issue_mfi_smp: "
5763 				    "copy from user space failed"));
5764 				return (DDI_FAILURE);
5765 			}
5766 		}
5767 	}
5768 
5769 	if (response_xferlen) {
5770 		/* means IOCTL requires DMA */
5771 		/* allocate the data transfer buffer */
5772 		/* response_dma_obj.size = response_xferlen; */
5773 		MRSAS_GET_BOUNDARY_ALIGNED_LEN(response_xferlen,
5774 		    new_xfer_length2, PAGESIZE);
5775 		response_dma_obj.size = new_xfer_length2;
5776 		response_dma_obj.dma_attr = mrsas_generic_dma_attr;
5777 		response_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
5778 		response_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
5779 		response_dma_obj.dma_attr.dma_attr_sgllen = 1;
5780 		response_dma_obj.dma_attr.dma_attr_align = 1;
5781 
5782 		/* allocate kernel buffer for DMA */
5783 		if (mrsas_alloc_dma_obj(instance, &response_dma_obj,
5784 		    (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
5785 			con_log(CL_ANN, (CE_WARN, "issue_mfi_smp: "
5786 			    "could not allocate data transfer buffer."));
5787 			return (DDI_FAILURE);
5788 		}
5789 		(void) memset(response_dma_obj.buffer, 0, response_xferlen);
5790 
5791 		/* If IOCTL requires DMA WRITE, do ddi_copyin IOCTL data copy */
5792 		for (i = 0; i < response_xferlen; i++) {
5793 			if (ddi_copyin((uint8_t *)response_ubuf + i,
5794 			    (uint8_t *)response_dma_obj.buffer + i,
5795 			    1, mode)) {
5796 				con_log(CL_ANN, (CE_WARN, "issue_mfi_smp: "
5797 				    "copy from user space failed"));
5798 				return (DDI_FAILURE);
5799 			}
5800 		}
5801 	}
5802 
5803 	ddi_put8(acc_handle, &smp->cmd, ksmp->cmd);
5804 	ddi_put8(acc_handle, &smp->cmd_status, 0);
5805 	ddi_put8(acc_handle, &smp->connection_status, 0);
5806 	ddi_put8(acc_handle, &smp->sge_count, ksmp->sge_count);
5807 	/* smp->context		= ksmp->context; */
5808 	ddi_put16(acc_handle, &smp->timeout, ksmp->timeout);
5809 	ddi_put32(acc_handle, &smp->data_xfer_len, ksmp->data_xfer_len);
5810 
5811 	bcopy((void *)&ksmp->sas_addr, (void *)&tmp_sas_addr,
5812 	    sizeof (uint64_t));
5813 	ddi_put64(acc_handle, &smp->sas_addr, tmp_sas_addr);
5814 
5815 	ddi_put16(acc_handle, &smp->flags, ksmp->flags & ~MFI_FRAME_SGL64);
5816 
5817 	model = ddi_model_convert_from(mode & FMODELS);
5818 	if (model == DDI_MODEL_ILP32) {
5819 		con_log(CL_ANN1, (CE_CONT,
5820 		    "issue_mfi_smp: DDI_MODEL_ILP32"));
5821 
5822 		sge32 = &smp->sgl[0].sge32[0];
5823 		ddi_put32(acc_handle, &sge32[0].length, response_xferlen);
5824 		ddi_put32(acc_handle, &sge32[0].phys_addr,
5825 		    response_dma_obj.dma_cookie[0].dmac_address);
5826 		ddi_put32(acc_handle, &sge32[1].length, request_xferlen);
5827 		ddi_put32(acc_handle, &sge32[1].phys_addr,
5828 		    request_dma_obj.dma_cookie[0].dmac_address);
5829 	} else {
5830 #ifdef _ILP32
5831 		con_log(CL_ANN1, (CE_CONT,
5832 		    "issue_mfi_smp: DDI_MODEL_ILP32"));
5833 		sge32 = &smp->sgl[0].sge32[0];
5834 		ddi_put32(acc_handle, &sge32[0].length, response_xferlen);
5835 		ddi_put32(acc_handle, &sge32[0].phys_addr,
5836 		    response_dma_obj.dma_cookie[0].dmac_address);
5837 		ddi_put32(acc_handle, &sge32[1].length, request_xferlen);
5838 		ddi_put32(acc_handle, &sge32[1].phys_addr,
5839 		    request_dma_obj.dma_cookie[0].dmac_address);
5840 #else
5841 		con_log(CL_ANN1, (CE_CONT,
5842 		    "issue_mfi_smp: DDI_MODEL_LP64"));
5843 		sge64 = &smp->sgl[0].sge64[0];
5844 		ddi_put32(acc_handle, &sge64[0].length, response_xferlen);
5845 		ddi_put64(acc_handle, &sge64[0].phys_addr,
5846 		    response_dma_obj.dma_cookie[0].dmac_address);
5847 		ddi_put32(acc_handle, &sge64[1].length, request_xferlen);
5848 		ddi_put64(acc_handle, &sge64[1].phys_addr,
5849 		    request_dma_obj.dma_cookie[0].dmac_address);
5850 #endif
5851 	}
5852 	con_log(CL_ANN1, (CE_CONT, "issue_mfi_smp : "
5853 	    "smp->response_xferlen = %d, smp->request_xferlen = %d "
5854 	    "smp->data_xfer_len = %d", ddi_get32(acc_handle, &sge32[0].length),
5855 	    ddi_get32(acc_handle, &sge32[1].length),
5856 	    ddi_get32(acc_handle, &smp->data_xfer_len)));
5857 
5858 	cmd->sync_cmd = MRSAS_TRUE;
5859 	cmd->frame_count = 1;
5860 
5861 	if (instance->tbolt) {
5862 		mr_sas_tbolt_build_mfi_cmd(instance, cmd);
5863 	}
5864 
5865 	if (instance->func_ptr->issue_cmd_in_sync_mode(instance, cmd)) {
5866 		con_log(CL_ANN, (CE_WARN,
5867 		    "issue_mfi_smp: fw_ioctl failed"));
5868 	} else {
5869 		con_log(CL_ANN1, (CE_CONT,
5870 		    "issue_mfi_smp: copy to user space"));
5871 
5872 		if (request_xferlen) {
5873 			for (i = 0; i < request_xferlen; i++) {
5874 				if (ddi_copyout(
5875 				    (uint8_t *)request_dma_obj.buffer +
5876 				    i, (uint8_t *)request_ubuf + i,
5877 				    1, mode)) {
5878 					con_log(CL_ANN, (CE_WARN,
5879 					    "issue_mfi_smp : copy to user space"
5880 					    " failed"));
5881 					return (DDI_FAILURE);
5882 				}
5883 			}
5884 		}
5885 
5886 		if (response_xferlen) {
5887 			for (i = 0; i < response_xferlen; i++) {
5888 				if (ddi_copyout(
5889 				    (uint8_t *)response_dma_obj.buffer
5890 				    + i, (uint8_t *)response_ubuf
5891 				    + i, 1, mode)) {
5892 					con_log(CL_ANN, (CE_WARN,
5893 					    "issue_mfi_smp : copy to "
5894 					    "user space failed"));
5895 					return (DDI_FAILURE);
5896 				}
5897 			}
5898 		}
5899 	}
5900 
5901 	ksmp->cmd_status = ddi_get8(acc_handle, &smp->cmd_status);
5902 	con_log(CL_ANN1, (CE_NOTE, "issue_mfi_smp: smp->cmd_status = %d",
5903 	    ksmp->cmd_status));
5904 	DTRACE_PROBE2(issue_smp, uint8_t, ksmp->cmd, uint8_t, ksmp->cmd_status);
5905 
5906 	if (request_xferlen) {
5907 		/* free kernel buffer */
5908 		if (mrsas_free_dma_obj(instance, request_dma_obj) !=
5909 		    DDI_SUCCESS)
5910 			return (DDI_FAILURE);
5911 	}
5912 
5913 	if (response_xferlen) {
5914 		/* free kernel buffer */
5915 		if (mrsas_free_dma_obj(instance, response_dma_obj) !=
5916 		    DDI_SUCCESS)
5917 			return (DDI_FAILURE);
5918 	}
5919 
5920 	return (DDI_SUCCESS);
5921 }
5922 
5923 /*
5924  * issue_mfi_stp
5925  */
5926 static int
issue_mfi_stp(struct mrsas_instance * instance,struct mrsas_ioctl * ioctl,struct mrsas_cmd * cmd,int mode)5927 issue_mfi_stp(struct mrsas_instance *instance, struct mrsas_ioctl *ioctl,
5928     struct mrsas_cmd *cmd, int mode)
5929 {
5930 	void		*fis_ubuf;
5931 	void		*data_ubuf;
5932 	uint32_t	fis_xferlen = 0;
5933 	uint32_t   new_xfer_length1 = 0;
5934 	uint32_t   new_xfer_length2 = 0;
5935 	uint32_t	data_xferlen = 0;
5936 	uint_t		model;
5937 	dma_obj_t	fis_dma_obj;
5938 	dma_obj_t	data_dma_obj;
5939 	struct mrsas_stp_frame	*kstp;
5940 	struct mrsas_stp_frame	*stp;
5941 	ddi_acc_handle_t	acc_handle = cmd->frame_dma_obj.acc_handle;
5942 	int i;
5943 
5944 	stp = &cmd->frame->stp;
5945 	kstp = (struct mrsas_stp_frame *)&ioctl->frame[0];
5946 
5947 	if (instance->adapterresetinprogress) {
5948 		con_log(CL_ANN1, (CE_WARN, "Reset flag set, "
5949 		"returning mfi_pkt and setting TRAN_BUSY\n"));
5950 		return (DDI_FAILURE);
5951 	}
5952 	model = ddi_model_convert_from(mode & FMODELS);
5953 	if (model == DDI_MODEL_ILP32) {
5954 		con_log(CL_ANN1, (CE_CONT, "issue_mfi_stp: DDI_MODEL_ILP32"));
5955 
5956 		fis_xferlen	= kstp->sgl.sge32[0].length;
5957 		data_xferlen	= kstp->sgl.sge32[1].length;
5958 
5959 		fis_ubuf	= (void *)(ulong_t)kstp->sgl.sge32[0].phys_addr;
5960 		data_ubuf	= (void *)(ulong_t)kstp->sgl.sge32[1].phys_addr;
5961 	} else {
5962 #ifdef _ILP32
5963 		con_log(CL_ANN1, (CE_CONT, "issue_mfi_stp: DDI_MODEL_ILP32"));
5964 
5965 		fis_xferlen	= kstp->sgl.sge32[0].length;
5966 		data_xferlen	= kstp->sgl.sge32[1].length;
5967 
5968 		fis_ubuf	= (void *)(ulong_t)kstp->sgl.sge32[0].phys_addr;
5969 		data_ubuf	= (void *)(ulong_t)kstp->sgl.sge32[1].phys_addr;
5970 #else
5971 		con_log(CL_ANN1, (CE_CONT, "issue_mfi_stp: DDI_MODEL_LP64"));
5972 
5973 		fis_xferlen	= kstp->sgl.sge64[0].length;
5974 		data_xferlen	= kstp->sgl.sge64[1].length;
5975 
5976 		fis_ubuf	= (void *)(ulong_t)kstp->sgl.sge64[0].phys_addr;
5977 		data_ubuf	= (void *)(ulong_t)kstp->sgl.sge64[1].phys_addr;
5978 #endif
5979 	}
5980 
5981 
5982 	if (fis_xferlen) {
5983 		con_log(CL_ANN, (CE_CONT, "issue_mfi_stp: "
5984 		    "fis_ubuf = %p fis_xferlen = %x", fis_ubuf, fis_xferlen));
5985 
5986 		/* means IOCTL requires DMA */
5987 		/* allocate the data transfer buffer */
5988 		/* fis_dma_obj.size = fis_xferlen; */
5989 		MRSAS_GET_BOUNDARY_ALIGNED_LEN(fis_xferlen,
5990 		    new_xfer_length1, PAGESIZE);
5991 		fis_dma_obj.size = new_xfer_length1;
5992 		fis_dma_obj.dma_attr = mrsas_generic_dma_attr;
5993 		fis_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
5994 		fis_dma_obj.dma_attr.dma_attr_count_max	= 0xFFFFFFFFU;
5995 		fis_dma_obj.dma_attr.dma_attr_sgllen = 1;
5996 		fis_dma_obj.dma_attr.dma_attr_align = 1;
5997 
5998 		/* allocate kernel buffer for DMA */
5999 		if (mrsas_alloc_dma_obj(instance, &fis_dma_obj,
6000 		    (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
6001 			con_log(CL_ANN, (CE_WARN, "issue_mfi_stp : "
6002 			    "could not allocate data transfer buffer."));
6003 			return (DDI_FAILURE);
6004 		}
6005 		(void) memset(fis_dma_obj.buffer, 0, fis_xferlen);
6006 
6007 		/* If IOCTL requires DMA WRITE, do ddi_copyin IOCTL data copy */
6008 		for (i = 0; i < fis_xferlen; i++) {
6009 			if (ddi_copyin((uint8_t *)fis_ubuf + i,
6010 			    (uint8_t *)fis_dma_obj.buffer + i, 1, mode)) {
6011 				con_log(CL_ANN, (CE_WARN, "issue_mfi_stp: "
6012 				    "copy from user space failed"));
6013 				return (DDI_FAILURE);
6014 			}
6015 		}
6016 	}
6017 
6018 	if (data_xferlen) {
6019 		con_log(CL_ANN, (CE_CONT, "issue_mfi_stp: data_ubuf = %p "
6020 		    "data_xferlen = %x", data_ubuf, data_xferlen));
6021 
6022 		/* means IOCTL requires DMA */
6023 		/* allocate the data transfer buffer */
6024 		/* data_dma_obj.size = data_xferlen; */
6025 		MRSAS_GET_BOUNDARY_ALIGNED_LEN(data_xferlen, new_xfer_length2,
6026 		    PAGESIZE);
6027 		data_dma_obj.size = new_xfer_length2;
6028 		data_dma_obj.dma_attr = mrsas_generic_dma_attr;
6029 		data_dma_obj.dma_attr.dma_attr_addr_hi = 0xFFFFFFFFU;
6030 		data_dma_obj.dma_attr.dma_attr_count_max = 0xFFFFFFFFU;
6031 		data_dma_obj.dma_attr.dma_attr_sgllen = 1;
6032 		data_dma_obj.dma_attr.dma_attr_align = 1;
6033 
6034 		/* allocate kernel buffer for DMA */
6035 		if (mrsas_alloc_dma_obj(instance, &data_dma_obj,
6036 		    (uchar_t)DDI_STRUCTURE_LE_ACC) != 1) {
6037 			con_log(CL_ANN, (CE_WARN, "issue_mfi_stp: "
6038 			    "could not allocate data transfer buffer."));
6039 			return (DDI_FAILURE);
6040 		}
6041 		(void) memset(data_dma_obj.buffer, 0, data_xferlen);
6042 
6043 		/* If IOCTL requires DMA WRITE, do ddi_copyin IOCTL data copy */
6044 		for (i = 0; i < data_xferlen; i++) {
6045 			if (ddi_copyin((uint8_t *)data_ubuf + i,
6046 			    (uint8_t *)data_dma_obj.buffer + i, 1, mode)) {
6047 				con_log(CL_ANN, (CE_WARN, "issue_mfi_stp: "
6048 				    "copy from user space failed"));
6049 				return (DDI_FAILURE);
6050 			}
6051 		}
6052 	}
6053 
6054 	ddi_put8(acc_handle, &stp->cmd, kstp->cmd);
6055 	ddi_put8(acc_handle, &stp->cmd_status, 0);
6056 	ddi_put8(acc_handle, &stp->connection_status, 0);
6057 	ddi_put8(acc_handle, &stp->target_id, kstp->target_id);
6058 	ddi_put8(acc_handle, &stp->sge_count, kstp->sge_count);
6059 
6060 	ddi_put16(acc_handle, &stp->timeout, kstp->timeout);
6061 	ddi_put32(acc_handle, &stp->data_xfer_len, kstp->data_xfer_len);
6062 
6063 	ddi_rep_put8(acc_handle, (uint8_t *)kstp->fis, (uint8_t *)stp->fis, 10,
6064 	    DDI_DEV_AUTOINCR);
6065 
6066 	ddi_put16(acc_handle, &stp->flags, kstp->flags & ~MFI_FRAME_SGL64);
6067 	ddi_put32(acc_handle, &stp->stp_flags, kstp->stp_flags);
6068 	ddi_put32(acc_handle, &stp->sgl.sge32[0].length, fis_xferlen);
6069 	ddi_put32(acc_handle, &stp->sgl.sge32[0].phys_addr,
6070 	    fis_dma_obj.dma_cookie[0].dmac_address);
6071 	ddi_put32(acc_handle, &stp->sgl.sge32[1].length, data_xferlen);
6072 	ddi_put32(acc_handle, &stp->sgl.sge32[1].phys_addr,
6073 	    data_dma_obj.dma_cookie[0].dmac_address);
6074 
6075 	cmd->sync_cmd = MRSAS_TRUE;
6076 	cmd->frame_count = 1;
6077 
6078 	if (instance->tbolt) {
6079 		mr_sas_tbolt_build_mfi_cmd(instance, cmd);
6080 	}
6081 
6082 	if (instance->func_ptr->issue_cmd_in_sync_mode(instance, cmd)) {
6083 		con_log(CL_ANN, (CE_WARN, "issue_mfi_stp: fw_ioctl failed"));
6084 	} else {
6085 
6086 		if (fis_xferlen) {
6087 			for (i = 0; i < fis_xferlen; i++) {
6088 				if (ddi_copyout(
6089 				    (uint8_t *)fis_dma_obj.buffer + i,
6090 				    (uint8_t *)fis_ubuf + i, 1, mode)) {
6091 					con_log(CL_ANN, (CE_WARN,
6092 					    "issue_mfi_stp : copy to "
6093 					    "user space failed"));
6094 					return (DDI_FAILURE);
6095 				}
6096 			}
6097 		}
6098 	}
6099 	if (data_xferlen) {
6100 		for (i = 0; i < data_xferlen; i++) {
6101 			if (ddi_copyout(
6102 			    (uint8_t *)data_dma_obj.buffer + i,
6103 			    (uint8_t *)data_ubuf + i, 1, mode)) {
6104 				con_log(CL_ANN, (CE_WARN,
6105 				    "issue_mfi_stp : copy to"
6106 				    " user space failed"));
6107 				return (DDI_FAILURE);
6108 			}
6109 		}
6110 	}
6111 
6112 	kstp->cmd_status = ddi_get8(acc_handle, &stp->cmd_status);
6113 	con_log(CL_ANN1, (CE_NOTE, "issue_mfi_stp: stp->cmd_status = %d",
6114 	    kstp->cmd_status));
6115 	DTRACE_PROBE2(issue_stp, uint8_t, kstp->cmd, uint8_t, kstp->cmd_status);
6116 
6117 	if (fis_xferlen) {
6118 		/* free kernel buffer */
6119 		if (mrsas_free_dma_obj(instance, fis_dma_obj) != DDI_SUCCESS)
6120 			return (DDI_FAILURE);
6121 	}
6122 
6123 	if (data_xferlen) {
6124 		/* free kernel buffer */
6125 		if (mrsas_free_dma_obj(instance, data_dma_obj) != DDI_SUCCESS)
6126 			return (DDI_FAILURE);
6127 	}
6128 
6129 	return (DDI_SUCCESS);
6130 }
6131 
6132 /*
6133  * fill_up_drv_ver
6134  */
6135 void
fill_up_drv_ver(struct mrsas_drv_ver * dv)6136 fill_up_drv_ver(struct mrsas_drv_ver *dv)
6137 {
6138 	(void) memset(dv, 0, sizeof (struct mrsas_drv_ver));
6139 
6140 	(void) memcpy(dv->signature, "$LSI LOGIC$", strlen("$LSI LOGIC$"));
6141 	(void) memcpy(dv->os_name, "Solaris", strlen("Solaris"));
6142 	(void) memcpy(dv->drv_name, "mr_sas", strlen("mr_sas"));
6143 	(void) memcpy(dv->drv_ver, MRSAS_VERSION, strlen(MRSAS_VERSION));
6144 	(void) memcpy(dv->drv_rel_date, MRSAS_RELDATE,
6145 	    strlen(MRSAS_RELDATE));
6146 
6147 }
6148 
6149 /*
6150  * handle_drv_ioctl
6151  */
6152 static int
handle_drv_ioctl(struct mrsas_instance * instance,struct mrsas_ioctl * ioctl,int mode)6153 handle_drv_ioctl(struct mrsas_instance *instance, struct mrsas_ioctl *ioctl,
6154     int mode)
6155 {
6156 	int	i;
6157 	int	rval = DDI_SUCCESS;
6158 	int	*props = NULL;
6159 	void	*ubuf;
6160 
6161 	uint8_t		*pci_conf_buf;
6162 	uint32_t	xferlen;
6163 	uint32_t	num_props;
6164 	uint_t		model;
6165 	struct mrsas_dcmd_frame	*kdcmd;
6166 	struct mrsas_drv_ver	dv;
6167 	struct mrsas_pci_information pi;
6168 
6169 	kdcmd = (struct mrsas_dcmd_frame *)&ioctl->frame[0];
6170 
6171 	model = ddi_model_convert_from(mode & FMODELS);
6172 	if (model == DDI_MODEL_ILP32) {
6173 		con_log(CL_ANN1, (CE_CONT,
6174 		    "handle_drv_ioctl: DDI_MODEL_ILP32"));
6175 
6176 		xferlen	= kdcmd->sgl.sge32[0].length;
6177 
6178 		ubuf = (void *)(ulong_t)kdcmd->sgl.sge32[0].phys_addr;
6179 	} else {
6180 #ifdef _ILP32
6181 		con_log(CL_ANN1, (CE_CONT,
6182 		    "handle_drv_ioctl: DDI_MODEL_ILP32"));
6183 		xferlen	= kdcmd->sgl.sge32[0].length;
6184 		ubuf = (void *)(ulong_t)kdcmd->sgl.sge32[0].phys_addr;
6185 #else
6186 		con_log(CL_ANN1, (CE_CONT,
6187 		    "handle_drv_ioctl: DDI_MODEL_LP64"));
6188 		xferlen	= kdcmd->sgl.sge64[0].length;
6189 		ubuf = (void *)(ulong_t)kdcmd->sgl.sge64[0].phys_addr;
6190 #endif
6191 	}
6192 	con_log(CL_ANN1, (CE_CONT, "handle_drv_ioctl: "
6193 	    "dataBuf=%p size=%d bytes", ubuf, xferlen));
6194 
6195 	switch (kdcmd->opcode) {
6196 	case MRSAS_DRIVER_IOCTL_DRIVER_VERSION:
6197 		con_log(CL_ANN1, (CE_CONT, "handle_drv_ioctl: "
6198 		    "MRSAS_DRIVER_IOCTL_DRIVER_VERSION"));
6199 
6200 		fill_up_drv_ver(&dv);
6201 
6202 		if (ddi_copyout(&dv, ubuf, xferlen, mode)) {
6203 			con_log(CL_ANN, (CE_WARN, "handle_drv_ioctl: "
6204 			    "MRSAS_DRIVER_IOCTL_DRIVER_VERSION : "
6205 			    "copy to user space failed"));
6206 			kdcmd->cmd_status = 1;
6207 			rval = 1;
6208 		} else {
6209 			kdcmd->cmd_status = 0;
6210 		}
6211 		break;
6212 	case MRSAS_DRIVER_IOCTL_PCI_INFORMATION:
6213 		con_log(CL_ANN1, (CE_NOTE, "handle_drv_ioctl: "
6214 		    "MRSAS_DRIVER_IOCTL_PCI_INFORMAITON"));
6215 
6216 		if (ddi_prop_lookup_int_array(DDI_DEV_T_ANY, instance->dip,
6217 		    0, "reg", &props, &num_props)) {
6218 			con_log(CL_ANN, (CE_WARN, "handle_drv_ioctl: "
6219 			    "MRSAS_DRIVER_IOCTL_PCI_INFORMATION : "
6220 			    "ddi_prop_look_int_array failed"));
6221 			rval = DDI_FAILURE;
6222 		} else {
6223 
6224 			pi.busNumber = (props[0] >> 16) & 0xFF;
6225 			pi.deviceNumber = (props[0] >> 11) & 0x1f;
6226 			pi.functionNumber = (props[0] >> 8) & 0x7;
6227 			ddi_prop_free((void *)props);
6228 		}
6229 
6230 		pci_conf_buf = (uint8_t *)&pi.pciHeaderInfo;
6231 
6232 		for (i = 0; i < (sizeof (struct mrsas_pci_information) -
6233 		    offsetof(struct mrsas_pci_information, pciHeaderInfo));
6234 		    i++) {
6235 			pci_conf_buf[i] =
6236 			    pci_config_get8(instance->pci_handle, i);
6237 		}
6238 
6239 		if (ddi_copyout(&pi, ubuf, xferlen, mode)) {
6240 			con_log(CL_ANN, (CE_WARN, "handle_drv_ioctl: "
6241 			    "MRSAS_DRIVER_IOCTL_PCI_INFORMATION : "
6242 			    "copy to user space failed"));
6243 			kdcmd->cmd_status = 1;
6244 			rval = 1;
6245 		} else {
6246 			kdcmd->cmd_status = 0;
6247 		}
6248 		break;
6249 	default:
6250 		con_log(CL_ANN, (CE_WARN, "handle_drv_ioctl: "
6251 		    "invalid driver specific IOCTL opcode = 0x%x",
6252 		    kdcmd->opcode));
6253 		kdcmd->cmd_status = 1;
6254 		rval = DDI_FAILURE;
6255 		break;
6256 	}
6257 
6258 	return (rval);
6259 }
6260 
6261 /*
6262  * handle_mfi_ioctl
6263  */
6264 static int
handle_mfi_ioctl(struct mrsas_instance * instance,struct mrsas_ioctl * ioctl,int mode)6265 handle_mfi_ioctl(struct mrsas_instance *instance, struct mrsas_ioctl *ioctl,
6266     int mode)
6267 {
6268 	int	rval = DDI_SUCCESS;
6269 
6270 	struct mrsas_header	*hdr;
6271 	struct mrsas_cmd	*cmd;
6272 
6273 	if (instance->tbolt) {
6274 		cmd = get_raid_msg_mfi_pkt(instance);
6275 	} else {
6276 		cmd = mrsas_get_mfi_pkt(instance);
6277 	}
6278 	if (!cmd) {
6279 		con_log(CL_ANN, (CE_WARN, "mr_sas: "
6280 		    "failed to get a cmd packet"));
6281 		DTRACE_PROBE2(mfi_ioctl_err, uint16_t,
6282 		    instance->fw_outstanding, uint16_t, instance->max_fw_cmds);
6283 		return (DDI_FAILURE);
6284 	}
6285 
6286 	/* Clear the frame buffer and assign back the context id */
6287 	(void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
6288 	ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
6289 	    cmd->index);
6290 
6291 	hdr = (struct mrsas_header *)&ioctl->frame[0];
6292 
6293 	switch (ddi_get8(cmd->frame_dma_obj.acc_handle, &hdr->cmd)) {
6294 	case MFI_CMD_OP_DCMD:
6295 		rval = issue_mfi_dcmd(instance, ioctl, cmd, mode);
6296 		break;
6297 	case MFI_CMD_OP_SMP:
6298 		rval = issue_mfi_smp(instance, ioctl, cmd, mode);
6299 		break;
6300 	case MFI_CMD_OP_STP:
6301 		rval = issue_mfi_stp(instance, ioctl, cmd, mode);
6302 		break;
6303 	case MFI_CMD_OP_LD_SCSI:
6304 	case MFI_CMD_OP_PD_SCSI:
6305 		rval = issue_mfi_pthru(instance, ioctl, cmd, mode);
6306 		break;
6307 	default:
6308 		con_log(CL_ANN, (CE_WARN, "handle_mfi_ioctl: "
6309 		    "invalid mfi ioctl hdr->cmd = %d", hdr->cmd));
6310 		rval = DDI_FAILURE;
6311 		break;
6312 	}
6313 
6314 	if (mrsas_common_check(instance, cmd) != DDI_SUCCESS)
6315 		rval = DDI_FAILURE;
6316 
6317 	if (instance->tbolt) {
6318 		return_raid_msg_mfi_pkt(instance, cmd);
6319 	} else {
6320 		mrsas_return_mfi_pkt(instance, cmd);
6321 	}
6322 
6323 	return (rval);
6324 }
6325 
6326 /*
6327  * AEN
6328  */
6329 static int
handle_mfi_aen(struct mrsas_instance * instance,struct mrsas_aen * aen)6330 handle_mfi_aen(struct mrsas_instance *instance, struct mrsas_aen *aen)
6331 {
6332 	int	rval = 0;
6333 
6334 	rval = register_mfi_aen(instance, instance->aen_seq_num,
6335 	    aen->class_locale_word);
6336 
6337 	aen->cmd_status = (uint8_t)rval;
6338 
6339 	return (rval);
6340 }
6341 
6342 static int
register_mfi_aen(struct mrsas_instance * instance,uint32_t seq_num,uint32_t class_locale_word)6343 register_mfi_aen(struct mrsas_instance *instance, uint32_t seq_num,
6344     uint32_t class_locale_word)
6345 {
6346 	int	ret_val;
6347 
6348 	struct mrsas_cmd	*cmd, *aen_cmd;
6349 	struct mrsas_dcmd_frame	*dcmd;
6350 	union mrsas_evt_class_locale	curr_aen;
6351 	union mrsas_evt_class_locale	prev_aen;
6352 
6353 	con_log(CL_ANN, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
6354 	/*
6355 	 * If there an AEN pending already (aen_cmd), check if the
6356 	 * class_locale of that pending AEN is inclusive of the new
6357 	 * AEN request we currently have. If it is, then we don't have
6358 	 * to do anything. In other words, whichever events the current
6359 	 * AEN request is subscribing to, have already been subscribed
6360 	 * to.
6361 	 *
6362 	 * If the old_cmd is _not_ inclusive, then we have to abort
6363 	 * that command, form a class_locale that is superset of both
6364 	 * old and current and re-issue to the FW
6365 	 */
6366 
6367 	curr_aen.word = LE_32(class_locale_word);
6368 	curr_aen.members.locale = LE_16(curr_aen.members.locale);
6369 	aen_cmd = instance->aen_cmd;
6370 	if (aen_cmd) {
6371 		prev_aen.word = ddi_get32(aen_cmd->frame_dma_obj.acc_handle,
6372 		    &aen_cmd->frame->dcmd.mbox.w[1]);
6373 		prev_aen.word = LE_32(prev_aen.word);
6374 		prev_aen.members.locale = LE_16(prev_aen.members.locale);
6375 		/*
6376 		 * A class whose enum value is smaller is inclusive of all
6377 		 * higher values. If a PROGRESS (= -1) was previously
6378 		 * registered, then a new registration requests for higher
6379 		 * classes need not be sent to FW. They are automatically
6380 		 * included.
6381 		 *
6382 		 * Locale numbers don't have such hierarchy. They are bitmap
6383 		 * values
6384 		 */
6385 		if ((prev_aen.members.class <= curr_aen.members.class) &&
6386 		    !((prev_aen.members.locale & curr_aen.members.locale) ^
6387 		    curr_aen.members.locale)) {
6388 			/*
6389 			 * Previously issued event registration includes
6390 			 * current request. Nothing to do.
6391 			 */
6392 
6393 			return (0);
6394 		} else {
6395 			curr_aen.members.locale |= prev_aen.members.locale;
6396 
6397 			if (prev_aen.members.class < curr_aen.members.class)
6398 				curr_aen.members.class = prev_aen.members.class;
6399 
6400 			ret_val = abort_aen_cmd(instance, aen_cmd);
6401 
6402 			if (ret_val) {
6403 				con_log(CL_ANN, (CE_WARN, "register_mfi_aen: "
6404 				    "failed to abort prevous AEN command"));
6405 
6406 				return (ret_val);
6407 			}
6408 		}
6409 	} else {
6410 		curr_aen.word = LE_32(class_locale_word);
6411 		curr_aen.members.locale = LE_16(curr_aen.members.locale);
6412 	}
6413 
6414 	if (instance->tbolt) {
6415 		cmd = get_raid_msg_mfi_pkt(instance);
6416 	} else {
6417 		cmd = mrsas_get_mfi_pkt(instance);
6418 	}
6419 
6420 	if (!cmd) {
6421 		DTRACE_PROBE2(mfi_aen_err, uint16_t, instance->fw_outstanding,
6422 		    uint16_t, instance->max_fw_cmds);
6423 		return (ENOMEM);
6424 	}
6425 
6426 	/* Clear the frame buffer and assign back the context id */
6427 	(void) memset((char *)&cmd->frame[0], 0, sizeof (union mrsas_frame));
6428 	ddi_put32(cmd->frame_dma_obj.acc_handle, &cmd->frame->hdr.context,
6429 	    cmd->index);
6430 
6431 	dcmd = &cmd->frame->dcmd;
6432 
6433 	/* for(i = 0; i < DCMD_MBOX_SZ; i++) dcmd->mbox.b[i] = 0; */
6434 	(void) memset(dcmd->mbox.b, 0, DCMD_MBOX_SZ);
6435 
6436 	(void) memset(instance->mfi_evt_detail_obj.buffer, 0,
6437 	    sizeof (struct mrsas_evt_detail));
6438 
6439 	/* Prepare DCMD for aen registration */
6440 	ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->cmd, MFI_CMD_OP_DCMD);
6441 	ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->cmd_status, 0x0);
6442 	ddi_put8(cmd->frame_dma_obj.acc_handle, &dcmd->sge_count, 1);
6443 	ddi_put16(cmd->frame_dma_obj.acc_handle, &dcmd->flags,
6444 	    MFI_FRAME_DIR_READ);
6445 	ddi_put16(cmd->frame_dma_obj.acc_handle, &dcmd->timeout, 0);
6446 	ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->data_xfer_len,
6447 	    sizeof (struct mrsas_evt_detail));
6448 	ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->opcode,
6449 	    MR_DCMD_CTRL_EVENT_WAIT);
6450 	ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->mbox.w[0], seq_num);
6451 	curr_aen.members.locale = LE_16(curr_aen.members.locale);
6452 	curr_aen.word = LE_32(curr_aen.word);
6453 	ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->mbox.w[1],
6454 	    curr_aen.word);
6455 	ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->sgl.sge32[0].phys_addr,
6456 	    instance->mfi_evt_detail_obj.dma_cookie[0].dmac_address);
6457 	ddi_put32(cmd->frame_dma_obj.acc_handle, &dcmd->sgl.sge32[0].length,
6458 	    sizeof (struct mrsas_evt_detail));
6459 
6460 	instance->aen_seq_num = seq_num;
6461 
6462 
6463 	/*
6464 	 * Store reference to the cmd used to register for AEN. When an
6465 	 * application wants us to register for AEN, we have to abort this
6466 	 * cmd and re-register with a new EVENT LOCALE supplied by that app
6467 	 */
6468 	instance->aen_cmd = cmd;
6469 
6470 	cmd->frame_count = 1;
6471 
6472 	/* Issue the aen registration frame */
6473 	/* atomic_add_16 (&instance->fw_outstanding, 1); */
6474 	if (instance->tbolt) {
6475 		mr_sas_tbolt_build_mfi_cmd(instance, cmd);
6476 	}
6477 	instance->func_ptr->issue_cmd(cmd, instance);
6478 
6479 	return (0);
6480 }
6481 
6482 void
display_scsi_inquiry(caddr_t scsi_inq)6483 display_scsi_inquiry(caddr_t scsi_inq)
6484 {
6485 #define	MAX_SCSI_DEVICE_CODE	14
6486 	int		i;
6487 	char		inquiry_buf[256] = {0};
6488 	int		len;
6489 	const char	*const scsi_device_types[] = {
6490 		"Direct-Access	  ",
6491 		"Sequential-Access",
6492 		"Printer	  ",
6493 		"Processor	  ",
6494 		"WORM		  ",
6495 		"CD-ROM		  ",
6496 		"Scanner	  ",
6497 		"Optical Device	  ",
6498 		"Medium Changer	  ",
6499 		"Communications	  ",
6500 		"Unknown	  ",
6501 		"Unknown	  ",
6502 		"Unknown	  ",
6503 		"Enclosure	  ",
6504 	};
6505 
6506 	len = 0;
6507 
6508 	len += snprintf(inquiry_buf + len, 265 - len, "	 Vendor: ");
6509 	for (i = 8; i < 16; i++) {
6510 		len += snprintf(inquiry_buf + len, 265 - len, "%c",
6511 		    scsi_inq[i]);
6512 	}
6513 
6514 	len += snprintf(inquiry_buf + len, 265 - len, "	 Model: ");
6515 
6516 	for (i = 16; i < 32; i++) {
6517 		len += snprintf(inquiry_buf + len, 265 - len, "%c",
6518 		    scsi_inq[i]);
6519 	}
6520 
6521 	len += snprintf(inquiry_buf + len, 265 - len, "	 Rev: ");
6522 
6523 	for (i = 32; i < 36; i++) {
6524 		len += snprintf(inquiry_buf + len, 265 - len, "%c",
6525 		    scsi_inq[i]);
6526 	}
6527 
6528 	len += snprintf(inquiry_buf + len, 265 - len, "\n");
6529 
6530 
6531 	i = scsi_inq[0] & 0x1f;
6532 
6533 
6534 	len += snprintf(inquiry_buf + len, 265 - len, "	 Type:	 %s ",
6535 	    i < MAX_SCSI_DEVICE_CODE ? scsi_device_types[i] :
6536 	    "Unknown	      ");
6537 
6538 
6539 	len += snprintf(inquiry_buf + len, 265 - len,
6540 	    "		      ANSI SCSI revision: %02x", scsi_inq[2] & 0x07);
6541 
6542 	if ((scsi_inq[2] & 0x07) == 1 && (scsi_inq[3] & 0x0f) == 1) {
6543 		len += snprintf(inquiry_buf + len, 265 - len, " CCS\n");
6544 	} else {
6545 		len += snprintf(inquiry_buf + len, 265 - len, "\n");
6546 	}
6547 
6548 	con_log(CL_DLEVEL2, (CE_CONT, inquiry_buf));
6549 }
6550 
6551 static void
io_timeout_checker(void * arg)6552 io_timeout_checker(void *arg)
6553 {
6554 	struct scsi_pkt *pkt;
6555 	struct mrsas_instance *instance = arg;
6556 	struct mrsas_cmd	*cmd = NULL;
6557 	struct mrsas_header	*hdr;
6558 	int time = 0;
6559 	int counter = 0;
6560 	struct mlist_head	*pos, *next;
6561 	mlist_t			process_list;
6562 
6563 	if (instance->adapterresetinprogress == 1) {
6564 		con_log(CL_ANN, (CE_NOTE, "io_timeout_checker:"
6565 		    " reset in progress"));
6566 
6567 		instance->timeout_id = timeout(io_timeout_checker,
6568 		    (void *) instance, drv_usectohz(MRSAS_1_SECOND));
6569 		return;
6570 	}
6571 
6572 	/* See if this check needs to be in the beginning or last in ISR */
6573 	if (mrsas_initiate_ocr_if_fw_is_faulty(instance) ==  1) {
6574 		dev_err(instance->dip, CE_WARN, "io_timeout_checker: "
6575 		    "FW Fault, calling reset adapter");
6576 		dev_err(instance->dip, CE_CONT, "io_timeout_checker: "
6577 		    "fw_outstanding 0x%X max_fw_cmds 0x%X",
6578 		    instance->fw_outstanding, instance->max_fw_cmds);
6579 		if (instance->adapterresetinprogress == 0) {
6580 			instance->adapterresetinprogress = 1;
6581 			if (instance->tbolt)
6582 				(void) mrsas_tbolt_reset_ppc(instance);
6583 			else
6584 				(void) mrsas_reset_ppc(instance);
6585 			instance->adapterresetinprogress = 0;
6586 		}
6587 		instance->timeout_id = timeout(io_timeout_checker,
6588 		    (void *) instance, drv_usectohz(MRSAS_1_SECOND));
6589 		return;
6590 	}
6591 
6592 	INIT_LIST_HEAD(&process_list);
6593 
6594 	mutex_enter(&instance->cmd_pend_mtx);
6595 	mlist_for_each_safe(pos, next, &instance->cmd_pend_list) {
6596 		cmd = mlist_entry(pos, struct mrsas_cmd, list);
6597 
6598 		if (cmd == NULL) {
6599 			continue;
6600 		}
6601 
6602 		if (cmd->sync_cmd == MRSAS_TRUE) {
6603 			hdr = (struct mrsas_header *)&cmd->frame->hdr;
6604 			if (hdr == NULL) {
6605 				continue;
6606 			}
6607 			time = --cmd->drv_pkt_time;
6608 		} else {
6609 			pkt = cmd->pkt;
6610 			if (pkt == NULL) {
6611 				continue;
6612 			}
6613 			time = --cmd->drv_pkt_time;
6614 		}
6615 		if (time <= 0) {
6616 			dev_err(instance->dip, CE_WARN, "%llx: "
6617 			    "io_timeout_checker: TIMING OUT: pkt: %p, "
6618 			    "cmd %p fw_outstanding 0x%X max_fw_cmds 0x%X",
6619 			    gethrtime(), (void *)pkt, (void *)cmd,
6620 			    instance->fw_outstanding, instance->max_fw_cmds);
6621 
6622 			counter++;
6623 			break;
6624 		}
6625 	}
6626 	mutex_exit(&instance->cmd_pend_mtx);
6627 
6628 	if (counter) {
6629 		if (instance->disable_online_ctrl_reset == 1) {
6630 			dev_err(instance->dip, CE_WARN, "%s(): OCR is NOT "
6631 			    "supported by Firmware, KILL adapter!!!",
6632 			    __func__);
6633 
6634 			if (instance->tbolt)
6635 				mrsas_tbolt_kill_adapter(instance);
6636 			else
6637 				(void) mrsas_kill_adapter(instance);
6638 
6639 			return;
6640 		} else {
6641 			if (cmd->retry_count_for_ocr <=	 IO_RETRY_COUNT) {
6642 				if (instance->adapterresetinprogress == 0) {
6643 					if (instance->tbolt) {
6644 						(void) mrsas_tbolt_reset_ppc(
6645 						    instance);
6646 					} else {
6647 						(void) mrsas_reset_ppc(
6648 						    instance);
6649 					}
6650 				}
6651 			} else {
6652 				dev_err(instance->dip, CE_WARN,
6653 				    "io_timeout_checker: "
6654 				    "cmd %p cmd->index %d "
6655 				    "timed out even after 3 resets: "
6656 				    "so KILL adapter", (void *)cmd, cmd->index);
6657 
6658 				mrsas_print_cmd_details(instance, cmd, 0xDD);
6659 
6660 				if (instance->tbolt)
6661 					mrsas_tbolt_kill_adapter(instance);
6662 				else
6663 					(void) mrsas_kill_adapter(instance);
6664 				return;
6665 			}
6666 		}
6667 	}
6668 	con_log(CL_ANN, (CE_NOTE, "mrsas: "
6669 	    "schedule next timeout check: "
6670 	    "do timeout \n"));
6671 	instance->timeout_id =
6672 	    timeout(io_timeout_checker, (void *)instance,
6673 	    drv_usectohz(MRSAS_1_SECOND));
6674 }
6675 
6676 static uint32_t
read_fw_status_reg_ppc(struct mrsas_instance * instance)6677 read_fw_status_reg_ppc(struct mrsas_instance *instance)
6678 {
6679 	return ((uint32_t)RD_OB_SCRATCH_PAD_0(instance));
6680 }
6681 
6682 static void
issue_cmd_ppc(struct mrsas_cmd * cmd,struct mrsas_instance * instance)6683 issue_cmd_ppc(struct mrsas_cmd *cmd, struct mrsas_instance *instance)
6684 {
6685 	struct scsi_pkt *pkt;
6686 	atomic_inc_16(&instance->fw_outstanding);
6687 
6688 	pkt = cmd->pkt;
6689 	if (pkt) {
6690 		con_log(CL_DLEVEL1, (CE_NOTE, "%llx : issue_cmd_ppc:"
6691 		    "ISSUED CMD TO FW : called : cmd:"
6692 		    ": %p instance : %p pkt : %p pkt_time : %x\n",
6693 		    gethrtime(), (void *)cmd, (void *)instance,
6694 		    (void *)pkt, cmd->drv_pkt_time));
6695 		if (instance->adapterresetinprogress) {
6696 			cmd->drv_pkt_time = (uint16_t)debug_timeout_g;
6697 			con_log(CL_ANN1, (CE_NOTE, "Reset the scsi_pkt timer"));
6698 		} else {
6699 			push_pending_mfi_pkt(instance, cmd);
6700 		}
6701 
6702 	} else {
6703 		con_log(CL_DLEVEL1, (CE_NOTE, "%llx : issue_cmd_ppc:"
6704 		    "ISSUED CMD TO FW : called : cmd : %p, instance: %p"
6705 		    "(NO PKT)\n", gethrtime(), (void *)cmd, (void *)instance));
6706 	}
6707 
6708 	mutex_enter(&instance->reg_write_mtx);
6709 	/* Issue the command to the FW */
6710 	WR_IB_PICK_QPORT((cmd->frame_phys_addr) |
6711 	    (((cmd->frame_count - 1) << 1) | 1), instance);
6712 	mutex_exit(&instance->reg_write_mtx);
6713 
6714 }
6715 
6716 /*
6717  * issue_cmd_in_sync_mode
6718  */
6719 static int
issue_cmd_in_sync_mode_ppc(struct mrsas_instance * instance,struct mrsas_cmd * cmd)6720 issue_cmd_in_sync_mode_ppc(struct mrsas_instance *instance,
6721     struct mrsas_cmd *cmd)
6722 {
6723 	int	i;
6724 	uint32_t	msecs = MFI_POLL_TIMEOUT_SECS * MILLISEC;
6725 	struct mrsas_header *hdr = &cmd->frame->hdr;
6726 
6727 	con_log(CL_ANN1, (CE_NOTE, "issue_cmd_in_sync_mode_ppc: called"));
6728 
6729 	if (instance->adapterresetinprogress) {
6730 		cmd->drv_pkt_time = ddi_get16(
6731 		    cmd->frame_dma_obj.acc_handle, &hdr->timeout);
6732 		if (cmd->drv_pkt_time < debug_timeout_g)
6733 			cmd->drv_pkt_time = (uint16_t)debug_timeout_g;
6734 
6735 		con_log(CL_ANN1, (CE_NOTE, "sync_mode_ppc: "
6736 		    "issue and return in reset case\n"));
6737 		WR_IB_PICK_QPORT((cmd->frame_phys_addr) |
6738 		    (((cmd->frame_count - 1) << 1) | 1), instance);
6739 
6740 		return (DDI_SUCCESS);
6741 	} else {
6742 		con_log(CL_ANN1, (CE_NOTE, "sync_mode_ppc: pushing the pkt\n"));
6743 		push_pending_mfi_pkt(instance, cmd);
6744 	}
6745 
6746 	cmd->cmd_status	= ENODATA;
6747 
6748 	mutex_enter(&instance->reg_write_mtx);
6749 	/* Issue the command to the FW */
6750 	WR_IB_PICK_QPORT((cmd->frame_phys_addr) |
6751 	    (((cmd->frame_count - 1) << 1) | 1), instance);
6752 	mutex_exit(&instance->reg_write_mtx);
6753 
6754 	mutex_enter(&instance->int_cmd_mtx);
6755 	for (i = 0; i < msecs && (cmd->cmd_status == ENODATA); i++) {
6756 		cv_wait(&instance->int_cmd_cv, &instance->int_cmd_mtx);
6757 	}
6758 	mutex_exit(&instance->int_cmd_mtx);
6759 
6760 	con_log(CL_ANN1, (CE_NOTE, "issue_cmd_in_sync_mode_ppc: done"));
6761 
6762 	if (i < (msecs -1)) {
6763 		return (DDI_SUCCESS);
6764 	} else {
6765 		return (DDI_FAILURE);
6766 	}
6767 }
6768 
6769 /*
6770  * issue_cmd_in_poll_mode
6771  */
6772 static int
issue_cmd_in_poll_mode_ppc(struct mrsas_instance * instance,struct mrsas_cmd * cmd)6773 issue_cmd_in_poll_mode_ppc(struct mrsas_instance *instance,
6774     struct mrsas_cmd *cmd)
6775 {
6776 	int		i;
6777 	uint16_t	flags;
6778 	uint32_t	msecs = MFI_POLL_TIMEOUT_SECS * MILLISEC;
6779 	struct mrsas_header *frame_hdr;
6780 
6781 	con_log(CL_ANN1, (CE_NOTE, "issue_cmd_in_poll_mode_ppc: called"));
6782 
6783 	frame_hdr = (struct mrsas_header *)cmd->frame;
6784 	ddi_put8(cmd->frame_dma_obj.acc_handle, &frame_hdr->cmd_status,
6785 	    MFI_CMD_STATUS_POLL_MODE);
6786 	flags = ddi_get16(cmd->frame_dma_obj.acc_handle, &frame_hdr->flags);
6787 	flags	|= MFI_FRAME_DONT_POST_IN_REPLY_QUEUE;
6788 
6789 	ddi_put16(cmd->frame_dma_obj.acc_handle, &frame_hdr->flags, flags);
6790 
6791 	/* issue the frame using inbound queue port */
6792 	WR_IB_PICK_QPORT((cmd->frame_phys_addr) |
6793 	    (((cmd->frame_count - 1) << 1) | 1), instance);
6794 
6795 	/* wait for cmd_status to change from 0xFF */
6796 	for (i = 0; i < msecs && (
6797 	    ddi_get8(cmd->frame_dma_obj.acc_handle, &frame_hdr->cmd_status)
6798 	    == MFI_CMD_STATUS_POLL_MODE); i++) {
6799 		drv_usecwait(MILLISEC); /* wait for 1000 usecs */
6800 	}
6801 
6802 	if (ddi_get8(cmd->frame_dma_obj.acc_handle, &frame_hdr->cmd_status)
6803 	    == MFI_CMD_STATUS_POLL_MODE) {
6804 		con_log(CL_ANN, (CE_NOTE, "issue_cmd_in_poll_mode: "
6805 		    "cmd polling timed out"));
6806 		return (DDI_FAILURE);
6807 	}
6808 
6809 	return (DDI_SUCCESS);
6810 }
6811 
6812 static void
enable_intr_ppc(struct mrsas_instance * instance)6813 enable_intr_ppc(struct mrsas_instance *instance)
6814 {
6815 	uint32_t	mask;
6816 
6817 	con_log(CL_ANN1, (CE_NOTE, "enable_intr_ppc: called"));
6818 
6819 	if (instance->skinny) {
6820 		/* For SKINNY, write ~0x1, from BSD's mfi driver. */
6821 		WR_OB_INTR_MASK(0xfffffffe, instance);
6822 	} else {
6823 		/* WR_OB_DOORBELL_CLEAR(0xFFFFFFFF, instance); */
6824 		WR_OB_DOORBELL_CLEAR(OB_DOORBELL_CLEAR_MASK, instance);
6825 
6826 		/* WR_OB_INTR_MASK(~0x80000000, instance); */
6827 		WR_OB_INTR_MASK(~(MFI_REPLY_2108_MESSAGE_INTR_MASK), instance);
6828 	}
6829 
6830 	/* dummy read to force PCI flush */
6831 	mask = RD_OB_INTR_MASK(instance);
6832 
6833 	con_log(CL_ANN1, (CE_NOTE, "enable_intr_ppc: "
6834 	    "outbound_intr_mask = 0x%x", mask));
6835 }
6836 
6837 static void
disable_intr_ppc(struct mrsas_instance * instance)6838 disable_intr_ppc(struct mrsas_instance *instance)
6839 {
6840 	con_log(CL_ANN1, (CE_NOTE, "disable_intr_ppc: called"));
6841 
6842 	con_log(CL_ANN1, (CE_NOTE, "disable_intr_ppc: before : "
6843 	    "outbound_intr_mask = 0x%x", RD_OB_INTR_MASK(instance)));
6844 
6845 	/* For now, assume there are no extras needed for Skinny support. */
6846 
6847 	WR_OB_INTR_MASK(OB_INTR_MASK, instance);
6848 
6849 	con_log(CL_ANN1, (CE_NOTE, "disable_intr_ppc: after : "
6850 	    "outbound_intr_mask = 0x%x", RD_OB_INTR_MASK(instance)));
6851 
6852 	/* dummy read to force PCI flush */
6853 	(void) RD_OB_INTR_MASK(instance);
6854 }
6855 
6856 static int
intr_ack_ppc(struct mrsas_instance * instance)6857 intr_ack_ppc(struct mrsas_instance *instance)
6858 {
6859 	uint32_t	status;
6860 	int ret = DDI_INTR_CLAIMED;
6861 
6862 	con_log(CL_ANN1, (CE_NOTE, "intr_ack_ppc: called"));
6863 
6864 	/* check if it is our interrupt */
6865 	status = RD_OB_INTR_STATUS(instance);
6866 
6867 	con_log(CL_ANN1, (CE_NOTE, "intr_ack_ppc: status = 0x%x", status));
6868 
6869 	/*
6870 	 * NOTE:  Some drivers call out SKINNY here, but the return is the same
6871 	 * for SKINNY and 2108.
6872 	 */
6873 	if (!(status & MFI_REPLY_2108_MESSAGE_INTR)) {
6874 		ret = DDI_INTR_UNCLAIMED;
6875 	}
6876 
6877 	if (mrsas_check_acc_handle(instance->regmap_handle) != DDI_SUCCESS) {
6878 		ddi_fm_service_impact(instance->dip, DDI_SERVICE_LOST);
6879 		ret = DDI_INTR_UNCLAIMED;
6880 	}
6881 
6882 	if (ret == DDI_INTR_UNCLAIMED) {
6883 		return (ret);
6884 	}
6885 
6886 	/*
6887 	 * Clear the interrupt by writing back the same value.
6888 	 * Another case where SKINNY is slightly different.
6889 	 */
6890 	if (instance->skinny) {
6891 		WR_OB_INTR_STATUS(status, instance);
6892 	} else {
6893 		WR_OB_DOORBELL_CLEAR(status, instance);
6894 	}
6895 
6896 	/* dummy READ */
6897 	status = RD_OB_INTR_STATUS(instance);
6898 
6899 	con_log(CL_ANN1, (CE_NOTE, "intr_ack_ppc: interrupt cleared"));
6900 
6901 	return (ret);
6902 }
6903 
6904 /*
6905  * Marks HBA as bad. This will be called either when an
6906  * IO packet times out even after 3 FW resets
6907  * or FW is found to be fault even after 3 continuous resets.
6908  */
6909 
6910 static int
mrsas_kill_adapter(struct mrsas_instance * instance)6911 mrsas_kill_adapter(struct mrsas_instance *instance)
6912 {
6913 	if (instance->deadadapter == 1)
6914 		return (DDI_FAILURE);
6915 
6916 	con_log(CL_ANN1, (CE_NOTE, "mrsas_kill_adapter: "
6917 	    "Writing to doorbell with MFI_STOP_ADP "));
6918 	mutex_enter(&instance->ocr_flags_mtx);
6919 	instance->deadadapter = 1;
6920 	mutex_exit(&instance->ocr_flags_mtx);
6921 	instance->func_ptr->disable_intr(instance);
6922 	WR_IB_DOORBELL(MFI_STOP_ADP, instance);
6923 	(void) mrsas_complete_pending_cmds(instance);
6924 	return (DDI_SUCCESS);
6925 }
6926 
6927 
6928 static int
mrsas_reset_ppc(struct mrsas_instance * instance)6929 mrsas_reset_ppc(struct mrsas_instance *instance)
6930 {
6931 	uint32_t status;
6932 	uint32_t retry = 0;
6933 	uint32_t cur_abs_reg_val;
6934 	uint32_t fw_state;
6935 
6936 	con_log(CL_ANN, (CE_NOTE, "chkpnt:%s:%d", __func__, __LINE__));
6937 
6938 	if (instance->deadadapter == 1) {
6939 		dev_err(instance->dip, CE_WARN, "mrsas_reset_ppc: "
6940 		    "no more resets as HBA has been marked dead ");
6941 		return (DDI_FAILURE);
6942 	}
6943 	mutex_enter(&instance->ocr_flags_mtx);
6944 	instance->adapterresetinprogress = 1;
6945 	mutex_exit(&instance->ocr_flags_mtx);
6946 	con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: adpterresetinprogress "
6947 	    "flag set, time %llx", gethrtime()));
6948 
6949 	instance->func_ptr->disable_intr(instance);
6950 retry_reset:
6951 	WR_IB_WRITE_SEQ(0, instance);
6952 	WR_IB_WRITE_SEQ(4, instance);
6953 	WR_IB_WRITE_SEQ(0xb, instance);
6954 	WR_IB_WRITE_SEQ(2, instance);
6955 	WR_IB_WRITE_SEQ(7, instance);
6956 	WR_IB_WRITE_SEQ(0xd, instance);
6957 	con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: magic number written "
6958 	    "to write sequence register\n"));
6959 	delay(100 * drv_usectohz(MILLISEC));
6960 	status = RD_OB_DRWE(instance);
6961 
6962 	while (!(status & DIAG_WRITE_ENABLE)) {
6963 		delay(100 * drv_usectohz(MILLISEC));
6964 		status = RD_OB_DRWE(instance);
6965 		if (retry++ == 100) {
6966 			dev_err(instance->dip, CE_WARN,
6967 			    "mrsas_reset_ppc: DRWE bit "
6968 			    "check retry count %d", retry);
6969 			return (DDI_FAILURE);
6970 		}
6971 	}
6972 	WR_IB_DRWE(status | DIAG_RESET_ADAPTER, instance);
6973 	delay(100 * drv_usectohz(MILLISEC));
6974 	status = RD_OB_DRWE(instance);
6975 	while (status & DIAG_RESET_ADAPTER) {
6976 		delay(100 * drv_usectohz(MILLISEC));
6977 		status = RD_OB_DRWE(instance);
6978 		if (retry++ == 100) {
6979 			dev_err(instance->dip, CE_WARN, "mrsas_reset_ppc: "
6980 			    "RESET FAILED. KILL adapter called.");
6981 
6982 			(void) mrsas_kill_adapter(instance);
6983 			return (DDI_FAILURE);
6984 		}
6985 	}
6986 	con_log(CL_ANN, (CE_NOTE, "mrsas_reset_ppc: Adapter reset complete"));
6987 	con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
6988 	    "Calling mfi_state_transition_to_ready"));
6989 
6990 	/* Mark HBA as bad, if FW is fault after 3 continuous resets */
6991 	if (mfi_state_transition_to_ready(instance) ||
6992 	    debug_fw_faults_after_ocr_g == 1) {
6993 		cur_abs_reg_val =
6994 		    instance->func_ptr->read_fw_status_reg(instance);
6995 		fw_state	= cur_abs_reg_val & MFI_STATE_MASK;
6996 
6997 #ifdef OCRDEBUG
6998 		con_log(CL_ANN1, (CE_NOTE,
6999 		    "mrsas_reset_ppc :before fake: FW is not ready "
7000 		    "FW state = 0x%x", fw_state));
7001 		if (debug_fw_faults_after_ocr_g == 1)
7002 			fw_state = MFI_STATE_FAULT;
7003 #endif
7004 
7005 		con_log(CL_ANN1, (CE_NOTE,  "mrsas_reset_ppc : FW is not ready "
7006 		    "FW state = 0x%x", fw_state));
7007 
7008 		if (fw_state == MFI_STATE_FAULT) {
7009 			/* increment the count */
7010 			instance->fw_fault_count_after_ocr++;
7011 			if (instance->fw_fault_count_after_ocr
7012 			    < MAX_FW_RESET_COUNT) {
7013 				dev_err(instance->dip, CE_WARN,
7014 				    "mrsas_reset_ppc: "
7015 				    "FW is in fault after OCR count %d "
7016 				    "Retry Reset",
7017 				    instance->fw_fault_count_after_ocr);
7018 				goto retry_reset;
7019 
7020 			} else {
7021 				dev_err(instance->dip, CE_WARN,
7022 				    "mrsas_reset_ppc: "
7023 				    "Max Reset Count exceeded >%d"
7024 				    "Mark HBA as bad, KILL adapter",
7025 				    MAX_FW_RESET_COUNT);
7026 
7027 				(void) mrsas_kill_adapter(instance);
7028 				return (DDI_FAILURE);
7029 			}
7030 		}
7031 	}
7032 	/* reset the counter as FW is up after OCR */
7033 	instance->fw_fault_count_after_ocr = 0;
7034 
7035 
7036 	ddi_put32(instance->mfi_internal_dma_obj.acc_handle,
7037 	    instance->producer, 0);
7038 
7039 	ddi_put32(instance->mfi_internal_dma_obj.acc_handle,
7040 	    instance->consumer, 0);
7041 
7042 	con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
7043 	    " after resetting produconsumer chck indexs:"
7044 	    "producer %x consumer %x", *instance->producer,
7045 	    *instance->consumer));
7046 
7047 	con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
7048 	    "Calling mrsas_issue_init_mfi"));
7049 	(void) mrsas_issue_init_mfi(instance);
7050 	con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
7051 	    "mrsas_issue_init_mfi Done"));
7052 
7053 	con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
7054 	    "Calling mrsas_print_pending_cmd\n"));
7055 	(void) mrsas_print_pending_cmds(instance);
7056 	con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
7057 	    "mrsas_print_pending_cmd done\n"));
7058 
7059 	instance->func_ptr->enable_intr(instance);
7060 	instance->fw_outstanding = 0;
7061 
7062 	con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
7063 	    "Calling mrsas_issue_pending_cmds"));
7064 	(void) mrsas_issue_pending_cmds(instance);
7065 	con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
7066 	    "issue_pending_cmds done.\n"));
7067 
7068 	con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
7069 	    "Calling aen registration"));
7070 
7071 
7072 	instance->aen_cmd->retry_count_for_ocr = 0;
7073 	instance->aen_cmd->drv_pkt_time = 0;
7074 
7075 	instance->func_ptr->issue_cmd(instance->aen_cmd, instance);
7076 	con_log(CL_ANN1, (CE_NOTE, "Unsetting adpresetinprogress flag.\n"));
7077 
7078 	mutex_enter(&instance->ocr_flags_mtx);
7079 	instance->adapterresetinprogress = 0;
7080 	mutex_exit(&instance->ocr_flags_mtx);
7081 	con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc: "
7082 	    "adpterresetinprogress flag unset"));
7083 
7084 	con_log(CL_ANN1, (CE_NOTE, "mrsas_reset_ppc done\n"));
7085 	return (DDI_SUCCESS);
7086 }
7087 
7088 /*
7089  * FMA functions.
7090  */
7091 int
mrsas_common_check(struct mrsas_instance * instance,struct mrsas_cmd * cmd)7092 mrsas_common_check(struct mrsas_instance *instance, struct  mrsas_cmd *cmd)
7093 {
7094 	int ret = DDI_SUCCESS;
7095 
7096 	if (cmd != NULL &&
7097 	    mrsas_check_dma_handle(cmd->frame_dma_obj.dma_handle) !=
7098 	    DDI_SUCCESS) {
7099 		ddi_fm_service_impact(instance->dip, DDI_SERVICE_UNAFFECTED);
7100 		if (cmd->pkt != NULL) {
7101 			cmd->pkt->pkt_reason = CMD_TRAN_ERR;
7102 			cmd->pkt->pkt_statistics = 0;
7103 		}
7104 		ret = DDI_FAILURE;
7105 	}
7106 	if (mrsas_check_dma_handle(instance->mfi_internal_dma_obj.dma_handle)
7107 	    != DDI_SUCCESS) {
7108 		ddi_fm_service_impact(instance->dip, DDI_SERVICE_UNAFFECTED);
7109 		if (cmd != NULL && cmd->pkt != NULL) {
7110 			cmd->pkt->pkt_reason = CMD_TRAN_ERR;
7111 			cmd->pkt->pkt_statistics = 0;
7112 		}
7113 		ret = DDI_FAILURE;
7114 	}
7115 	if (mrsas_check_dma_handle(instance->mfi_evt_detail_obj.dma_handle) !=
7116 	    DDI_SUCCESS) {
7117 		ddi_fm_service_impact(instance->dip, DDI_SERVICE_UNAFFECTED);
7118 		if (cmd != NULL && cmd->pkt != NULL) {
7119 			cmd->pkt->pkt_reason = CMD_TRAN_ERR;
7120 			cmd->pkt->pkt_statistics = 0;
7121 		}
7122 		ret = DDI_FAILURE;
7123 	}
7124 	if (mrsas_check_acc_handle(instance->regmap_handle) != DDI_SUCCESS) {
7125 		ddi_fm_service_impact(instance->dip, DDI_SERVICE_UNAFFECTED);
7126 
7127 		ddi_fm_acc_err_clear(instance->regmap_handle, DDI_FME_VER0);
7128 
7129 		if (cmd != NULL && cmd->pkt != NULL) {
7130 			cmd->pkt->pkt_reason = CMD_TRAN_ERR;
7131 			cmd->pkt->pkt_statistics = 0;
7132 		}
7133 		ret = DDI_FAILURE;
7134 	}
7135 
7136 	return (ret);
7137 }
7138 
7139 /*ARGSUSED*/
7140 static int
mrsas_fm_error_cb(dev_info_t * dip,ddi_fm_error_t * err,const void * impl_data)7141 mrsas_fm_error_cb(dev_info_t *dip, ddi_fm_error_t *err, const void *impl_data)
7142 {
7143 	/*
7144 	 * as the driver can always deal with an error in any dma or
7145 	 * access handle, we can just return the fme_status value.
7146 	 */
7147 	pci_ereport_post(dip, err, NULL);
7148 	return (err->fme_status);
7149 }
7150 
7151 static void
mrsas_fm_init(struct mrsas_instance * instance)7152 mrsas_fm_init(struct mrsas_instance *instance)
7153 {
7154 	/* Need to change iblock to priority for new MSI intr */
7155 	ddi_iblock_cookie_t fm_ibc;
7156 
7157 	/* Only register with IO Fault Services if we have some capability */
7158 	if (instance->fm_capabilities) {
7159 		/* Adjust access and dma attributes for FMA */
7160 		endian_attr.devacc_attr_access = DDI_FLAGERR_ACC;
7161 		mrsas_generic_dma_attr.dma_attr_flags = DDI_DMA_FLAGERR;
7162 
7163 		/*
7164 		 * Register capabilities with IO Fault Services.
7165 		 * fm_capabilities will be updated to indicate
7166 		 * capabilities actually supported (not requested.)
7167 		 */
7168 
7169 		ddi_fm_init(instance->dip, &instance->fm_capabilities, &fm_ibc);
7170 
7171 		/*
7172 		 * Initialize pci ereport capabilities if ereport
7173 		 * capable (should always be.)
7174 		 */
7175 
7176 		if (DDI_FM_EREPORT_CAP(instance->fm_capabilities) ||
7177 		    DDI_FM_ERRCB_CAP(instance->fm_capabilities)) {
7178 			pci_ereport_setup(instance->dip);
7179 		}
7180 
7181 		/*
7182 		 * Register error callback if error callback capable.
7183 		 */
7184 		if (DDI_FM_ERRCB_CAP(instance->fm_capabilities)) {
7185 			ddi_fm_handler_register(instance->dip,
7186 			    mrsas_fm_error_cb, (void*) instance);
7187 		}
7188 	} else {
7189 		endian_attr.devacc_attr_access = DDI_DEFAULT_ACC;
7190 		mrsas_generic_dma_attr.dma_attr_flags = 0;
7191 	}
7192 }
7193 
7194 static void
mrsas_fm_fini(struct mrsas_instance * instance)7195 mrsas_fm_fini(struct mrsas_instance *instance)
7196 {
7197 	/* Only unregister FMA capabilities if registered */
7198 	if (instance->fm_capabilities) {
7199 		/*
7200 		 * Un-register error callback if error callback capable.
7201 		 */
7202 		if (DDI_FM_ERRCB_CAP(instance->fm_capabilities)) {
7203 			ddi_fm_handler_unregister(instance->dip);
7204 		}
7205 
7206 		/*
7207 		 * Release any resources allocated by pci_ereport_setup()
7208 		 */
7209 		if (DDI_FM_EREPORT_CAP(instance->fm_capabilities) ||
7210 		    DDI_FM_ERRCB_CAP(instance->fm_capabilities)) {
7211 			pci_ereport_teardown(instance->dip);
7212 		}
7213 
7214 		/* Unregister from IO Fault Services */
7215 		ddi_fm_fini(instance->dip);
7216 
7217 		/* Adjust access and dma attributes for FMA */
7218 		endian_attr.devacc_attr_access = DDI_DEFAULT_ACC;
7219 		mrsas_generic_dma_attr.dma_attr_flags = 0;
7220 	}
7221 }
7222 
7223 int
mrsas_check_acc_handle(ddi_acc_handle_t handle)7224 mrsas_check_acc_handle(ddi_acc_handle_t handle)
7225 {
7226 	ddi_fm_error_t de;
7227 
7228 	if (handle == NULL) {
7229 		return (DDI_FAILURE);
7230 	}
7231 
7232 	ddi_fm_acc_err_get(handle, &de, DDI_FME_VERSION);
7233 
7234 	return (de.fme_status);
7235 }
7236 
7237 int
mrsas_check_dma_handle(ddi_dma_handle_t handle)7238 mrsas_check_dma_handle(ddi_dma_handle_t handle)
7239 {
7240 	ddi_fm_error_t de;
7241 
7242 	if (handle == NULL) {
7243 		return (DDI_FAILURE);
7244 	}
7245 
7246 	ddi_fm_dma_err_get(handle, &de, DDI_FME_VERSION);
7247 
7248 	return (de.fme_status);
7249 }
7250 
7251 void
mrsas_fm_ereport(struct mrsas_instance * instance,char * detail)7252 mrsas_fm_ereport(struct mrsas_instance *instance, char *detail)
7253 {
7254 	uint64_t ena;
7255 	char buf[FM_MAX_CLASS];
7256 
7257 	(void) snprintf(buf, FM_MAX_CLASS, "%s.%s", DDI_FM_DEVICE, detail);
7258 	ena = fm_ena_generate(0, FM_ENA_FMT1);
7259 	if (DDI_FM_EREPORT_CAP(instance->fm_capabilities)) {
7260 		ddi_fm_ereport_post(instance->dip, buf, ena, DDI_NOSLEEP,
7261 		    FM_VERSION, DATA_TYPE_UINT8, FM_EREPORT_VERSION, NULL);
7262 	}
7263 }
7264 
7265 static int
mrsas_add_intrs(struct mrsas_instance * instance,int intr_type)7266 mrsas_add_intrs(struct mrsas_instance *instance, int intr_type)
7267 {
7268 
7269 	dev_info_t *dip = instance->dip;
7270 	int	avail, actual, count;
7271 	int	i, flag, ret;
7272 
7273 	con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_add_intrs: intr_type = %x",
7274 	    intr_type));
7275 
7276 	/* Get number of interrupts */
7277 	ret = ddi_intr_get_nintrs(dip, intr_type, &count);
7278 	if ((ret != DDI_SUCCESS) || (count == 0)) {
7279 		con_log(CL_ANN, (CE_WARN, "ddi_intr_get_nintrs() failed:"
7280 		    "ret %d count %d", ret, count));
7281 
7282 		return (DDI_FAILURE);
7283 	}
7284 
7285 	con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_add_intrs: count = %d ", count));
7286 
7287 	/* Get number of available interrupts */
7288 	ret = ddi_intr_get_navail(dip, intr_type, &avail);
7289 	if ((ret != DDI_SUCCESS) || (avail == 0)) {
7290 		con_log(CL_ANN, (CE_WARN, "ddi_intr_get_navail() failed:"
7291 		    "ret %d avail %d", ret, avail));
7292 
7293 		return (DDI_FAILURE);
7294 	}
7295 	con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_add_intrs: avail = %d ", avail));
7296 
7297 	/* Only one interrupt routine. So limit the count to 1 */
7298 	if (count > 1) {
7299 		count = 1;
7300 	}
7301 
7302 	/*
7303 	 * Allocate an array of interrupt handlers. Currently we support
7304 	 * only one interrupt. The framework can be extended later.
7305 	 */
7306 	instance->intr_htable_size = count * sizeof (ddi_intr_handle_t);
7307 	instance->intr_htable = kmem_zalloc(instance->intr_htable_size,
7308 	    KM_SLEEP);
7309 	ASSERT(instance->intr_htable);
7310 
7311 	flag = ((intr_type == DDI_INTR_TYPE_MSI) ||
7312 	    (intr_type == DDI_INTR_TYPE_MSIX)) ?
7313 	    DDI_INTR_ALLOC_STRICT : DDI_INTR_ALLOC_NORMAL;
7314 
7315 	/* Allocate interrupt */
7316 	ret = ddi_intr_alloc(dip, instance->intr_htable, intr_type, 0,
7317 	    count, &actual, flag);
7318 
7319 	if ((ret != DDI_SUCCESS) || (actual == 0)) {
7320 		con_log(CL_ANN, (CE_WARN, "mrsas_add_intrs: "
7321 		    "avail = %d", avail));
7322 		goto mrsas_free_htable;
7323 	}
7324 
7325 	if (actual < count) {
7326 		con_log(CL_ANN, (CE_WARN, "mrsas_add_intrs: "
7327 		    "Requested = %d  Received = %d", count, actual));
7328 	}
7329 	instance->intr_cnt = actual;
7330 
7331 	/*
7332 	 * Get the priority of the interrupt allocated.
7333 	 */
7334 	if ((ret = ddi_intr_get_pri(instance->intr_htable[0],
7335 	    &instance->intr_pri)) != DDI_SUCCESS) {
7336 		con_log(CL_ANN, (CE_WARN, "mrsas_add_intrs: "
7337 		    "get priority call failed"));
7338 		goto mrsas_free_handles;
7339 	}
7340 
7341 	/*
7342 	 * Test for high level mutex. we don't support them.
7343 	 */
7344 	if (instance->intr_pri >= ddi_intr_get_hilevel_pri()) {
7345 		con_log(CL_ANN, (CE_WARN, "mrsas_add_intrs: "
7346 		    "High level interrupts not supported."));
7347 		goto mrsas_free_handles;
7348 	}
7349 
7350 	con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_add_intrs: intr_pri = 0x%x ",
7351 	    instance->intr_pri));
7352 
7353 	/* Call ddi_intr_add_handler() */
7354 	for (i = 0; i < actual; i++) {
7355 		ret = ddi_intr_add_handler(instance->intr_htable[i],
7356 		    mrsas_isr, (caddr_t)instance, (caddr_t)(uintptr_t)i);
7357 
7358 		if (ret != DDI_SUCCESS) {
7359 			con_log(CL_ANN, (CE_WARN, "mrsas_add_intrs:"
7360 			    "failed %d", ret));
7361 			goto mrsas_free_handles;
7362 		}
7363 
7364 	}
7365 
7366 	con_log(CL_DLEVEL1, (CE_NOTE, " ddi_intr_add_handler done"));
7367 
7368 	if ((ret = ddi_intr_get_cap(instance->intr_htable[0],
7369 	    &instance->intr_cap)) != DDI_SUCCESS) {
7370 		con_log(CL_ANN, (CE_WARN, "ddi_intr_get_cap() failed %d",
7371 		    ret));
7372 		goto mrsas_free_handlers;
7373 	}
7374 
7375 	if (instance->intr_cap &  DDI_INTR_FLAG_BLOCK) {
7376 		con_log(CL_ANN, (CE_WARN, "Calling ddi_intr_block _enable"));
7377 
7378 		(void) ddi_intr_block_enable(instance->intr_htable,
7379 		    instance->intr_cnt);
7380 	} else {
7381 		con_log(CL_ANN, (CE_NOTE, " calling ddi_intr_enable"));
7382 
7383 		for (i = 0; i < instance->intr_cnt; i++) {
7384 			(void) ddi_intr_enable(instance->intr_htable[i]);
7385 			con_log(CL_ANN, (CE_NOTE, "ddi intr enable returns "
7386 			    "%d", i));
7387 		}
7388 	}
7389 
7390 	return (DDI_SUCCESS);
7391 
7392 mrsas_free_handlers:
7393 	for (i = 0; i < actual; i++)
7394 		(void) ddi_intr_remove_handler(instance->intr_htable[i]);
7395 
7396 mrsas_free_handles:
7397 	for (i = 0; i < actual; i++)
7398 		(void) ddi_intr_free(instance->intr_htable[i]);
7399 
7400 mrsas_free_htable:
7401 	if (instance->intr_htable != NULL)
7402 		kmem_free(instance->intr_htable, instance->intr_htable_size);
7403 
7404 	instance->intr_htable = NULL;
7405 	instance->intr_htable_size = 0;
7406 
7407 	return (DDI_FAILURE);
7408 
7409 }
7410 
7411 
7412 static void
mrsas_rem_intrs(struct mrsas_instance * instance)7413 mrsas_rem_intrs(struct mrsas_instance *instance)
7414 {
7415 	int i;
7416 
7417 	con_log(CL_ANN, (CE_NOTE, "mrsas_rem_intrs called"));
7418 
7419 	/* Disable all interrupts first */
7420 	if (instance->intr_cap & DDI_INTR_FLAG_BLOCK) {
7421 		(void) ddi_intr_block_disable(instance->intr_htable,
7422 		    instance->intr_cnt);
7423 	} else {
7424 		for (i = 0; i < instance->intr_cnt; i++) {
7425 			(void) ddi_intr_disable(instance->intr_htable[i]);
7426 		}
7427 	}
7428 
7429 	/* Remove all the handlers */
7430 
7431 	for (i = 0; i < instance->intr_cnt; i++) {
7432 		(void) ddi_intr_remove_handler(instance->intr_htable[i]);
7433 		(void) ddi_intr_free(instance->intr_htable[i]);
7434 	}
7435 
7436 	if (instance->intr_htable != NULL)
7437 		kmem_free(instance->intr_htable, instance->intr_htable_size);
7438 
7439 	instance->intr_htable = NULL;
7440 	instance->intr_htable_size = 0;
7441 
7442 }
7443 
7444 static int
mrsas_tran_bus_config(dev_info_t * parent,uint_t flags,ddi_bus_config_op_t op,void * arg,dev_info_t ** childp)7445 mrsas_tran_bus_config(dev_info_t *parent, uint_t flags,
7446     ddi_bus_config_op_t op, void *arg, dev_info_t **childp)
7447 {
7448 	struct mrsas_instance *instance;
7449 	int rval  = NDI_SUCCESS;
7450 
7451 	char *ptr = NULL;
7452 	int tgt, lun;
7453 
7454 	con_log(CL_ANN1, (CE_NOTE, "Bus config called for op = %x", op));
7455 
7456 	if ((instance = ddi_get_soft_state(mrsas_state,
7457 	    ddi_get_instance(parent))) == NULL) {
7458 		return (NDI_FAILURE);
7459 	}
7460 
7461 	/* Hold nexus during bus_config */
7462 	ndi_devi_enter(parent);
7463 	switch (op) {
7464 	case BUS_CONFIG_ONE: {
7465 
7466 		/* parse wwid/target name out of name given */
7467 		if ((ptr = strchr((char *)arg, '@')) == NULL) {
7468 			rval = NDI_FAILURE;
7469 			break;
7470 		}
7471 		ptr++;
7472 
7473 		if (mrsas_parse_devname(arg, &tgt, &lun) != 0) {
7474 			rval = NDI_FAILURE;
7475 			break;
7476 		}
7477 
7478 		if (lun == 0) {
7479 			rval = mrsas_config_ld(instance, tgt, lun, childp);
7480 		} else if ((instance->tbolt || instance->skinny) && lun != 0) {
7481 			rval = mrsas_tbolt_config_pd(instance,
7482 			    tgt, lun, childp);
7483 		} else {
7484 			rval = NDI_FAILURE;
7485 		}
7486 
7487 		break;
7488 	}
7489 	case BUS_CONFIG_DRIVER:
7490 	case BUS_CONFIG_ALL: {
7491 
7492 		rval = mrsas_config_all_devices(instance);
7493 
7494 		rval = NDI_SUCCESS;
7495 		break;
7496 	}
7497 	}
7498 
7499 	if (rval == NDI_SUCCESS) {
7500 		rval = ndi_busop_bus_config(parent, flags, op, arg, childp, 0);
7501 
7502 	}
7503 	ndi_devi_exit(parent);
7504 
7505 	con_log(CL_ANN1, (CE_NOTE, "mrsas_tran_bus_config: rval = %x",
7506 	    rval));
7507 	return (rval);
7508 }
7509 
7510 static int
mrsas_config_all_devices(struct mrsas_instance * instance)7511 mrsas_config_all_devices(struct mrsas_instance *instance)
7512 {
7513 	int rval, tgt;
7514 
7515 	for (tgt = 0; tgt < MRDRV_MAX_LD; tgt++) {
7516 		(void) mrsas_config_ld(instance, tgt, 0, NULL);
7517 
7518 	}
7519 
7520 	/* Config PD devices connected to the card */
7521 	if (instance->tbolt || instance->skinny) {
7522 		for (tgt = 0; tgt < instance->mr_tbolt_pd_max; tgt++) {
7523 			(void) mrsas_tbolt_config_pd(instance, tgt, 1, NULL);
7524 		}
7525 	}
7526 
7527 	rval = NDI_SUCCESS;
7528 	return (rval);
7529 }
7530 
7531 static int
mrsas_parse_devname(char * devnm,int * tgt,int * lun)7532 mrsas_parse_devname(char *devnm, int *tgt, int *lun)
7533 {
7534 	char devbuf[SCSI_MAXNAMELEN];
7535 	char *addr;
7536 	char *p,  *tp, *lp;
7537 	long num;
7538 
7539 	/* Parse dev name and address */
7540 	(void) strcpy(devbuf, devnm);
7541 	addr = "";
7542 	for (p = devbuf; *p != '\0'; p++) {
7543 		if (*p == '@') {
7544 			addr = p + 1;
7545 			*p = '\0';
7546 		} else if (*p == ':') {
7547 			*p = '\0';
7548 			break;
7549 		}
7550 	}
7551 
7552 	/* Parse target and lun */
7553 	for (p = tp = addr, lp = NULL; *p != '\0'; p++) {
7554 		if (*p == ',') {
7555 			lp = p + 1;
7556 			*p = '\0';
7557 			break;
7558 		}
7559 	}
7560 	if (tgt && tp) {
7561 		if (ddi_strtol(tp, NULL, 0x10, &num)) {
7562 			return (DDI_FAILURE); /* Can declare this as constant */
7563 		}
7564 			*tgt = (int)num;
7565 	}
7566 	if (lun && lp) {
7567 		if (ddi_strtol(lp, NULL, 0x10, &num)) {
7568 			return (DDI_FAILURE);
7569 		}
7570 			*lun = (int)num;
7571 	}
7572 	return (DDI_SUCCESS);  /* Success case */
7573 }
7574 
7575 static int
mrsas_config_ld(struct mrsas_instance * instance,uint16_t tgt,uint8_t lun,dev_info_t ** ldip)7576 mrsas_config_ld(struct mrsas_instance *instance, uint16_t tgt,
7577     uint8_t lun, dev_info_t **ldip)
7578 {
7579 	struct scsi_device *sd;
7580 	dev_info_t *child;
7581 	int rval;
7582 
7583 	con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_config_ld: t = %d l = %d",
7584 	    tgt, lun));
7585 
7586 	if ((child = mrsas_find_child(instance, tgt, lun)) != NULL) {
7587 		if (ldip) {
7588 			*ldip = child;
7589 		}
7590 		if (instance->mr_ld_list[tgt].flag != MRDRV_TGT_VALID) {
7591 			rval = mrsas_service_evt(instance, tgt, 0,
7592 			    MRSAS_EVT_UNCONFIG_TGT, 0);
7593 			con_log(CL_ANN1, (CE_WARN,
7594 			    "mr_sas: DELETING STALE ENTRY rval = %d "
7595 			    "tgt id = %d ", rval, tgt));
7596 			return (NDI_FAILURE);
7597 		}
7598 		return (NDI_SUCCESS);
7599 	}
7600 
7601 	sd = kmem_zalloc(sizeof (struct scsi_device), KM_SLEEP);
7602 	sd->sd_address.a_hba_tran = instance->tran;
7603 	sd->sd_address.a_target = (uint16_t)tgt;
7604 	sd->sd_address.a_lun = (uint8_t)lun;
7605 
7606 	if (scsi_hba_probe(sd, NULL) == SCSIPROBE_EXISTS)
7607 		rval = mrsas_config_scsi_device(instance, sd, ldip);
7608 	else
7609 		rval = NDI_FAILURE;
7610 
7611 	/* sd_unprobe is blank now. Free buffer manually */
7612 	if (sd->sd_inq) {
7613 		kmem_free(sd->sd_inq, SUN_INQSIZE);
7614 		sd->sd_inq = (struct scsi_inquiry *)NULL;
7615 	}
7616 
7617 	kmem_free(sd, sizeof (struct scsi_device));
7618 	con_log(CL_DLEVEL1, (CE_NOTE, "mrsas_config_ld: return rval = %d",
7619 	    rval));
7620 	return (rval);
7621 }
7622 
7623 int
mrsas_config_scsi_device(struct mrsas_instance * instance,struct scsi_device * sd,dev_info_t ** dipp)7624 mrsas_config_scsi_device(struct mrsas_instance *instance,
7625     struct scsi_device *sd, dev_info_t **dipp)
7626 {
7627 	char *nodename = NULL;
7628 	char **compatible = NULL;
7629 	int ncompatible = 0;
7630 	char *childname;
7631 	dev_info_t *ldip = NULL;
7632 	int tgt = sd->sd_address.a_target;
7633 	int lun = sd->sd_address.a_lun;
7634 	int dtype = sd->sd_inq->inq_dtype & DTYPE_MASK;
7635 	int rval;
7636 
7637 	con_log(CL_DLEVEL1, (CE_NOTE, "mr_sas: scsi_device t%dL%d", tgt, lun));
7638 	scsi_hba_nodename_compatible_get(sd->sd_inq, NULL, dtype,
7639 	    NULL, &nodename, &compatible, &ncompatible);
7640 
7641 	if (nodename == NULL) {
7642 		con_log(CL_ANN1, (CE_WARN, "mr_sas: Found no compatible driver "
7643 		    "for t%dL%d", tgt, lun));
7644 		rval = NDI_FAILURE;
7645 		goto finish;
7646 	}
7647 
7648 	childname = (dtype == DTYPE_DIRECT) ? "sd" : nodename;
7649 	con_log(CL_DLEVEL1, (CE_NOTE,
7650 	    "mr_sas: Childname = %2s nodename = %s", childname, nodename));
7651 
7652 	/* Create a dev node */
7653 	rval = ndi_devi_alloc(instance->dip, childname, DEVI_SID_NODEID, &ldip);
7654 	con_log(CL_DLEVEL1, (CE_NOTE,
7655 	    "mr_sas_config_scsi_device: ndi_devi_alloc rval = %x", rval));
7656 	if (rval == NDI_SUCCESS) {
7657 		if (ndi_prop_update_int(DDI_DEV_T_NONE, ldip, "target", tgt) !=
7658 		    DDI_PROP_SUCCESS) {
7659 			con_log(CL_ANN1, (CE_WARN, "mr_sas: unable to create "
7660 			    "property for t%dl%d target", tgt, lun));
7661 			rval = NDI_FAILURE;
7662 			goto finish;
7663 		}
7664 		if (ndi_prop_update_int(DDI_DEV_T_NONE, ldip, "lun", lun) !=
7665 		    DDI_PROP_SUCCESS) {
7666 			con_log(CL_ANN1, (CE_WARN, "mr_sas: unable to create "
7667 			    "property for t%dl%d lun", tgt, lun));
7668 			rval = NDI_FAILURE;
7669 			goto finish;
7670 		}
7671 
7672 		if (ndi_prop_update_string_array(DDI_DEV_T_NONE, ldip,
7673 		    "compatible", compatible, ncompatible) !=
7674 		    DDI_PROP_SUCCESS) {
7675 			con_log(CL_ANN1, (CE_WARN, "mr_sas: unable to create "
7676 			    "property for t%dl%d compatible", tgt, lun));
7677 			rval = NDI_FAILURE;
7678 			goto finish;
7679 		}
7680 
7681 		rval = ndi_devi_online(ldip, NDI_ONLINE_ATTACH);
7682 		if (rval != NDI_SUCCESS) {
7683 			con_log(CL_ANN1, (CE_WARN, "mr_sas: unable to online "
7684 			    "t%dl%d", tgt, lun));
7685 			ndi_prop_remove_all(ldip);
7686 			(void) ndi_devi_free(ldip);
7687 		} else {
7688 			con_log(CL_ANN1, (CE_CONT, "mr_sas: online Done :"
7689 			    "0 t%dl%d", tgt, lun));
7690 		}
7691 
7692 	}
7693 finish:
7694 	if (dipp) {
7695 		*dipp = ldip;
7696 	}
7697 
7698 	con_log(CL_DLEVEL1, (CE_NOTE,
7699 	    "mr_sas: config_scsi_device rval = %d t%dL%d",
7700 	    rval, tgt, lun));
7701 	scsi_hba_nodename_compatible_free(nodename, compatible);
7702 	return (rval);
7703 }
7704 
7705 /*ARGSUSED*/
7706 int
mrsas_service_evt(struct mrsas_instance * instance,int tgt,int lun,int event,uint64_t wwn)7707 mrsas_service_evt(struct mrsas_instance *instance, int tgt, int lun, int event,
7708     uint64_t wwn)
7709 {
7710 	struct mrsas_eventinfo *mrevt = NULL;
7711 
7712 	con_log(CL_ANN1, (CE_NOTE,
7713 	    "mrsas_service_evt called for t%dl%d event = %d",
7714 	    tgt, lun, event));
7715 
7716 	if ((instance->taskq == NULL) || (mrevt =
7717 	    kmem_zalloc(sizeof (struct mrsas_eventinfo), KM_NOSLEEP)) == NULL) {
7718 		return (ENOMEM);
7719 	}
7720 
7721 	mrevt->instance = instance;
7722 	mrevt->tgt = tgt;
7723 	mrevt->lun = lun;
7724 	mrevt->event = event;
7725 	mrevt->wwn = wwn;
7726 
7727 	if ((ddi_taskq_dispatch(instance->taskq,
7728 	    (void (*)(void *))mrsas_issue_evt_taskq, mrevt, DDI_NOSLEEP)) !=
7729 	    DDI_SUCCESS) {
7730 		con_log(CL_ANN1, (CE_NOTE,
7731 		    "mr_sas: Event task failed for t%dl%d event = %d",
7732 		    tgt, lun, event));
7733 		kmem_free(mrevt, sizeof (struct mrsas_eventinfo));
7734 		return (DDI_FAILURE);
7735 	}
7736 	DTRACE_PROBE3(service_evt, int, tgt, int, lun, int, event);
7737 	return (DDI_SUCCESS);
7738 }
7739 
7740 static void
mrsas_issue_evt_taskq(struct mrsas_eventinfo * mrevt)7741 mrsas_issue_evt_taskq(struct mrsas_eventinfo *mrevt)
7742 {
7743 	struct mrsas_instance *instance = mrevt->instance;
7744 	dev_info_t *dip, *pdip;
7745 	char *devname;
7746 
7747 	con_log(CL_ANN1, (CE_NOTE, "mrsas_issue_evt_taskq: called for"
7748 	    " tgt %d lun %d event %d",
7749 	    mrevt->tgt, mrevt->lun, mrevt->event));
7750 
7751 	if (mrevt->tgt < MRDRV_MAX_LD && mrevt->lun == 0) {
7752 		mutex_enter(&instance->config_dev_mtx);
7753 		dip = instance->mr_ld_list[mrevt->tgt].dip;
7754 		mutex_exit(&instance->config_dev_mtx);
7755 	} else {
7756 		mutex_enter(&instance->config_dev_mtx);
7757 		dip = instance->mr_tbolt_pd_list[mrevt->tgt].dip;
7758 		mutex_exit(&instance->config_dev_mtx);
7759 	}
7760 
7761 
7762 	ndi_devi_enter(instance->dip);
7763 	switch (mrevt->event) {
7764 	case MRSAS_EVT_CONFIG_TGT:
7765 		if (dip == NULL) {
7766 
7767 			if (mrevt->lun == 0) {
7768 				(void) mrsas_config_ld(instance, mrevt->tgt,
7769 				    0, NULL);
7770 			} else if (instance->tbolt || instance->skinny) {
7771 				(void) mrsas_tbolt_config_pd(instance,
7772 				    mrevt->tgt,
7773 				    1, NULL);
7774 			}
7775 			con_log(CL_ANN1, (CE_NOTE,
7776 			    "mr_sas: EVT_CONFIG_TGT called:"
7777 			    " for tgt %d lun %d event %d",
7778 			    mrevt->tgt, mrevt->lun, mrevt->event));
7779 
7780 		} else {
7781 			con_log(CL_ANN1, (CE_NOTE,
7782 			    "mr_sas: EVT_CONFIG_TGT dip != NULL:"
7783 			    " for tgt %d lun %d event %d",
7784 			    mrevt->tgt, mrevt->lun, mrevt->event));
7785 		}
7786 		break;
7787 	case MRSAS_EVT_UNCONFIG_TGT:
7788 		if (dip) {
7789 			if (i_ddi_devi_attached(dip)) {
7790 
7791 				pdip = ddi_get_parent(dip);
7792 
7793 				devname = kmem_zalloc(MAXNAMELEN + 1, KM_SLEEP);
7794 				(void) ddi_deviname(dip, devname);
7795 
7796 				(void) devfs_clean(pdip, devname + 1,
7797 				    DV_CLEAN_FORCE);
7798 				kmem_free(devname, MAXNAMELEN + 1);
7799 			}
7800 			(void) ndi_devi_offline(dip, NDI_DEVI_REMOVE);
7801 			con_log(CL_ANN1, (CE_NOTE,
7802 			    "mr_sas: EVT_UNCONFIG_TGT called:"
7803 			    " for tgt %d lun %d event %d",
7804 			    mrevt->tgt, mrevt->lun, mrevt->event));
7805 		} else {
7806 			con_log(CL_ANN1, (CE_NOTE,
7807 			    "mr_sas: EVT_UNCONFIG_TGT dip == NULL:"
7808 			    " for tgt %d lun %d event %d",
7809 			    mrevt->tgt, mrevt->lun, mrevt->event));
7810 		}
7811 		break;
7812 	}
7813 	kmem_free(mrevt, sizeof (struct mrsas_eventinfo));
7814 	ndi_devi_exit(instance->dip);
7815 }
7816 
7817 
7818 int
mrsas_mode_sense_build(struct scsi_pkt * pkt)7819 mrsas_mode_sense_build(struct scsi_pkt *pkt)
7820 {
7821 	union scsi_cdb		*cdbp;
7822 	uint16_t		page_code;
7823 	struct scsa_cmd		*acmd;
7824 	struct buf		*bp;
7825 	struct mode_header	*modehdrp;
7826 
7827 	cdbp = (void *)pkt->pkt_cdbp;
7828 	page_code = cdbp->cdb_un.sg.scsi[0];
7829 	acmd = PKT2CMD(pkt);
7830 	bp = acmd->cmd_buf;
7831 	if ((!bp) && bp->b_un.b_addr && bp->b_bcount && acmd->cmd_dmacount) {
7832 		con_log(CL_ANN1, (CE_WARN, "Failing MODESENSE Command"));
7833 		/* ADD pkt statistics as Command failed. */
7834 		return (0);
7835 	}
7836 
7837 	bp_mapin(bp);
7838 	bzero(bp->b_un.b_addr, bp->b_bcount);
7839 
7840 	switch (page_code) {
7841 		case 0x3: {
7842 			struct mode_format *page3p = NULL;
7843 			modehdrp = (struct mode_header *)(bp->b_un.b_addr);
7844 			modehdrp->bdesc_length = MODE_BLK_DESC_LENGTH;
7845 
7846 			page3p = (void *)((caddr_t)modehdrp +
7847 			    MODE_HEADER_LENGTH + MODE_BLK_DESC_LENGTH);
7848 			page3p->mode_page.code = 0x3;
7849 			page3p->mode_page.length =
7850 			    (uchar_t)(sizeof (struct mode_format));
7851 			page3p->data_bytes_sect = 512;
7852 			page3p->sect_track = 63;
7853 			break;
7854 		}
7855 		case 0x4: {
7856 			struct mode_geometry *page4p = NULL;
7857 			modehdrp = (struct mode_header *)(bp->b_un.b_addr);
7858 			modehdrp->bdesc_length = MODE_BLK_DESC_LENGTH;
7859 
7860 			page4p = (void *)((caddr_t)modehdrp +
7861 			    MODE_HEADER_LENGTH + MODE_BLK_DESC_LENGTH);
7862 			page4p->mode_page.code = 0x4;
7863 			page4p->mode_page.length =
7864 			    (uchar_t)(sizeof (struct mode_geometry));
7865 			page4p->heads = 255;
7866 			page4p->rpm = 10000;
7867 			break;
7868 		}
7869 		default:
7870 			break;
7871 	}
7872 	return (0);
7873 }
7874