xref: /illumos-gate/usr/src/uts/common/io/ntxn/nic_cmn.h (revision dda0720a)
1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 
22 /*
23  * Copyright 2008 NetXen, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 #ifndef _UNM_NIC_CMN_H_
28 #define	_UNM_NIC_CMN_H_
29 
30 #ifdef __cplusplus
31 extern "C" {
32 #endif
33 
34 #ifndef sun
35 #include "unm_nic_config.h"
36 #include "unm_compiler_defs.h"
37 #endif
38 
39 #define	IP_ALIGNMENT_BYTES		2  /* make ip aligned on 16byteaddr */
40 #define	P2_MAX_MTU			(8000)
41 #define	P3_MAX_MTU			(9600)
42 #define	NX_ETHERMTU			1500
43 #define	NX_MAX_ETHERHDR			32 /* This contains some padding */
44 
45 #define	NX_RX_NORMAL_BUF_MAX_LEN	(NX_MAX_ETHERHDR + NX_ETHERMTU)
46 #define	NX_P2_RX_JUMBO_BUF_MAX_LEN	(NX_MAX_ETHERHDR + P2_MAX_MTU)
47 #define	NX_P3_RX_JUMBO_BUF_MAX_LEN	(NX_MAX_ETHERHDR + P3_MAX_MTU)
48 
49 #define	MAX_RX_LRO_BUFFER_LENGTH	((8*1024) - 512)
50 #define	RX_LRO_DMA_MAP_LEN		(MAX_RX_LRO_BUFFER_LENGTH -\
51 					    IP_ALIGNMENT_BYTES)
52 
53 /* Opcodes to be used with the commands */
54 #define	TX_ETHER_PKT	0x01
55 /* The following opcodes are for IP checksum    */
56 #define	TX_TCP_PKT		0x02
57 #define	TX_UDP_PKT		0x03
58 #define	TX_IP_PKT		0x04
59 #define	TX_TCP_LSO		0x05
60 #define	TX_IPSEC		0x06
61 #define	TX_IPSEC_CMD	0x07
62 
63 #define	NETXEN_MAC_NOOP		0
64 #define	NETXEN_MAC_ADD		1
65 #define	NETXEN_MAC_DEL		2
66 
67 /* The following opcodes are for internal consumption. */
68 #define	UNM_CONTROL_OP		0x10
69 #define	PEGNET_REQUEST		0x11
70 #define	NX_HOST_REQUEST		0x13
71 #define	NX_NIC_REQUEST		0x14
72 #define	NX_NIC_LRO_REQUEST	0x15
73 
74 #define	NX_MAC_EVENT		0x1
75 
76 enum {
77 	NX_NIC_H2C_OPCODE_START = 0,
78 	NX_NIC_H2C_OPCODE_CONFIG_RSS,
79 	NX_NIC_H2C_OPCODE_CONFIG_RSS_TBL,
80 	NX_NIC_H2C_OPCODE_CONFIG_INTR_COALESCE,
81 	NX_NIC_H2C_OPCODE_CONFIG_LED,
82 	NX_NIC_H2C_OPCODE_CONFIG_PROMISCUOUS,
83 	NX_NIC_H2C_OPCODE_CONFIG_L2_MAC,
84 	NX_NIC_H2C_OPCODE_LRO_REQUEST,
85 	NX_NIC_H2C_OPCODE_GET_SNMP_STATS,
86 	NX_NIC_H2C_OPCODE_PROXY_START_REQUEST,
87 	NX_NIC_H2C_OPCODE_PROXY_STOP_REQUEST,
88 	NX_NIC_H2C_OPCODE_PROXY_SET_MTU,
89 	NX_NIC_H2C_OPCODE_PROXY_SET_VPORT_MISS_MODE,
90 	NX_H2P_OPCODE_GET_FINGER_PRINT_REQUEST,
91 	NX_H2P_OPCODE_INSTALL_LICENSE_REQUEST,
92 	NX_H2P_OPCODE_GET_LICENSE_CAPABILITY_REQUEST,
93 	NX_NIC_H2C_OPCODE_GET_NET_STATS,
94 	NX_NIC_H2C_OPCODE_LAST
95 };
96 
97 #define	VPORT_MISS_MODE_DROP			0 /* drop all unmatched */
98 #define	VPORT_MISS_MODE_ACCEPT_ALL		1 /* accept all packets */
99 #define	VPORT_MISS_MODE_ACCEPT_MULTI	2 /* accept unmatched multicast */
100 
101 #ifdef UNM_RSS
102 #define	RSS_CNTRL_CMD		0x20
103 #endif
104 #define	MAX_NUM_CARDS		4
105 #define	MAX_NUM_PORTS		4 /* Deprecated. donot use this */
106 #define	MAX_NIU_PORTS		MAX_NUM_PORTS
107 #define	PORT1				0
108 #define	PORT2				1
109 #define	PORT3				2
110 #define	PORT4				3
111 
112 
113 #define	DESC_CHAIN		0xFF /* descriptor command continuation */
114 
115 #define	MAX_BUFFERS_PER_CMD		16
116 #define	MAX_BUFFERS_PER_DESC	4
117 
118 #define	NX_P2_C0				0x24
119 #define	NX_P2_C1				0x25
120 
121 #define	DUMMY_BUF_UNINIT	0x55555555
122 #define	DUMMY_BUF_INIT		0
123 
124 /*
125  * Following are the states of the Phantom. Phantom will set them and
126  * Host will read to check if the fields are correct.
127  */
128 #define	PHAN_INITIALIZE_START		0xff00
129 #define	PHAN_INITIALIZE_FAILED		0xffff
130 #define	PHAN_INITIALIZE_COMPLETE	0xff01
131 
132 /* Host writes the following to notify that it has done the init-handshake */
133 #define	PHAN_INITIALIZE_ACK			0xf00f
134 
135 /* Following defines will be used in the status descriptor */
136 #define	TX_ETHER_PKT_COMPLETE  0xB  /* same for both commands */
137 
138 #define	NUM_RCV_DESC_RINGS		3 /* No of Rcv Descriptor contexts */
139 
140 /* descriptor types */
141 #define	RCV_DESC_NORMAL			0x01
142 #define	RCV_DESC_JUMBO			0x02
143 #define	RCV_DESC_LRO			0x04
144 #define	RCV_DESC_NORMAL_CTXID	0
145 #define	RCV_DESC_JUMBO_CTXID	1
146 #define	RCV_DESC_LRO_CTXID		2
147 
148 #define	RCV_DESC_TYPE(ID) \
149 	((ID == RCV_DESC_JUMBO_CTXID) ? RCV_DESC_JUMBO :  \
150 	    ((ID == RCV_DESC_LRO_CTXID) ? RCV_DESC_LRO : (RCV_DESC_NORMAL)))
151 
152 #define	RCV_DESC_TYPE_NAME(ID) \
153 	((ID	==	RCV_DESC_JUMBO_CTXID)	?	"Jumbo"	:	\
154 	(ID == RCV_DESC_LRO_CTXID)    ? "LRO"    :  \
155 	(ID == RCV_DESC_NORMAL_CTXID) ? "Normal" : "Unknown")
156 
157 #define	MAX_CMD_DESCRIPTORS			4096
158 #define	MAX_CMD_DESCRIPTORS_HOST	(MAX_CMD_DESCRIPTORS / 4)
159 
160 #define	MAX_RCV_DESCRIPTORS			8192
161 #define	MAX_JUMBO_RCV_DESCRIPTORS	1024
162 #define	MAX_LRO_RCV_DESCRIPTORS		16
163 
164 #define	NX_MAX_SUPPORTED_RDS_SIZE	(32 * 1024)
165 #define	NX_MAX_SUPPORTED_JUMBO_RDS_SIZE	(4 * 1024)
166 
167 #define	PHAN_PEG_RCV_INITIALIZED		0xff01
168 #define	PHAN_PEG_RCV_START_INITIALIZE	0xff00
169 
170 #define	get_next_index(index, length)  ((((index)  + 1) == length)?0:(index) +1)
171 
172 #define	get_index_range(index, length, count)	\
173 	((((index) + (count)) >= length)? \
174 		(((index)  + (count))-(length)):((index) + (count)))
175 
176 #define	UNM_FLOW_TICKS_PER_SEC    2048
177 #define	UNM_FLOW_TO_TV_SHIFT_SEC  11
178 #define	UNM_FLOW_TO_TV_SHIFT_USEC 9
179 #define	UNM_FLOW_TICK_USEC   (1000000ULL/UNM_FLOW_TICKS_PER_SEC)
180 #define	UNM_GLOBAL_TICKS_PER_SEC  (4*UNM_FLOW_TICKS_PER_SEC)
181 #define	UNM_GLOBAL_TICK_USEC (1000000ULL/UNM_GLOBAL_TICKS_PER_SEC)
182 
183 
184 /*
185  * Following data structures describe the descriptors that will be used.
186  * Added fileds of tcpHdrSize and ipHdrSize, The driver needs to do it only when
187  * we are doing LSO (above the 1500 size packet) only.
188  * This is an overhead but we need it. Let me know if you have questions.
189  */
190 
191 /*
192  * the size of reference handle been changed to 16 bits to pass the MSS fields
193  * for the LSO packet
194  */
195 
196 #define	FLAGS_MCAST				0x01
197 #define	FLAGS_LSO_ENABLED			0x02
198 #define	FLAGS_IPSEC_SA_ADD			0x04
199 #define	FLAGS_IPSEC_SA_DELETE			0x08
200 #define	FLAGS_VLAN_TAGGED			0x10
201 
202 #if UNM_CONF_PROCESSOR == UNM_CONF_X86
203 
204 #ifndef U64
205 typedef unsigned long long U64;
206 typedef uint32_t U32;
207 typedef uint16_t U16;
208 typedef uint8_t  U8;
209 #endif
210 
211 #endif
212 
213 #define	NUM_SUPPORTED_RINGSETS	4
214 #define	MAX_RING_CTX			4
215 #define	UNM_CTX_SIGNATURE		0xdee0
216 #define	UNM_CTX_RESET			0xbad0
217 #define	UNM_CTX_D3_RESET		0xacc0
218 
219 /* define opcode for ctx_msg */
220 #define	RX_PRODUCER				0
221 #define	RX_PRODUCER_JUMBO		1
222 #define	RX_PRODUCER_LRO			2
223 #define	TX_PRODUCER				3
224 #define	UPDATE_STATUS_CONSUMER	4
225 #define	RESET_CTX				5
226 
227 #define	NUM_DB_CODE				6
228 
229 #define	UNM_RCV_PRODUCER(ringid)	(ringid)
230 #define	UNM_CMD_PRODUCER			TX_PRODUCER
231 #define	UNM_RCV_STATUS_CONSUMER		UPDATE_STATUS_CONSUMER
232 
233 typedef struct __msg
234 {
235     __uint32_t  PegId:2,   /* 0x2 for tx and 01 for rx */
236 			    privId:1, /* must be 1 */
237 			    Count:15, /* for doorbell */
238 			    CtxId:10, /* Ctx_id */
239 			    Opcode:4; /* opcode */
240 }ctx_msg, CTX_MSG, *PCTX_MSG;
241 
242 typedef struct __int_msg
243 {
244     __uint32_t  Count:18, /* INT */
245 			    ConsumerIdx:10,
246 			    CtxId:4; /* Ctx_id */
247 
248 }int_msg, INT_MSG, *PINT_MSG;
249 
250 /* For use in CRB_MPORT_MODE */
251 #define	MPORT_SINGLE_FUNCTION_MODE	0x1111
252 #define	MPORT_MULTI_FUNCTION_MODE	0x2222
253 
254 typedef struct _RcvContext
255 {
256 	__uint32_t		RcvRingAddrLo;
257 	__uint32_t		RcvRingAddrHi;
258 	__uint32_t		RcvRingSize;
259 	__uint32_t		Rsrv;
260 }RcvContext;
261 
262 typedef struct PREALIGN(64) _RingContext
263 {
264 
265 	/* one command ring */
266 	__uint64_t		CMD_CONSUMER_OFFSET;
267 	__uint32_t		CmdRingAddrLo;
268 	__uint32_t		CmdRingAddrHi;
269 	__uint32_t		CmdRingSize;
270 	__uint32_t		Rsrv;
271 
272 	/* three receive rings */
273 	RcvContext		RcvContext[3];
274 
275 	/* one status ring */
276 	__uint32_t		StsRingAddrLo;
277 	__uint32_t		StsRingAddrHi;
278 	__uint32_t		StsRingSize;
279 
280 	__uint32_t		CtxId;
281 
282 	__uint64_t		D3_STATE_REGISTER;
283 	__uint32_t		DummyDmaAddrLo;
284 	__uint32_t		DummyDmaAddrHi;
285 
286 }POSTALIGN(64) RingContext, RING_CTX, *PRING_CTX;
287 
288 #ifdef UNM_RSS
289 /*
290  * RSS_SreInfo{} has the information for SRE to calculate the hash value
291  * Will be passed by the host=> as part of comd descriptor...
292  */
293 
294 #if UNM_CONF_PROCESSOR == UNM_CONF_X86
295 typedef struct _RSS_SreInfo {
296 	U32		HashKeySize;
297 	U32		HashInformation;
298 	char	key[40];
299 }RSS_SreInfo;
300 #endif
301 
302 /*
303  * The following Descriptor is used to send RSS commands to the
304  * PEG.... to be do the SRE registers..
305  */
306 typedef struct PREALIGN(64) _rssCmdDesc
307 {
308 
309 	/*
310 	 * To keep the opcode at the same location as
311 	 * the cmdDescType0, we will have to breakup the key into
312 	 * 2 areas.... Dont like it but for now will do... FSL
313 	 */
314 
315 #if UNM_CONF_PROCESSOR == UNM_CONF_X86
316 	U8		Key0[16];
317 
318 	U64		HashMethod:32,
319 			HashKeySize:8,
320 			Unused:	16,
321 			opcode:8;
322 
323 	U8		Key1[24];
324 	U64		Unused1;
325 	U64		Unused2;
326 #else
327 
328 	unm_msgword_t		Key0[2];
329 	unm_halfmsgword_t	HashMethod;
330 	unm_halfmsgword_t
331 						HashKeySize:8,
332 						Unused:16,
333 						opcode:8;
334 
335 	unm_msgword_t    Key1[3];
336 	unm_msgword_t    Unused1;
337 	unm_msgword_t    Unused2;
338 
339 #endif
340 
341 } POSTALIGN(64) rssCmdDesc_t;
342 
343 
344 #endif /* UNM_RSS */
345 
346 
347 typedef struct PREALIGN(64) cmdDescType0
348 {
349 	union {
350 		struct {
351 			__uint32_t	tcpHdrOffset:8, /* For LSO only */
352 			ipHdrOffset:8,  /* For LSO only */
353 			flags:7, /* as defined above */
354 			/* This location/size must not change... */
355 			opcode:6,
356 			Unused:3;
357 			/* total number of segments (buffers */
358 			__uint32_t	numOfBuffers:8,
359 			/* for this packet. (could be more than 4) */
360 
361 			/* Total size of the packet */
362 			totalLength:24;
363 		}s1;
364 		__uint64_t	word0;
365 	}u1;
366 
367 	union {
368 		struct {
369 			__uint32_t AddrLowPart2;
370 			__uint32_t AddrHighPart2;
371 		}s1;
372 		__uint64_t AddrBuffer2;
373 		__uint64_t	word1;
374 	}u2;
375 
376 	union {
377 		struct {
378 					/* changed to U16 to add mss */
379 			__uint32_t	referenceHandle:16,
380 					/* passed by NDIS_PACKET for LSO */
381 						mss:16;
382 			__uint32_t	port:4,
383 						ctx_id:4,
384 					/* LSO only : MAC+IP+TCP Hdr size */
385 						totalHdrLength:8,
386 					/* IPSec offoad only */
387 						connID:16;
388 		}s1;
389 		__uint64_t	word2;
390 	}u3;
391 
392 	union {
393 		struct {
394 			__uint32_t AddrLowPart3;
395 			__uint32_t AddrHighPart3;
396 		}s1;
397 		__uint64_t AddrBuffer3;
398 		__uint64_t	word3;
399 	}u4;
400 
401 	union {
402 		struct {
403 			__uint32_t AddrLowPart1;
404 			__uint32_t AddrHighPart1;
405 		}s1;
406 		__uint64_t AddrBuffer1;
407 		__uint64_t	word4;
408 	}u5;
409 
410 	union {
411 		struct {
412 			__uint32_t	buffer1Length:16,
413 						buffer2Length:16;
414 			__uint32_t  buffer3Length:16,
415 						buffer4Length:16;
416 		}s1;
417 		__uint64_t	word5;
418 	}u6;
419 
420 	union {
421 		struct {
422 			__uint32_t AddrLowPart4;
423 			__uint32_t AddrHighPart4;
424 		}s1;
425 		__uint64_t AddrBuffer4;
426 		__uint64_t	word6;
427 	}u7;
428 
429 	__uint64_t mcastAddr;
430 
431 } POSTALIGN(64) cmdDescType0_t;
432 
433 /* Note: sizeof(rcvDesc) should always be a mutliple of 2 */
434 typedef struct rcvDesc
435 {
436 	__uint32_t	referenceHandle:16,
437 				flags:16;
438 	__uint32_t
439 		/* allocated buffer length (usually 2K) */
440 				bufferLength:32;
441 	__uint64_t	AddrBuffer;
442 }  rcvDesc_t;
443 
444 /* for status field in statusDesc_t */
445 #define	STATUS_NEED_CKSUM		(1)
446 #define	STATUS_CKSUM_OK			(2)
447 #define	STATUS_CKSUM_NOT_OK		(3)
448 
449 /* owner bits of statusDesc_t */
450 #define	STATUS_OWNER_HOST		(1ULL)
451 #define	STATUS_OWNER_PHANTOM	(2ULL)
452 #define	HOST_STATUS_DESC		((STATUS_OWNER_HOST) << 48)
453 #define	PHANTOM_STATUS_DESC		((STATUS_OWNER_PHANTOM) << 48)
454 
455 #define	UNM_PROT_IP			(1)
456 #define	UNM_PROT_UNKNOWN	(0)
457 
458 /* LRO specific bits of statusDesc_t */
459 #define	LRO_LAST_FRAG			(1)
460 #define	LRO_NORMAL_FRAG			(0)
461 #define	LRO_LAST_FRAG_DESC		((LRO_LAST_FRAG)<<63)
462 #define	LRO_NORMAL_FRAG_DESC	((LRO_NORMAL_FRAG)<<63)
463 
464 typedef struct PREALIGN(16) statusDesc {
465 	union {
466 		struct {
467 					/* initially to be used but noe now */
468 			__uint32_t	port:4,
469 					/* completion status may not have use */
470 						status:4,
471 					/* type/index of descriptor ring */
472 						type:4,
473 					/* NIC mode...no use yet */
474 						totalLength:16,
475 					/* handle for the associated packet */
476 						referenceHandle_lo:4;
477 					/* handle for the associated packet */
478 			__uint32_t	referenceHandle_hi:12,
479 					/* Pkt protocol */
480 						prot:4,
481 						pkt_offset:5,
482 /*
483  * This indicates the num of descriptors part of this descriptor chain.
484  */
485 						descCnt:3,
486 						owner:2,
487 						opcode:6;
488 
489 			__uint32_t	HashValue;
490 			__uint16_t	vlan;
491 			__uint8_t	HashType;
492 
493 		union {
494 			/*
495 			 * For LRO count is set
496 			 * Last LRO fragment is set when it is
497 			 * the last frag as the name says.
498 			 */
499 			__uint8_t	lro_frag:7, last_lro_frag:1;
500 
501 			/*
502 			 * Used to indicate direction in case
503 			 * of captured packets. Egress will
504 			 * contain EPG input, while ingress
505 			 * contains an skb copy.
506 			 */
507 #define	NX_CAP_DIRN_OUT	1
508 #define	NX_CAP_DIRN_IN	2
509 			__uint8_t direction;
510 
511 			/*
512 			 * Currently for Legacy this is 0.
513 			 */
514 			__uint8_t	nr_frags;
515 		}u11;
516 
517 		}s1;
518 		__uint64_t	 body[2];
519 		}u1;
520 
521 } POSTALIGN(16) statusDesc_t;
522 
523 
524 #define	STATUS_OWNER_NAME(sd) \
525 	(((sd)->u1.s1.owner == STATUS_OWNER_HOST) ? "Host" : "Phantom")
526 
527 #ifdef	UNM_IPSECOFFLOAD
528 
529 #define	MAX_IPSEC_SAS			1024
530 #define	RECEIVE_IPSEC_SA_BASE	0x8000
531 
532 /*
533  * IPSEC related structures and defines
534  */
535 
536 /* Values for DIrFlag in the ipsec_sa_t structure below: */
537 #define	UNM_IPSEC_SA_DIR_INBOUND	1
538 #define	UNM_IPSEC_SA_DIR_OUTBOUND	2
539 
540 /* Values for Operation Field below: */
541 #define	UNM_IPSEC_SA_AUTHENTICATE	1
542 #define	UNM_IPSEC_SA_ENDECRYPT		2
543 
544 /* COnfidential Algorithm Types: */
545 #define	UNM_IPSEC_CONF_NONE			0    // NULL encryption?
546 #define	UNM_IPSEC_CONF_DES			1
547 #define	UNM_IPSEC_CONF_RESERVED		2
548 #define	UNM_IPSEC_CONF_3DES			3
549 
550 /* Integrity algorithm (AH) types: */
551 #define	UNM_IPSEC_INTEG_NONE	0
552 #define	UNM_IPSEC_INTEG_MD5		1
553 #define	UNM_IPSEC_INTEG_SHA1	2
554 
555 #define	UNM_PROTOCOL_OFFSET		0x9    // from ip header begin, in bytes
556 #define	UNM_PKT_TYPE_AH			0x33
557 #define	UNM_PKT_TYPE_ESP		0x32
558 
559 
560 /* 96 bits of output for MD5/SHA1 algorithms */
561 #define	UNM_AHOUTPUT_LENGTH		12
562 /*
563  * 8 bytes (64 bits) of ICV value for each block of DES_CBC
564  * at the begin of ESP payload
565  */
566 #define	UNM_DES_ICV_LENGTH		8
567 
568 #if UNM_CONF_PROCESSOR == UNM_CONF_X86
569 
570 typedef struct PREALIGN(512) s_ipsec_sa {
571 	U32	SrcAddr;
572 	U32	SrcMask;
573 	U32	DestAddr;
574 	U32	DestMask;
575 	U32	Protocol:8,
576 		DirFlag:4,
577 		IntegCtxInit:2,
578 		ConfCtxInit:2,
579 		No_of_keys:8,
580 		Operation:8;
581 	U32	IntegAlg:8,
582 		IntegKeyLen:8,
583 		ConfAlg:8,
584 		ConfAlgKeyLen:8;
585 	U32	SAIndex;
586 	U32	SPI_Id;
587 	U64	Key1[124];
588 } POSTALIGN(512) unm_ipsec_sa_t;
589 
590 #else
591 
592 typedef struct PREALIGN(512) s_ipsec_sa {
593 	unm_halfmsgword_t	SrcAddr;
594 	unm_halfmsgword_t	SrcMask;
595 	unm_halfmsgword_t	DestAddr;
596 	unm_halfmsgword_t	DestMask;
597 	unm_halfmsgword_t	Protocol:8,
598 						DirFlag:4,
599 						IntegCtxInit:2,
600 						ConfCtxInit:2,
601 						No_of_keys:8,
602 						Operation:8;
603 	unm_halfmsgword_t	IntegAlg:8,
604 						IntegKeyLen:8,
605 						ConfAlg:8,
606 						ConfAlgKeyLen:8;
607 	unm_halfmsgword_t	SAIndex:32;
608 	unm_halfmsgword_t	SPI_Id:32;
609 	/* to round up to 1K of structure */
610 	unm_msgword_t		Key1[124];
611 } POSTALIGN(512) unm_ipsec_sa_t;
612 
613 #endif /* NOT-X86 */
614 
615 /* Other common header formats that may be needed */
616 
617 typedef struct _unm_ip_header_s {
618 	U32	HdrVer:8,
619 		diffser:8,
620 		TotalLength:16;
621 	U32	ipId:16,
622 		flagfrag:16;
623 	U32	TTL:8,
624 		Protocol:8,
625 		Chksum:16;
626 	U32	srcaddr;
627 	U32	destaddr;
628 } unm_ip_header_t;
629 
630 typedef struct _unm_ah_header_s {
631 	U32	NextProto:8,
632 		length:8,
633 		reserved:16;
634 	U32    SPI;
635 	U32    seqno;
636 	U16    ICV;
637 	U16    ICV1;
638 	U16    ICV2;
639 	U16    ICV3;
640 	U16    ICV4;
641 	U16    ICV5;
642 } unm_ah_header_t;
643 
644 typedef struct _unm_esp_hdr_s {
645 	U32 SPI;
646 	U32 seqno;
647 } unm_esp_hdr_t;
648 
649 #endif /* UNM_IPSECOFFLOAD */
650 
651 /*
652  * Defines for various loop counts. These determine the behaviour of the
653  * system. The classic tradeoff between latency and throughput.
654  */
655 
656 /*
657  * MAX_DMA_LOOPCOUNT : After how many interations do we start the dma for
658  * the status descriptors.
659  */
660 #define	MAX_DMA_LOOPCOUNT    (32)
661 
662 /*
663  * MAX_TX_DMA_LOOP_COUNT : After how many interations do we start the dma for
664  * the command descriptors.
665  */
666 #define	MAX_TX_DMA_LOOP_COUNT    1000
667 
668 /*
669  * MAX_RCV_BUFS : Max number Rx packets that can be buffered before DMA/INT
670  */
671 #define	MAX_RCV_BUFS	(4096)
672 
673 /*
674  * XXX;shouldnt be exposed in nic_cmn.h
675  * DMA_MAX_RCV_BUFS : Max number Rx packets that can be buffered before DMA
676  */
677 #define	DMA_MAX_RCV_BUFS	(4096)
678 
679 /*
680  * XXX;shouldnt be exposed in nic_cmn.h
681  * MAX_DMA_ENTRIES : Max number Rx dma entries can be in dma list
682  */
683 #define	MAX_DMA_ENTRIES		(4096)
684 
685 
686 /*
687  * MAX_INTR_LOOPCOUNT : After how many iterations do we interrupt the
688  * host ?
689  */
690 #define	MAX_INTR_LOOPCOUNT		(1024)
691 
692 /*
693  * XMIT_LOOP_THRESHOLD : How many times do we spin before we process the
694  * transmit buffers.
695  */
696 #define	XMIT_LOOP_THRESHOLD		0x20
697 
698 /*
699  * XMIT_DESC_THRESHOLD : How many descriptors pending before we process
700  * the descriptors.
701  */
702 #define	XMIT_DESC_THRESHOLD		0x4
703 
704 /*
705  * TX_DMA_THRESHOLD : When do we start the dma of the command descriptors.
706  * We need these number of command descriptors, or we need to exceed the
707  * loop count.   P1 only.
708  */
709 #define	TX_DMA_THRESHOLD		16
710 
711 #if defined(UNM_IP_FILTER)
712 /*
713  * Commands. Must match the definitions in nic/Linux/include/unm_nic_ioctl.h
714  */
715 enum {
716 	UNM_IP_FILTER_CLEAR = 1,
717 	UNM_IP_FILTER_ADD,
718 	UNM_IP_FILTER_DEL,
719 	UNM_IP_FILTER_SHOW
720 };
721 
722 #define	MAX_FILTER_ENTRIES		16
723 
724 typedef struct {
725 	__int32_t count;
726 	__uint32_t ip_addr[15];
727 } unm_ip_filter_t;
728 #endif /* UNM_IP_FILTER */
729 
730 enum {
731 	UNM_RCV_PEG_0 = 0,
732 	UNM_RCV_PEG_1
733 };
734 
735 #ifdef __cplusplus
736 }
737 #endif
738 
739 #endif /* !_UNM_NIC_CMN_H_ */
740