1 /*-
2  * Copyright (C) 2005 TAKAHASHI Yoshihiro. All rights reserved.
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions
6  * are met:
7  * 1. Redistributions of source code must retain the above copyright
8  *    notice, this list of conditions and the following disclaimer.
9  * 2. Redistributions in binary form must reproduce the above copyright
10  *    notice, this list of conditions and the following disclaimer in the
11  *    documentation and/or other materials provided with the distribution.
12  *
13  * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
14  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
15  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
16  * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
17  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23  * SUCH DAMAGE.
24  *
25  * $FreeBSD: head/sys/amd64/include/timerreg.h 177642 2008-03-26 20:09:21Z phk $
26  */
27 
28 /*
29  * The outputs of the three timers are connected as follows:
30  *
31  *	 timer 0 -> irq 0
32  *	 timer 1 -> dma chan 0 (for dram refresh)
33  * 	 timer 2 -> speaker (via keyboard controller)
34  *
35  * Timer 0 is used to call hardclock.
36  * Timer 2 is used to generate console beeps.
37  */
38 
39 #ifndef _MACHINE_TIMERREG_H_
40 #define _MACHINE_TIMERREG_H_
41 
42 #ifdef _KERNEL
43 
44 #include <dev/ic/i8253reg.h>
45 
46 #define	IO_TIMER1	0x40		/* 8253 Timer #1 */
47 #define	TIMER_CNTR0	(IO_TIMER1 + TIMER_REG_CNTR0)
48 #define	TIMER_CNTR1	(IO_TIMER1 + TIMER_REG_CNTR1)
49 #define	TIMER_CNTR2	(IO_TIMER1 + TIMER_REG_CNTR2)
50 #define	TIMER_MODE	(IO_TIMER1 + TIMER_REG_MODE)
51 
52 #endif /* _KERNEL */
53 
54 #endif /* _MACHINE_TIMERREG_H_ */
55