1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License (the "License").
6  * You may not use this file except in compliance with the License.
7  *
8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9  * or http://www.opensolaris.org/os/licensing.
10  * See the License for the specific language governing permissions
11  * and limitations under the License.
12  *
13  * When distributing Covered Code, include this CDDL HEADER in each
14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15  * If applicable, add the following below this CDDL HEADER, with the
16  * fields enclosed by brackets "[]" replaced with your own identifying
17  * information: Portions Copyright [yyyy] [name of copyright owner]
18  *
19  * CDDL HEADER END
20  */
21 
22 /*
23  * Copyright 2010 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 /*
28  * Purpose: Definitions for the CS 4281 AC97 driver
29  */
30 /*
31  * This file is part of Open Sound System
32  *
33  * Copyright (C) 4Front Technologies 1996-2009.
34  *
35  * This software is released under CDDL 1.0 source license.
36  * See the COPYING file included in the main directory of this source
37  * distribution for the license terms and conditions.
38  */
39 #ifndef	AUDIOP16X_H
40 #define	AUDIOP16X_H
41 
42 #define	P16X_NAME		"audiop16x"
43 
44 #define	P16X_NUM_PORT	2
45 
46 #define	CREATIVE_VENDOR_ID	0x1102
47 #define	SB_P16X_ID		0x0006
48 
49 typedef struct _p16x_dev_t p16x_dev_t;
50 typedef struct _p16x_port_t p16x_port_t;
51 
52 struct _p16x_port_t
53 {
54 	p16x_dev_t 		*dev;
55 	audio_engine_t 		*engine;
56 
57 	caddr_t			base;
58 
59 	int			port_num;
60 #define	P16X_PLAY		0
61 #define	P16X_REC		1
62 	ddi_dma_handle_t	buf_dmah;	/* dma for buffers */
63 	ddi_acc_handle_t	buf_acch;
64 	uint32_t		buf_paddr;
65 	caddr_t			buf_kaddr;
66 	size_t			buf_size;
67 	uint32_t		buf_frames;
68 	int			syncdir;
69 	int			nchan;
70 	uint64_t		count;
71 	uint32_t		offset;
72 };
73 
74 struct _p16x_dev_t
75 {
76 	dev_info_t		*dip;
77 	audio_dev_t		*adev;
78 	ac97_t			*ac97;
79 	boolean_t		suspended;
80 	ddi_acc_handle_t	pcih;
81 	ddi_acc_handle_t	regsh;
82 	caddr_t			base;
83 	kmutex_t		mutex;	/* For low level routines */
84 
85 	p16x_port_t 		*port[P16X_NUM_PORT];
86 };
87 
88 #define	INL(dev, reg)	\
89 	ddi_get32(dev->regsh, (void *)((char *)dev->base+(reg)))
90 #define	INW(dev, reg)	\
91 	ddi_get16(dev->regsh, (void *)((char *)dev->base+(reg)))
92 #define	INB(dev, reg)	\
93 	ddi_get8(dev->regsh, (void *)((char *)dev->base+(reg)))
94 
95 #define	OUTL(dev, val, reg)	\
96 	ddi_put32(dev->regsh, (void *)((char *)dev->base+(reg)), (val))
97 #define	OUTW(dev, val, reg)	\
98 	ddi_put16(dev->regsh, (void *)((char *)dev->base+(reg)), (val))
99 #define	OUTB(dev, val, reg)	\
100 	ddi_put8(dev->regsh, (void *)((char *)dev->base+(reg)), (val))
101 
102 /*
103  * SB P16X Registers
104  */
105 
106 #define	PTR 	0x00
107 #define	DR	0x04
108 #define	IP	0x08
109 #define	IE	0x0C
110 #define	HC	0x14
111 #define	GPIO	0x18
112 #define	AC97D	0x1C
113 #define	AC97A	0x1E
114 
115 /*
116  * Indirect registers
117  */
118 
119 #define	PTBA	0x000
120 #define	PTBS	0x001
121 #define	PTCA	0x002
122 #define	PFBA	0x004
123 #define	PFBS	0x005
124 #define	CPFA	0x006
125 #define	PFEA	0x007
126 #define	CPCAV	0x008
127 #define	RFBA	0x010
128 #define	RFBS	0x011
129 #define	CRFA	0x012
130 #define	CRCAV	0x013
131 #define	CDL	0x020
132 #define	CDR	0x030
133 #define	SA	0x040
134 #define	EA_aux	0x041
135 #define	SCS0	0x042
136 #define	SCS1	0x043
137 #define	SCS2	0x044
138 #define	SPC	0x045
139 #define	WMARK	0x046
140 #define	MUDAT	0x047
141 #define	MUCMD	0x048
142 #define	RCD	0x050
143 
144 /*
145  * Interrupt bits
146  */
147 
148 #define	INTR_RFF	(1<<19)
149 #define	INTR_RFH	(1<<16)
150 #define	INTR_PFF	(3<<11)
151 #define	INTR_PFH	(3<<8)
152 #define	INTR_EAI	(1<<29)
153 #define	INTR_PCI	1
154 #define	INTR_UART_RX	2
155 #define	INTR_UART_TX	4
156 #define	INTR_AC97	0x10
157 #define	INTR_GPIO	0x40
158 #define	INTR_PLAY	(INTR_PFF | INTR_PFH)
159 #define	INTR_REC	(INTR_RFF | INTR_RFH)
160 #define	INTR_ALL	(INTR_PLAY | INTR_REC | INTR_PCI)
161 
162 #endif /* AUDIOP16X_H */
163