1 /*
2  * CDDL HEADER START
3  *
4  * The contents of this file are subject to the terms of the
5  * Common Development and Distribution License, Version 1.0 only
6  * (the "License").  You may not use this file except in compliance
7  * with the License.
8  *
9  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10  * or http://www.opensolaris.org/os/licensing.
11  * See the License for the specific language governing permissions
12  * and limitations under the License.
13  *
14  * When distributing Covered Code, include this CDDL HEADER in each
15  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16  * If applicable, add the following below this CDDL HEADER, with the
17  * fields enclosed by brackets "[]" replaced with your own identifying
18  * information: Portions Copyright [yyyy] [name of copyright owner]
19  *
20  * CDDL HEADER END
21  */
22 /*
23  * Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
24  * Use is subject to license terms.
25  */
26 
27 #ifndef	_LIBCPC_IMPL_H
28 #define	_LIBCPC_IMPL_H
29 
30 #include <libcpc.h>
31 #include <inttypes.h>
32 #include <thread.h>
33 #include <synch.h>
34 #include <sys/types.h>
35 #include <sys/cpc_impl.h>
36 
37 #ifdef	__cplusplus
38 extern "C" {
39 #endif
40 
41 #define	CPC_VER_1 1
42 #define	CPC1_BUFSIZE (2 * sizeof (uint64_t))
43 
44 struct _cpc_attr {
45 	char			ca_name[CPC_MAX_ATTR_LEN];
46 	uint64_t		ca_val;
47 };
48 
49 typedef struct __cpc_request cpc_request_t;
50 
51 struct __cpc_request {
52 	char			cr_event[CPC_MAX_EVENT_LEN];
53 	uint64_t		cr_preset;	/* Initial value */
54 	uint16_t		cr_index;	/* Index of request in data */
55 	uint_t			cr_flags;
56 	uint_t			cr_nattrs;	/* # CPU-specific attrs */
57 	kcpc_attr_t		*cr_attr;
58 	cpc_request_t		*cr_next;	/* next request in set */
59 };
60 
61 struct __cpc_buf {
62 	uint64_t		*cb_data;	/* Pointer to data store */
63 	hrtime_t		cb_hrtime;	/* hrtime at last sample */
64 	uint64_t		cb_tick;	/* virtualized tsc/tick */
65 	size_t			cb_size;	/* Size of data store, bytes */
66 	cpc_buf_t		*cb_next;	/* List of all bufs */
67 };
68 
69 /*
70  * Possible cpc_set_t states:
71  */
72 typedef enum {
73 	CS_UNBOUND,		/* Set is not currently bound */
74 	CS_BOUND_CURLWP,	/* Set has been bound to curlwp */
75 	CS_BOUND_PCTX,		/* Set has been bound via libpctx */
76 	CS_BOUND_CPU		/* Set has been bound to a CPU */
77 } __cpc_state_t;
78 
79 struct __cpc_set {
80 	cpc_request_t		*cs_request;	/* linked list of requests */
81 	__cpc_state_t		cs_state;	/* State of this set */
82 	int			cs_nreqs;	/* Number of requests in set */
83 	int			cs_fd;		/* file descriptor of cpc dev */
84 	processorid_t		cs_obind;	/* previous proc binding */
85 	pctx_t			*cs_pctx;	/* pctx of process bound to */
86 	id_t			cs_id;		/* lwp ID of pctx binding */
87 	thread_t		cs_thr;		/* thread ID which bound set */
88 	cpc_set_t		*cs_next;	/* Linked list of all sets */
89 };
90 
91 struct __cpc {
92 	cpc_set_t		*cpc_sets;	/* List of existing sets */
93 	cpc_buf_t		*cpc_bufs;	/* List of existing bufs */
94 	cpc_errhndlr_t		*cpc_errfn;	/* Handles library errors */
95 	mutex_t			cpc_lock;	/* Protect various ops */
96 	char			*cpc_attrlist;	/* List of supported attrs */
97 	char			**cpc_evlist;	/* List of events per pic */
98 	char			cpc_cpuref[CPC_MAX_CPUREF];
99 	char			cpc_cciname[CPC_MAX_IMPL_NAME];
100 	uint_t			cpc_caps;
101 	uint_t			cpc_npic;
102 };
103 
104 /*
105  * cpc_t handle for CPCv1 clients.
106  */
107 extern cpc_t *__cpc;
108 
109 /*PRINTFLIKE2*/
110 extern void __cpc_error(const char *fn, const char *fmt, ...);
111 
112 extern const char *__cpc_reg_to_name(int cpuver, int regno, uint8_t bits);
113 extern int __cpc_name_to_reg(int cpuver, int regno,
114     const char *name, uint8_t *bits);
115 
116 extern uint_t __cpc_workver;
117 extern int __cpc_v1_cpuver;
118 #ifdef __sparc
119 extern uint64_t __cpc_v1_pcr;
120 #else
121 extern uint32_t __cpc_v1_pes[2];
122 #endif /* __sparc */
123 
124 extern char *__cpc_pack_set(cpc_set_t *set, uint_t flags, size_t *buflen);
125 
126 typedef struct __cpc_strhash cpc_strhash_t;
127 
128 struct __cpc_strhash {
129 	char *str;
130 	struct __cpc_strhash *cur;
131 	struct __cpc_strhash *next;
132 };
133 
134 extern cpc_strhash_t *__cpc_strhash_alloc(void);
135 extern void __cpc_strhash_free(cpc_strhash_t *hash);
136 extern int __cpc_strhash_add(cpc_strhash_t *hash, char *key);
137 extern char *__cpc_strhash_next(cpc_strhash_t *hash);
138 
139 /*
140  * Implementation-private system call used by libcpc
141  */
142 struct __cpc;
143 extern int __pctx_cpc(pctx_t *pctx, struct __cpc *cpc, int cmd, id_t lwpid,
144     void *data1, void *data2, void *data3, int bufsize);
145 
146 #define	CPUDRV				"/devices/pseudo/cpc@0"
147 #define	CPUDRV_SHARED			CPUDRV":shared"
148 
149 #if defined(__sparc) || defined(__i386)
150 /*
151  * These two are only used for backwards compatibility to the Obsolete CPCv1.
152  */
153 extern int __cpc_init(void);
154 extern cpc_set_t *__cpc_eventtoset(cpc_t *cpc, cpc_event_t *event, int flags);
155 
156 /*
157  * ce_cpuver values
158  */
159 #define	CPC_ULTRA1		1000
160 #define	CPC_ULTRA2		1001	/* same as ultra1 for these purposes */
161 #define	CPC_ULTRA3		1002
162 #define	CPC_ULTRA3_PLUS		1003
163 #define	CPC_ULTRA3_I		1004
164 #define	CPC_ULTRA4_PLUS		1005
165 
166 #define	CPC_PENTIUM		2000
167 #define	CPC_PENTIUM_MMX		2001
168 #define	CPC_PENTIUM_PRO		2002
169 #define	CPC_PENTIUM_PRO_MMX	2003
170 
171 #define	CPC_SPARC64_III		3000
172 #define	CPC_SPARC64_V		3002
173 
174 #endif /* __sparc || __i386 */
175 
176 #if defined(__i386) || defined(__amd64)
177 /*
178  * This is common between i386 and amd64, because amd64 implements %tick.
179  * Currently only used by the cpc tools to print the label atop the CPU ticks
180  * column on amd64.
181  */
182 #define	CPC_TICKREG_NAME	"tsc"
183 #endif /* __i386 || __amd64 */
184 
185 #if defined(__sparc)
186 
187 /*
188  * UltraSPARC I, II, III and IV processors
189  *
190  * The performance counters on these processors allow up to two 32-bit
191  * performance events to be captured simultaneously from a selection
192  * of metrics.   The metrics are selected by writing to the performance
193  * control register, and subsequent values collected by reading from the
194  * performance instrumentation counter registers.  Both registers are
195  * priviliged by default, and implemented as ASRs.
196  */
197 
198 struct _cpc_event {
199 	int ce_cpuver;
200 	hrtime_t ce_hrt;	/* gethrtime() */
201 	uint64_t ce_tick;	/* virtualized %tick */
202 	uint64_t ce_pic[2];	/* virtualized %pic */
203 	uint64_t ce_pcr;	/* %pcr */
204 };
205 
206 #define	CPC_TICKREG(ev)		((ev)->ce_tick)
207 #define	CPC_TICKREG_NAME	"%tick"
208 
209 /*
210  * "Well known" bitfields in the UltraSPARC %pcr register
211  * The interfaces in libcpc should make these #defines uninteresting.
212  */
213 #define	CPC_ULTRA_PCR_USR		2
214 #define	CPC_ULTRA_PCR_SYS		1
215 #define	CPC_ULTRA_PCR_PRIVPIC		0
216 
217 #define	CPC_ULTRA_PCR_PIC0_SHIFT	4
218 #define	CPC_ULTRA2_PCR_PIC0_MASK	UINT64_C(0xf)
219 #define	CPC_ULTRA3_PCR_PIC0_MASK	UINT64_C(0x3f)
220 #define	CPC_ULTRA_PCR_PIC1_SHIFT	11
221 #define	CPC_ULTRA2_PCR_PIC1_MASK	UINT64_C(0xf)
222 #define	CPC_ULTRA3_PCR_PIC1_MASK	UINT64_C(0x3f)
223 
224 #elif defined(__i386)
225 
226 /*
227  * Pentium I, II and III processors
228  *
229  * These CPUs allow pairs of events to captured.
230  * The hardware counters count up to 40-bits of significance, but
231  * only allow 32 (signed) bits to be programmed into them.
232  * Pentium I and Pentium II processors are programmed differently, but
233  * the resulting counters and timestamps can be handled portably.
234  */
235 
236 struct _cpc_event {
237 	int ce_cpuver;
238 	hrtime_t ce_hrt;	/* gethrtime() */
239 	uint64_t ce_tsc;	/* virtualized rdtsc value */
240 	uint64_t ce_pic[2];	/* virtualized PerfCtr[01] */
241 	uint32_t ce_pes[2];	/* Pentium II */
242 #define	ce_cesr	ce_pes[0]	/* Pentium I */
243 };
244 
245 #define	CPC_TICKREG(ev)		((ev)->ce_tsc)
246 
247 /*
248  * "Well known" bit fields in the Pentium CES register
249  * The interfaces in libcpc should make these #defines uninteresting.
250  */
251 #define	CPC_P5_CESR_ES0_SHIFT	0
252 #define	CPC_P5_CESR_ES0_MASK	0x3f
253 #define	CPC_P5_CESR_ES1_SHIFT	16
254 #define	CPC_P5_CESR_ES1_MASK	0x3f
255 
256 #define	CPC_P5_CESR_OS0		6
257 #define	CPC_P5_CESR_USR0	7
258 #define	CPC_P5_CESR_CLK0	8
259 #define	CPC_P5_CESR_PC0		9
260 #define	CPC_P5_CESR_OS1		(CPC_P5_CESR_OS0 + 16)
261 #define	CPC_P5_CESR_USR1	(CPC_P5_CESR_USR0 + 16)
262 #define	CPC_P5_CESR_CLK1	(CPC_P5_CESR_CLK0 + 16)
263 #define	CPC_P5_CESR_PC1		(CPC_P5_CESR_PC0 + 16)
264 
265 /*
266  * "Well known" bit fields in the Pentium Pro PerfEvtSel registers
267  * The interfaces in libcpc should make these #defines uninteresting.
268  */
269 #define	CPC_P6_PES_INV		23
270 #define	CPC_P6_PES_EN		22
271 #define	CPC_P6_PES_INT		20
272 #define	CPC_P6_PES_PC		19
273 #define	CPC_P6_PES_E		18
274 #define	CPC_P6_PES_OS		17
275 #define	CPC_P6_PES_USR		16
276 
277 #define	CPC_P6_PES_UMASK_SHIFT	8
278 #define	CPC_P6_PES_UMASK_MASK	(0xffu)
279 
280 #define	CPC_P6_PES_CMASK_SHIFT	24
281 #define	CPC_P6_PES_CMASK_MASK	(0xffu)
282 
283 #define	CPC_P6_PES_PIC0_MASK	(0xffu)
284 #define	CPC_P6_PES_PIC1_MASK	(0xffu)
285 
286 #endif /* __i386 */
287 
288 #ifdef	__cplusplus
289 }
290 #endif
291 
292 #endif	/* _LIBCPC_IMPL_H */
293