Lines Matching refs:ih_p
74 px_ih_t *ih_p; in px_spurintr() local
105 for (i = 0, ih_p = ipil_p->ipil_ih_start; in px_spurintr()
106 i < ipil_p->ipil_ih_size; i++, ih_p = ih_p->ih_next) in px_spurintr()
107 cmn_err(CE_CONT, "!%s-%d#%x ", NAMEINST(ih_p->ih_dip), in px_spurintr()
108 ih_p->ih_inum); in px_spurintr()
149 px_ih_t *ih_p = ipil_p->ipil_ih_start; in px_intx_intr() local
159 for (i = 0; i < ipil_p->ipil_ih_size; i++, ih_p = ih_p->ih_next) { in px_intx_intr()
160 dev_info_t *dip = ih_p->ih_dip; in px_intx_intr()
161 uint_t (*handler)() = ih_p->ih_handler; in px_intx_intr()
162 caddr_t arg1 = ih_p->ih_handler_arg1; in px_intx_intr()
163 caddr_t arg2 = ih_p->ih_handler_arg2; in px_intx_intr()
165 if (ih_p->ih_intr_state == PX_INTR_STATE_DISABLE) { in px_intx_intr()
190 atomic_add_64(&ih_p->ih_ticks, intr_get_time()); in px_intx_intr()
259 px_ih_t *ih_p; in px_msiq_intr() local
349 for (j = 0, ih_p = ipil_p->ipil_ih_start; in px_msiq_intr()
350 ih_p && (j < ipil_p->ipil_ih_size) && in px_msiq_intr()
351 ((ih_p->ih_msg_code != msg_code) || in px_msiq_intr()
352 (ih_p->ih_rec_type != rec_type)); in px_msiq_intr()
353 ih_p = ih_p->ih_next, j++) in px_msiq_intr()
356 if ((ih_p->ih_msg_code == msg_code) && in px_msiq_intr()
357 (ih_p->ih_rec_type == rec_type)) { in px_msiq_intr()
358 dev_info_t *ih_dip = ih_p->ih_dip; in px_msiq_intr()
359 uint_t (*handler)() = ih_p->ih_handler; in px_msiq_intr()
360 caddr_t arg1 = ih_p->ih_handler_arg1; in px_msiq_intr()
361 caddr_t arg2 = ih_p->ih_handler_arg2; in px_msiq_intr()
370 ih_p->ih_intr_flags = PX_INTR_PENDING; in px_msiq_intr()
399 atomic_add_64(&ih_p->ih_ticks, intr_get_time()); in px_msiq_intr()
405 ih_p->ih_intr_flags = PX_INTR_IDLE; in px_msiq_intr()
847 px_ih_t *ih_p = ksp->ks_private; in px_ks_update() local
849 px_ino_pil_t *ipil_p = ih_p->ih_ipil_p; in px_ks_update()
863 "%s%d", ddi_driver_name(ih_p->ih_dip), in px_ks_update()
864 ddi_get_instance(ih_p->ih_dip)); in px_ks_update()
866 (void) ddi_pathname(ih_p->ih_dip, ih_devpath); in px_ks_update()
871 if (ih_p->ih_intr_state == PX_INTR_STATE_ENABLE) { in px_ks_update()
873 switch (i_ddi_intr_get_current_type(ih_p->ih_dip)) { in px_ks_update()
890 pxintr_ks_template.pxintr_ks_time.value.ui64 = ih_p->ih_nsec + in px_ks_update()
891 (uint64_t)tick2ns((hrtime_t)ih_p->ih_ticks, in px_ks_update()
908 px_create_intr_kstats(px_ih_t *ih_p) in px_create_intr_kstats() argument
910 msiq_rec_type_t rec_type = ih_p->ih_rec_type; in px_create_intr_kstats()
912 ASSERT(ih_p->ih_ksp == NULL); in px_create_intr_kstats()
919 ih_p->ih_ksp = kstat_create("pci_intrs", in px_create_intr_kstats()
925 if (ih_p->ih_ksp != NULL) { in px_create_intr_kstats()
926 ih_p->ih_ksp->ks_data_size += MAXPATHLEN * 2; in px_create_intr_kstats()
927 ih_p->ih_ksp->ks_lock = &pxintr_ks_template_lock; in px_create_intr_kstats()
928 ih_p->ih_ksp->ks_data = &pxintr_ks_template; in px_create_intr_kstats()
929 ih_p->ih_ksp->ks_private = ih_p; in px_create_intr_kstats()
930 ih_p->ih_ksp->ks_update = px_ks_update; in px_create_intr_kstats()
947 px_ih_t *ih_p; in px_add_intx_intr() local
961 ih_p = px_ib_alloc_ih(rdip, hdlp->ih_inum, in px_add_intx_intr()
986 ih_p)) != DDI_SUCCESS) in px_add_intx_intr()
1018 ipil_p = px_ib_new_ino_pil(ib_p, ino, hdlp->ih_pri, ih_p); in px_add_intx_intr()
1036 DDI_INTR_ASSIGN_HDLR_N_ARGS(hdlp, ih_p->ih_handler, in px_add_intx_intr()
1037 ih_p->ih_handler_arg1, ih_p->ih_handler_arg2); in px_add_intx_intr()
1064 ih_p->ih_ipil_p = ipil_p; in px_add_intx_intr()
1065 px_create_intr_kstats(ih_p); in px_add_intx_intr()
1066 if (ih_p->ih_ksp) in px_add_intx_intr()
1067 kstat_install(ih_p->ih_ksp); in px_add_intx_intr()
1077 if (ih_p->ih_config_handle) in px_add_intx_intr()
1078 pci_config_teardown(&ih_p->ih_config_handle); in px_add_intx_intr()
1081 kmem_free(ih_p, sizeof (px_ih_t)); in px_add_intx_intr()
1105 px_ih_t *ih_p; in px_rem_intx_intr() local
1117 ih_p = px_ib_intr_locate_ih(ipil_p, rdip, hdlp->ih_inum, 0, 0); in px_rem_intx_intr()
1124 if ((ret = px_ib_ino_rem_intr(px_p, ipil_p, ih_p)) != DDI_SUCCESS) in px_rem_intx_intr()
1162 px_ih_t *ih_p; in px_add_msiq_intr() local
1173 ih_p = px_ib_alloc_ih(rdip, hdlp->ih_inum, hdlp->ih_cb_func, in px_add_msiq_intr()
1211 ih_p)) != DDI_SUCCESS) in px_add_msiq_intr()
1217 ipil_p = px_ib_new_ino_pil(ib_p, ino, hdlp->ih_pri, ih_p); in px_add_msiq_intr()
1238 DDI_INTR_ASSIGN_HDLR_N_ARGS(hdlp, ih_p->ih_handler, in px_add_msiq_intr()
1239 ih_p->ih_handler_arg1, ih_p->ih_handler_arg2); in px_add_msiq_intr()
1267 ih_p->ih_ipil_p = ipil_p; in px_add_msiq_intr()
1268 px_create_intr_kstats(ih_p); in px_add_msiq_intr()
1269 if (ih_p->ih_ksp) in px_add_msiq_intr()
1270 kstat_install(ih_p->ih_ksp); in px_add_msiq_intr()
1282 if (ih_p->ih_config_handle) in px_add_msiq_intr()
1283 pci_config_teardown(&ih_p->ih_config_handle); in px_add_msiq_intr()
1286 kmem_free(ih_p, sizeof (px_ih_t)); in px_add_msiq_intr()
1310 px_ih_t *ih_p; in px_rem_msiq_intr() local
1320 ih_p = px_ib_intr_locate_ih(ipil_p, rdip, hdlp->ih_inum, rec_type, in px_rem_msiq_intr()
1328 if ((ret = px_ib_ino_rem_intr(px_p, ipil_p, ih_p)) != DDI_SUCCESS) in px_rem_msiq_intr()