Lines Matching refs:dip
50 static int px_attach(dev_info_t *dip, ddi_attach_cmd_t cmd);
51 static int px_detach(dev_info_t *dip, ddi_detach_cmd_t cmd);
54 static int px_info(dev_info_t *dip, ddi_info_cmd_t infocmd,
57 static int px_pwr_setup(dev_info_t *dip);
58 static void px_pwr_teardown(dev_info_t *dip);
189 px_info(dev_info_t *dip, ddi_info_cmd_t infocmd, void *arg, void **result) in px_info() argument
222 px_attach(dev_info_t *dip, ddi_attach_cmd_t cmd) in px_attach() argument
225 int instance = DIP_TO_INST(dip); in px_attach()
233 DBG(DBG_ATTACH, dip, "DDI_ATTACH\n"); in px_attach()
244 ddi_driver_name(dip), instance); in px_attach()
248 px_p->px_dip = dip; in px_attach()
252 (void) ddi_prop_update_string(DDI_DEV_T_NONE, dip, in px_attach()
256 px_dbg_attach(dip, &px_p->px_dbg_hdl); in px_attach()
257 pcie_rc_init_bus(dip); in px_attach()
263 if (px_get_props(px_p, dip) == DDI_FAILURE) in px_attach()
266 if (px_lib_dev_init(dip, &dev_hdl) != DDI_SUCCESS) in px_attach()
316 if (px_lib_hotplug_init(dip, (void *)®ops) == DDI_SUCCESS) { in px_attach()
317 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); in px_attach()
324 if (pcie_init(dip, (caddr_t)®ops) != DDI_SUCCESS) in px_attach()
327 (void) pcie_hpintr_enable(dip); in px_attach()
329 if (pxtool_init(dip) != DDI_SUCCESS) in px_attach()
337 if (pwr_common_setup(dip) != DDI_SUCCESS) { in px_attach()
338 DBG(DBG_PWR, dip, "pwr_common_setup failed\n"); in px_attach()
339 } else if (px_pwr_setup(dip) != DDI_SUCCESS) { in px_attach()
340 DBG(DBG_PWR, dip, "px_pwr_setup failed \n"); in px_attach()
341 pwr_common_teardown(dip); in px_attach()
353 (void) px_lib_fabric_sync(dip); in px_attach()
355 ddi_report_dev(dip); in px_attach()
363 bus_p = PCIE_DIP2BUS(dip); in px_attach()
364 bus_p->bus_cfgacc_base = px_lib_get_cfgacc_base(dip); in px_attach()
375 pcie_fab_init_bus(dip, PCIE_BUS_ALL); in px_attach()
377 DBG(DBG_ATTACH, dip, "attach success\n"); in px_attach()
381 (void) pcie_hpintr_disable(dip); in px_attach()
382 (void) pcie_uninit(dip); in px_attach()
384 (void) px_lib_hotplug_uninit(dip); in px_attach()
400 if (px_lib_dev_fini(dip) != DDI_SUCCESS) { in px_attach()
401 DBG(DBG_ATTACH, dip, "px_lib_dev_fini failed\n"); in px_attach()
406 pcie_rc_fini_bus(dip); in px_attach()
407 px_dbg_detach(dip, &px_p->px_dbg_hdl); in px_attach()
415 DBG(DBG_ATTACH, dip, "DDI_RESUME\n"); in px_attach()
430 px_lib_resume(dip); in px_attach()
431 (void) pcie_pwr_resume(dip); in px_attach()
438 DBG(DBG_ATTACH, dip, "unsupported attach op\n"); in px_attach()
451 px_detach(dev_info_t *dip, ddi_detach_cmd_t cmd) in px_detach() argument
453 int instance = ddi_get_instance(dip); in px_detach()
455 pcie_bus_t *bus_p = PCIE_DIP2BUS(dip); in px_detach()
462 DBG(DBG_DETACH, dip, "Instance not attached\n"); in px_detach()
470 DBG(DBG_DETACH, dip, "DDI_DETACH\n"); in px_detach()
477 (void) pcie_hpintr_disable(dip); in px_detach()
480 (void) px_lib_hotplug_uninit(dip); in px_detach()
482 if (pcie_uninit(dip) != DDI_SUCCESS) { in px_detach()
488 pcie_fab_fini_bus(dip, PCIE_BUS_ALL); in px_detach()
497 pxtool_uninit(dip); in px_detach()
502 px_pwr_teardown(dip); in px_detach()
503 pwr_common_teardown(dip); in px_detach()
508 if (px_lib_dev_fini(dip) != DDI_SUCCESS) { in px_detach()
509 DBG(DBG_DETACH, dip, "px_lib_dev_fini failed\n"); in px_detach()
517 pcie_rc_fini_bus(dip); in px_detach()
518 px_dbg_detach(dip, &px_p->px_dbg_hdl); in px_detach()
528 if (pcie_pwr_suspend(dip) != DDI_SUCCESS) { in px_detach()
532 if ((ret = px_lib_suspend(dip)) == DDI_SUCCESS) in px_detach()
539 DBG(DBG_DETACH, dip, "unsupported detach op\n"); in px_detach()
588 dev_info_t *dip = px_p->px_dip; in px_cb_attach() local
591 if (px_lib_intr_devino_to_sysino(dip, in px_cb_attach()
595 fault_p->px_fh_dip = dip; in px_cb_attach()
608 px_pwr_setup(dev_info_t *dip) in px_pwr_setup() argument
611 int instance = ddi_get_instance(dip); in px_pwr_setup()
615 ASSERT(PCIE_PMINFO(dip)); in px_pwr_setup()
616 pwr_p = PCIE_NEXUS_PMINFO(dip); in px_pwr_setup()
623 if (!ddi_prop_exists(DDI_DEV_T_NONE, dip, DDI_PROP_DONTPASS, in px_pwr_setup()
625 if (ddi_prop_create(DDI_DEV_T_NONE, dip, DDI_PROP_CANSLEEP, in px_pwr_setup()
627 DBG(DBG_PWR, dip, "can't create kernel ioctl prop\n"); in px_pwr_setup()
643 hdl.ih_dip = dip; in px_pwr_setup()
648 if (px_add_msiq_intr(dip, dip, &hdl, MSG_REC, in px_pwr_setup()
651 DBG(DBG_PWR, dip, "px_pwr_setup: couldn't add " in px_pwr_setup()
655 px_lib_msg_setmsiq(dip, PCIE_PME_ACK_MSG, px_p->px_pm_msiq_id); in px_pwr_setup()
656 px_lib_msg_setvalid(dip, PCIE_PME_ACK_MSG, PCIE_MSG_VALID); in px_pwr_setup()
661 DBG(DBG_PWR, dip, "px_pwr_setup: PME_TO_ACK update interrupt" in px_pwr_setup()
669 px_lib_msg_setvalid(dip, PCIE_PME_ACK_MSG, PCIE_MSG_INVALID); in px_pwr_setup()
670 (void) px_rem_msiq_intr(dip, dip, &hdl, MSG_REC, PCIE_PME_ACK_MSG, in px_pwr_setup()
683 px_pwr_teardown(dev_info_t *dip) in px_pwr_teardown() argument
685 int instance = ddi_get_instance(dip); in px_pwr_teardown()
689 if (PCIE_PMINFO(dip) == NULL || PCIE_NEXUS_PMINFO(dip) == NULL) in px_pwr_teardown()
696 hdl.ih_dip = dip; in px_pwr_teardown()
699 px_lib_msg_setvalid(dip, PCIE_PME_ACK_MSG, PCIE_MSG_INVALID); in px_pwr_teardown()
700 (void) px_rem_msiq_intr(dip, dip, &hdl, MSG_REC, PCIE_PME_ACK_MSG, in px_pwr_teardown()
725 px_map(dev_info_t *dip, dev_info_t *rdip, ddi_map_req_t *mp, in px_map() argument
728 px_t *px_p = DIP_TO_STATE(dip); in px_map()
734 DBG(DBG_MAP, dip, "rdip=%s%d:", in px_map()
747 DBG(DBG_MAP | DBG_CONT, dip, " r#=%x", r_no); in px_map()
763 DBG(DBG_MAP | DBG_CONT, dip, "\n"); in px_map()
782 rval = px_lib_map_vconfig(dip, mp, off, rp, addrp); in px_map()
794 if (rval = px_reloc_reg(dip, rdip, px_p, rp)) in px_map()
809 rval = ddi_map(dip, &p_mapreq, 0, 0, addrp); in px_map()
837 px_dma_setup(dev_info_t *dip, dev_info_t *rdip, ddi_dma_req_t *dmareq, in px_dma_setup() argument
840 px_t *px_p = DIP_TO_STATE(dip); in px_dma_setup()
845 DBG(DBG_DMA_MAP, dip, "mapping - rdip=%s%d type=%s\n", in px_dma_setup()
849 mp = px_dma_lmts2hdl(dip, rdip, mmu_p, dmareq); in px_dma_setup()
889 px_dump_dma_handle(DBG_DMA_MAP, dip, mp); in px_dma_setup()
896 (void) px_dma_freehdl(dip, rdip, (ddi_dma_handle_t)mp); in px_dma_setup()
905 px_dma_allochdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_attr_t *attrp, in px_dma_allochdl() argument
908 px_t *px_p = DIP_TO_STATE(dip); in px_dma_allochdl()
912 DBG(DBG_DMA_ALLOCH, dip, "rdip=%s%d\n", in px_dma_allochdl()
918 mp = px_dma_allocmp(dip, rdip, waitfp, arg); in px_dma_allochdl()
927 DBG(DBG_DMA_ALLOCH, dip, "mp=%p\n", mp); in px_dma_allochdl()
931 px_dma_freehdl(dip, rdip, (ddi_dma_handle_t)mp); in px_dma_allochdl()
945 px_dma_freehdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle) in px_dma_freehdl() argument
947 DBG(DBG_DMA_FREEH, dip, "rdip=%s%d mp=%p\n", in px_dma_freehdl()
952 DBG(DBG_DMA_FREEH, dip, "run handle callback\n"); in px_dma_freehdl()
963 px_dma_bindhdl(dev_info_t *dip, dev_info_t *rdip, in px_dma_bindhdl() argument
967 px_t *px_p = DIP_TO_STATE(dip); in px_dma_bindhdl()
972 DBG(DBG_DMA_BINDH, dip, "rdip=%s%d mp=%p dmareq=%p\n", in px_dma_bindhdl()
1023 DBG(DBG_DMA_BINDH, dip, "cookie %" PRIx64 "+%x\n", in px_dma_bindhdl()
1025 px_dump_dma_handle(DBG_DMA_MAP, dip, mp); in px_dma_bindhdl()
1045 px_dma_unbindhdl(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle) in px_dma_unbindhdl() argument
1048 px_t *px_p = DIP_TO_STATE(dip); in px_dma_unbindhdl()
1051 DBG(DBG_DMA_UNBINDH, dip, "rdip=%s%d, mp=%p\n", in px_dma_unbindhdl()
1054 DBG(DBG_DMA_UNBINDH, dip, "handle not inuse\n"); in px_dma_unbindhdl()
1080 DBG(DBG_DMA_UNBINDH, dip, "run dvma callback\n"); in px_dma_unbindhdl()
1084 DBG(DBG_DMA_UNBINDH, dip, "run handle callback\n"); in px_dma_unbindhdl()
1098 px_dma_win(dev_info_t *dip, dev_info_t *rdip, in px_dma_win() argument
1105 DBG(DBG_DMA_WIN, dip, "rdip=%s%d\n", in px_dma_win()
1108 px_dump_dma_handle(DBG_DMA_WIN, dip, mp); in px_dma_win()
1110 DBG(DBG_DMA_WIN, dip, "%x out of range\n", win); in px_dma_win()
1117 px_t *px_p = DIP_TO_STATE(dip); in px_dma_win()
1162 DBG(DBG_DMA_WIN, dip, in px_dma_win()
1202 px_dma_ctlops(dev_info_t *dip, dev_info_t *rdip, ddi_dma_handle_t handle, in px_dma_ctlops() argument
1209 DBG(DBG_DMA_CTL, dip, "%s: rdip=%s%d\n", px_dmactl_str[cmd], in px_dma_ctlops()
1215 (void) px_dma_unbindhdl(dip, rdip, handle); in px_dma_ctlops()
1216 (void) px_dma_freehdl(dip, rdip, handle); in px_dma_ctlops()
1219 px_t *px_p = DIP_TO_STATE(dip); in px_dma_ctlops()
1220 return (px_fdvma_reserve(dip, rdip, px_p, in px_dma_ctlops()
1224 px_t *px_p = DIP_TO_STATE(dip); in px_dma_ctlops()
1225 return (px_fdvma_release(dip, px_p, mp)); in px_dma_ctlops()
1233 return (px_dvma_ctl(dip, rdip, mp, cmd, offp, lenp, objp, in px_dma_ctlops()
1237 return (px_dma_ctl(dip, rdip, mp, cmd, offp, lenp, objp, in px_dma_ctlops()
1265 px_ctlops(dev_info_t *dip, dev_info_t *rdip, in px_ctlops() argument
1268 px_t *px_p = DIP_TO_STATE(dip); in px_ctlops()
1280 if (!pcie_is_child(dip, rdip)) in px_ctlops()
1287 DBG(DBG_PWR, dip, "PRE_ATTACH for %s@%d\n", in px_ctlops()
1290 return (pcie_pm_hold(dip)); in px_ctlops()
1293 DBG(DBG_PWR, dip, "PRE_RESUME for %s@%d\n", in px_ctlops()
1302 DBG(DBG_PWR, dip, "POST_ATTACH for %s@%d\n", in px_ctlops()
1313 return (pcie_pm_remove_child(dip, rdip)); in px_ctlops()
1328 if (!pcie_is_child(dip, rdip)) in px_ctlops()
1336 DBG(DBG_PWR, dip, "POST_DETACH for %s@%d\n", in px_ctlops()
1339 return (pcie_pm_remove_child(dip, rdip)); in px_ctlops()
1351 if (ddi_get_parent(rdip) == dip) in px_ctlops()
1373 return (px_lib_ctlops_poke(dip, rdip, in px_ctlops()
1377 return (px_lib_ctlops_peek(dip, rdip, in px_ctlops()
1388 DBG(DBG_CTLOPS, dip, "passing request to parent: rdip=%s%d\n", in px_ctlops()
1390 return (ddi_ctlops(dip, rdip, op, arg, result)); in px_ctlops()
1395 px_intr_ops(dev_info_t *dip, dev_info_t *rdip, ddi_intr_op_t intr_op, in px_intr_ops() argument
1399 px_t *px_p = DIP_TO_STATE(dip); in px_intr_ops()
1401 DBG(DBG_INTROPS, dip, "px_intr_ops: rdip=%s%d\n", in px_intr_ops()
1431 ret = px_intx_ops(dip, rdip, intr_op, hdlp, result); in px_intr_ops()
1435 ret = px_msix_ops(dip, rdip, intr_op, hdlp, result); in px_intr_ops()
1448 dev_info_t *dip; in px_set_mps() local
1452 dip = px_p->px_dip; in px_set_mps()
1453 bus_p = PCIE_DIP2BUS(dip); in px_set_mps()
1457 if (pcie_root_port(dip) == DDI_FAILURE) { in px_set_mps()
1458 if (px_lib_get_root_complex_mps(px_p, dip, in px_set_mps()
1461 DBG(DBG_MPS, dip, "MPS: Can not get RC MPS\n"); in px_set_mps()
1465 DBG(DBG_MPS, dip, "MPS: Root Complex MPS Cap of = %x\n", in px_set_mps()
1471 (void) pcie_get_fabric_mps(dip, ddi_get_child(dip), in px_set_mps()
1476 (void) px_lib_set_root_complex_mps(px_p, dip, bus_p->bus_mps); in px_set_mps()
1478 DBG(DBG_MPS, dip, "MPS: Root Complex MPS Set to = %x\n", in px_set_mps()