Lines Matching refs:uint32_t
312 uint32_t _val32;
314 uint32_t RQRte:4; /* 3:0 */
315 uint32_t reserved1:4; /* 7:4 */
316 uint32_t RPRte:4; /* 11:8 */
317 uint32_t reserved2:4; /* 15:12 */
318 uint32_t BCRte:4; /* 19:16 */
319 uint32_t reserved3:12; /* 31:20 */
327 uint32_t _val32;
329 uint32_t NodeId:3; /* 2:0 */
330 uint32_t reserved1:1; /* 3:3 */
331 uint32_t NodeCnt:3; /* 6:4 */
332 uint32_t reserved2:1; /* 7:7 */
333 uint32_t SbNode:3; /* 10:8 */
334 uint32_t reserved3:1; /* 11:11 */
335 uint32_t LkNode:3; /* 14:12 */
336 uint32_t reserved4:1; /* 15:15 */
337 uint32_t CpuCnt:4; /* 19:16 */
338 uint32_t reserved:12; /* 31:20 */
349 uint32_t _val32;
351 uint32_t C0Unit:2; /* 1:0 */
352 uint32_t C1Unit:2; /* 3:2 */
353 uint32_t McUnit:2; /* 5:4 */
354 uint32_t HbUnit:2; /* 7:6 */
355 uint32_t SbLink:2; /* 9:8 */
356 uint32_t reserved:22; /* 31:10 */
366 uint32_t _val32;
368 uint32_t RE:1; /* 0:0 - Read Enable */
369 uint32_t WE:1; /* 1:1 - Write Enable */
370 uint32_t reserved1:6; /* 7:2 */
371 uint32_t IntlvEn:3; /* 10:8 - Interleave Enable */
372 uint32_t reserved2:5; /* 15:11 */
373 uint32_t DRAMBasei:16; /* 31:16 - Base Addr 39:24 */
385 uint32_t _val32;
387 uint32_t DstNode:3; /* 2:0 - Destination Node */
388 uint32_t reserved1:5; /* 7:3 */
389 uint32_t IntlvSel:3; /* 10:8 - Interleave Select */
390 uint32_t reserved2:5; /* 15:11 */
391 uint32_t DRAMLimiti:16; /* 31:16 - Limit Addr 39:24 */
404 uint32_t _val32;
406 uint32_t DramHoleValid:1; /* 0:0 */
407 uint32_t reserved1:7; /* 7:1 */
408 uint32_t DramHoleOffset:8; /* 15:8 */
409 uint32_t reserved2:8; /* 23:16 */
410 uint32_t DramHoleBase:8; /* 31:24 */
421 uint32_t _val32;
426 uint32_t CSEnable:1; /* 0:0 - CS Bank Enable */
427 uint32_t reserved1:8; /* 8:1 */
428 uint32_t BaseAddrLo:7; /* 15:9 - Base Addr 19:13 */
429 uint32_t reserved2:5; /* 20:16 */
430 uint32_t BaseAddrHi:11; /* 31:21 - Base Addr 35:25 */
436 uint32_t CSEnable:1; /* 0:0 - CS Bank Enable */
437 uint32_t Spare:1; /* 1:1 - Spare Rank */
438 uint32_t TestFail:1; /* 2:2 - Memory Test Failed */
439 uint32_t reserved1:2; /* 4:3 */
440 uint32_t BaseAddrLo:9; /* 13:5 - Base Addr 21:13 */
441 uint32_t reserved2:5; /* 18:14 */
442 uint32_t BaseAddrHi:10; /* 28:19 - Base Addr 36:27 */
443 uint32_t reserved3:3; /* 31:39 */
458 uint32_t _val32;
463 uint32_t reserved1:9; /* 8:0 */
464 uint32_t AddrMaskLo:7; /* 15:9 - Addr Mask 19:13 */
465 uint32_t reserved2:5; /* 20:16 */
466 uint32_t AddrMaskHi:9; /* 29:21 - Addr Mask 33:25 */
467 uint32_t reserved3:2; /* 31:30 */
473 uint32_t reserved1:5; /* 4:0 */
474 uint32_t AddrMaskLo:9; /* 13:5 - Addr Mask 21:13 */
475 uint32_t reserved2:5; /* 18:14 */
476 uint32_t AddrMaskHi:10; /* 28:19 - Addr Mask 36:27 */
477 uint32_t reserved3:3; /* 31:29 */
500 uint32_t _val32;
505 uint32_t cs10:4; /* 3:0 - CS1/0 */
506 uint32_t cs32:4; /* 7:4 - CS3/2 */
507 uint32_t cs54:4; /* 11:8 - CS5/4 */
508 uint32_t cs76:4; /* 15:12 - CS7/6 */
509 uint32_t reserved1:14; /* 29:16 */
510 uint32_t BankSwizzleMode:1; /* 30:30 */
511 uint32_t reserved2:1; /* 31:31 */
517 uint32_t cs10:4; /* 3:0 - CS1/0 */
518 uint32_t cs32:4; /* 7:4 - CS3/2 */
519 uint32_t cs54:4; /* 11:8 - CS5/4 */
520 uint32_t cs76:4; /* 15:12 - CS7/6 */
521 uint32_t reserved1:16; /* 31:16 */
527 uint32_t allcsmodes:16; /* 15:0 */
528 uint32_t pad:16; /* 31:16 */
543 uint32_t _val32;
551 uint32_t DLL_Dis:1; /* 0 */
552 uint32_t D_DRV:1; /* 1 */
553 uint32_t QFC_EN:1; /* 2 */
554 uint32_t DisDqsHys:1; /* 3 */
555 uint32_t reserved1:1; /* 4 */
556 uint32_t Burst2Opt:1; /* 5 */
557 uint32_t Mod64BitMux:1; /* 6 */
558 uint32_t ambig1:1; /* 7 */
559 uint32_t DramInit:1; /* 8 */
560 uint32_t DualDimmEn:1; /* 9 */
561 uint32_t DramEnable:1; /* 10 */
562 uint32_t MemClrStatus:1; /* 11 */
563 uint32_t ESR:1; /* 12 */
564 uint32_t SR_S:1; /* 13 */
565 uint32_t RdWrQByp:2; /* 15:14 */
566 uint32_t Width128:1; /* 16 */
567 uint32_t DimmEcEn:1; /* 17 */
568 uint32_t UnBufDimm:1; /* 18 */
569 uint32_t ByteEn32:1; /* 19 */
570 uint32_t x4DIMMs:4; /* 23:20 */
571 uint32_t DisInRcvrs:1; /* 24 */
572 uint32_t BypMax:3; /* 27:25 */
573 uint32_t En2T:1; /* 28 */
574 uint32_t UpperCSMap:1; /* 29 */
575 uint32_t PwrDownCtl:2; /* 31:30 */
581 uint32_t InitDram:1; /* 0 */
582 uint32_t ExitSelfRef:1; /* 1 */
583 uint32_t reserved1:2; /* 3:2 */
584 uint32_t DramTerm:2; /* 5:4 */
585 uint32_t reserved2:1; /* 6 */
586 uint32_t DramDrvWeak:1; /* 7 */
587 uint32_t ParEn:1; /* 8 */
588 uint32_t SelRefRateEn:1; /* 9 */
589 uint32_t BurstLength32:1; /* 10 */
590 uint32_t Width128:1; /* 11 */
591 uint32_t x4DIMMs:4; /* 15:12 */
592 uint32_t UnBuffDimm:1; /* 16 */
593 uint32_t reserved3:2; /* 18:17 */
594 uint32_t DimmEccEn:1; /* 19 */
595 uint32_t reserved4:12; /* 31:20 */
604 uint32_t _val32;
609 uint32_t reserved2:1; /* 0 */
610 uint32_t DisableJitter:1; /* 1 */
611 uint32_t RdWrQByp:2; /* 3:2 */
612 uint32_t Mod64Mux:1; /* 4 */
613 uint32_t DCC_EN:1; /* 5 */
614 uint32_t ILD_lmt:3; /* 8:6 */
615 uint32_t DramEnabled:1; /* 9 */
616 uint32_t PwrSavingsEn:1; /* 10 */
617 uint32_t reserved1:13; /* 23:11 */
618 uint32_t MemClkDis:8; /* 31:24 */
623 uint32_t _val32;
628 uint32_t AsyncLat:4; /* 3:0 */
629 uint32_t reserved1:4; /* 7:4 */
630 uint32_t RdPreamble:4; /* 11:8 */
631 uint32_t reserved2:1; /* 12 */
632 uint32_t MemDQDrvStren:2; /* 14:13 */
633 uint32_t DisableJitter:1; /* 15 */
634 uint32_t ILD_lmt:3; /* 18:16 */
635 uint32_t DCC_EN:1; /* 19 */
636 uint32_t MemClk:3; /* 22:20 */
637 uint32_t reserved3:2; /* 24:23 */
638 uint32_t MCR:1; /* 25 */
639 uint32_t MC0_EN:1; /* 26 */
640 uint32_t MC1_EN:1; /* 27 */
641 uint32_t MC2_EN:1; /* 28 */
642 uint32_t MC3_EN:1; /* 29 */
643 uint32_t reserved4:1; /* 30 */
644 uint32_t OddDivisorCorrect:1; /* 31 */
650 uint32_t MemClkFreq:3; /* 2:0 */
651 uint32_t MemClkFreqVal:1; /* 3 */
652 uint32_t MaxAsyncLat:4; /* 7:4 */
653 uint32_t reserved1:4; /* 11:8 */
654 uint32_t RDqsEn:1; /* 12 */
655 uint32_t reserved2:1; /* 13 */
656 uint32_t DisDramInterface:1; /* 14 */
657 uint32_t PowerDownEn:1; /* 15 */
658 uint32_t PowerDownMode:1; /* 16 */
659 uint32_t FourRankSODimm:1; /* 17 */
660 uint32_t FourRankRDimm:1; /* 18 */
661 uint32_t reserved3:1; /* 19 */
662 uint32_t SlowAccessMode:1; /* 20 */
663 uint32_t reserved4:1; /* 21 */
664 uint32_t BankSwizzleMode:1; /* 22 */
665 uint32_t undocumented1:1; /* 23 */
666 uint32_t DcqBypassMax:4; /* 27:24 */
667 uint32_t FourActWindow:4; /* 31:28 */
676 uint32_t _val32;
678 uint32_t DramScrub:5; /* 4:0 */
679 uint32_t reserved3:3; /* 7:5 */
680 uint32_t L2Scrub:5; /* 12:8 */
681 uint32_t reserved2:3; /* 15:13 */
682 uint32_t DcacheScrub:5; /* 20:16 */
683 uint32_t reserved1:11; /* 31:21 */
688 uint32_t _val32;
690 uint32_t ScrubReDirEn:1; /* 0 */
691 uint32_t reserved:5; /* 5:1 */
692 uint32_t ScrubAddrLo:26; /* 31:6 */
697 uint32_t _val32;
699 uint32_t ScrubAddrHi:8; /* 7:0 */
700 uint32_t reserved:24; /* 31:8 */
709 uint32_t _val32;
714 uint32_t CpuEccErrEn:1; /* 0 */
715 uint32_t CpuRdDatErrEn:1; /* 1 */
716 uint32_t SyncOnUcEccEn:1; /* 2 */
717 uint32_t SyncPktGenDis:1; /* 3 */
718 uint32_t SyncPktPropDis:1; /* 4 */
719 uint32_t IoMstAbortDis:1; /* 5 */
720 uint32_t CpuErrDis:1; /* 6 */
721 uint32_t IoErrDis:1; /* 7 */
722 uint32_t WdogTmrDis:1; /* 8 */
723 uint32_t WdogTmrCntSel:3; /* 11:9 */
724 uint32_t WdogTmrBaseSel:2; /* 13:12 */
725 uint32_t LdtLinkSel:2; /* 15:14 */
726 uint32_t GenCrcErrByte0:1; /* 16 */
727 uint32_t GenCrcErrByte1:1; /* 17 */
728 uint32_t reserved1:2; /* 19:18 */
729 uint32_t SyncOnWdogEn:1; /* 20 */
730 uint32_t SyncOnAnyErrEn:1; /* 21 */
731 uint32_t EccEn:1; /* 22 */
732 uint32_t ChipKillEccEn:1; /* 23 */
733 uint32_t IoRdDatErrEn:1; /* 24 */
734 uint32_t DisPciCfgCpuErrRsp:1; /* 25 */
735 uint32_t reserved2:1; /* 26 */
736 uint32_t NbMcaToMstCpuEn:1; /* 27 */
737 uint32_t reserved3:4; /* 31:28 */
743 uint32_t CpuEccErrEn:1; /* 0 */
744 uint32_t CpuRdDatErrEn:1; /* 1 */
745 uint32_t SyncOnUcEccEn:1; /* 2 */
746 uint32_t SyncPktGenDis:1; /* 3 */
747 uint32_t SyncPktPropDis:1; /* 4 */
748 uint32_t IoMstAbortDis:1; /* 5 */
749 uint32_t CpuErrDis:1; /* 6 */
750 uint32_t IoErrDis:1; /* 7 */
751 uint32_t WdogTmrDis:1; /* 8 */
752 uint32_t WdogTmrCntSel:3; /* 11:9 */
753 uint32_t WdogTmrBaseSel:2; /* 13:12 */
754 uint32_t LdtLinkSel:2; /* 15:14 */
755 uint32_t GenCrcErrByte0:1; /* 16 */
756 uint32_t GenCrcErrByte1:1; /* 17 */
757 uint32_t reserved1:2; /* 19:18 */
758 uint32_t SyncOnWdogEn:1; /* 20 */
759 uint32_t SyncOnAnyErrEn:1; /* 21 */
760 uint32_t EccEn:1; /* 22 */
761 uint32_t ChipKillEccEn:1; /* 23 */
762 uint32_t IoRdDatErrEn:1; /* 24 */
763 uint32_t DisPciCfgCpuErrRsp:1; /* 25 */
764 uint32_t reserved2:1; /* 26 */
765 uint32_t NbMcaToMstCpuEn:1; /* 27 */
766 uint32_t DisTgtAbtCpuErrRsp:1; /* 28 */
767 uint32_t DisMstAbtCpuErrRsp:1; /* 29 */
768 uint32_t SyncOnDramAdrParErrEn:1; /* 30 */
769 uint32_t reserved3:1; /* 31 */
779 uint32_t _val32;
784 uint32_t SwapEn:1; /* 0 */
785 uint32_t SwapDone:1; /* 1 */
786 uint32_t reserved1:2; /* 3:2 */
787 uint32_t BadDramCs:3; /* 6:4 */
788 uint32_t reserved2:5; /* 11:7 */
789 uint32_t SwapDoneInt:2; /* 13:12 */
790 uint32_t EccErrInt:2; /* 15:14 */
791 uint32_t EccErrCntDramCs:3; /* 18:16 */
792 uint32_t reserved3:1; /* 19 */
793 uint32_t EccErrCntDramChan:1; /* 20 */
794 uint32_t reserved4:2; /* 22:21 */
795 uint32_t EccErrCntWrEn:1; /* 23 */
796 uint32_t EccErrCnt:4; /* 27:24 */
797 uint32_t reserved5:4; /* 31:28 */
803 uint32_t SwapEn0:1; /* 0 */
804 uint32_t SwapDone0:1; /* 1 */
805 uint32_t SwapEn1:1; /* 2 */
806 uint32_t SwapDone1:1; /* 3 */
807 uint32_t BadDramCs0:3; /* 6:4 */
808 uint32_t reserved1:1; /* 7 */
809 uint32_t BadDramCs1:3; /* 10:8 */
810 uint32_t reserved2:1; /* 11 */
811 uint32_t SwapDoneInt:2; /* 13:12 */
812 uint32_t EccErrInt:2; /* 15:14 */
813 uint32_t EccErrCntDramCs:4; /* 19:16 */
814 uint32_t EccErrCntDramChan:2; /* 21:20 */
815 uint32_t reserved4:1; /* 22 */
816 uint32_t EccErrCntWrEn:1; /* 23 */
817 uint32_t EccErrCnt:4; /* 27:24 */
818 uint32_t LvtOffset:4; /* 31:28 */
858 uint32_t _reserved; /* 31:0 */
864 uint32_t _ErrCount:12; /* 43:32 */
865 uint32_t _reserved1:4; /* 47:44 */
866 uint32_t _Ovrflw:1; /* 48 */
867 uint32_t _IntType:2; /* 50:49 */
868 uint32_t _CntEn:1; /* 51 */
869 uint32_t _LvtOff:4; /* 55:52 */
870 uint32_t _reserved2:5; /* 60:56 */
871 uint32_t _Locked:1; /* 61 */
872 uint32_t _CntP:1; /* 62 */
873 uint32_t _Valid:1; /* 63 */
884 uint32_t _reserved:24; /* 23:0 */
885 uint32_t _BlkPtr:8; /* 31:24 */
891 uint32_t _ErrCnt:12; /* 43:32 */
892 uint32_t _reserved1:4; /* 47:44 */
893 uint32_t _Ovrflw:1; /* 48 */
894 uint32_t _IntType:2; /* 50:49 */
895 uint32_t _CntEn:1; /* 51 */
896 uint32_t _LvtOff:4; /* 55:52 */
897 uint32_t _reserved2:5; /* 60:56 */
898 uint32_t _Locked:1; /* 61 */
899 uint32_t _CntP:1; /* 62 */
900 uint32_t _Valid:1; /* 63 */