Lines Matching refs:uint32_t
89 uint32_t in_param0;
90 uint32_t in_param1;
91 uint32_t input_modifier;
92 uint32_t out_param0;
93 uint32_t out_param1;
94 uint32_t token;
95 uint32_t cmd;
120 uint32_t rsrv0[4];
121 uint32_t log_max_ee :5;
122 uint32_t :3;
123 uint32_t log_rsvd_ee :4;
124 uint32_t :4;
125 uint32_t log_max_srq :5;
126 uint32_t :7;
127 uint32_t log_rsvd_srq :4;
128 uint32_t log_max_qp :5;
129 uint32_t :3;
130 uint32_t log_rsvd_qp :4;
131 uint32_t :4;
132 uint32_t log_max_qp_sz :8;
133 uint32_t log_max_srq_sz :8;
134 uint32_t log_max_eq :3;
135 uint32_t :5;
136 uint32_t num_rsvd_eq :4;
137 uint32_t :4;
138 uint32_t log_max_mpt :6;
139 uint32_t :10;
140 uint32_t log_max_cq :5;
141 uint32_t :3;
142 uint32_t log_rsvd_cq :4;
143 uint32_t :4;
144 uint32_t log_max_cq_sz :8;
145 uint32_t :8;
146 uint32_t log_max_av :6;
147 uint32_t :26;
148 uint32_t log_max_mttseg :6;
149 uint32_t :2;
150 uint32_t log_rsvd_mpt :4;
151 uint32_t :4;
152 uint32_t log_max_mrw_sz :8;
153 uint32_t :4;
154 uint32_t log_rsvd_mttseg :4;
155 uint32_t log_max_ra_glob :6;
156 uint32_t :26;
157 uint32_t log_max_ras_qp :6;
158 uint32_t :10;
159 uint32_t log_max_raq_qp :6;
160 uint32_t :10;
161 uint32_t num_ports :4;
162 uint32_t max_vl :4;
163 uint32_t max_port_width :4;
164 uint32_t max_mtu :4;
165 uint32_t ca_ack_delay :5;
166 uint32_t :11;
167 uint32_t :32;
168 uint32_t log_max_pkey :4;
169 uint32_t :12;
170 uint32_t stat_rate_sup :16;
171 uint32_t log_max_gid :4;
172 uint32_t :28;
173 uint32_t rc :1;
174 uint32_t uc :1;
175 uint32_t ud :1;
176 uint32_t rd :1;
177 uint32_t raw_ipv6 :1;
178 uint32_t raw_ether :1;
179 uint32_t srq :1;
180 uint32_t :1;
181 uint32_t pkey_v :1;
182 uint32_t qkey_v :1;
183 uint32_t :6;
184 uint32_t mem_win :1;
185 uint32_t apm :1;
186 uint32_t atomic :1;
187 uint32_t raw_multi :1;
188 uint32_t avp :1;
189 uint32_t ud_multi :1;
190 uint32_t :2;
191 uint32_t pg_on_demand :1;
192 uint32_t router :1;
193 uint32_t :6;
194 uint32_t :32;
195 uint32_t :32;
196 uint32_t log_pg_sz :8;
197 uint32_t :8;
198 uint32_t log_max_uar_sz :6;
199 uint32_t :6;
200 uint32_t num_rsvd_uar :4;
201 uint32_t :32;
202 uint32_t max_desc_sz :16;
203 uint32_t max_sg :8;
204 uint32_t :8;
205 uint32_t rsrv1[2];
206 uint32_t log_max_rdd :6;
207 uint32_t :6;
208 uint32_t num_rsvd_rdd :4;
209 uint32_t log_max_pd :6;
210 uint32_t :6;
211 uint32_t num_rsvd_pd :4;
212 uint32_t log_max_mcg :8;
213 uint32_t num_rsvd_mcg :4;
214 uint32_t :4;
215 uint32_t log_max_qp_mcg :8;
216 uint32_t :8;
217 uint32_t rsrv2[6];
218 uint32_t eqpc_entry_sz :16;
219 uint32_t eeec_entry_sz :16;
220 uint32_t qpc_entry_sz :16;
221 uint32_t eec_entry_sz :16;
222 uint32_t uarscr_entry_sz :16;
223 uint32_t srq_entry_sz :16;
224 uint32_t cqc_entry_sz :16;
225 uint32_t eqc_entry_sz :16;
226 uint32_t rsrv3[28];
230 uint32_t rsrv0[4];
231 uint32_t log_max_srq_sz :8;
232 uint32_t log_max_qp_sz :8;
233 uint32_t :4;
234 uint32_t log_rsvd_qp :4;
235 uint32_t :3;
236 uint32_t log_max_qp :5;
237 uint32_t log_rsvd_srq :4;
238 uint32_t :7;
239 uint32_t log_max_srq :5;
240 uint32_t :4;
241 uint32_t log_rsvd_ee :4;
242 uint32_t :3;
243 uint32_t log_max_ee :5;
244 uint32_t :8;
245 uint32_t log_max_cq_sz :8;
246 uint32_t :4;
247 uint32_t log_rsvd_cq :4;
248 uint32_t :3;
249 uint32_t log_max_cq :5;
250 uint32_t :10;
251 uint32_t log_max_mpt :6;
252 uint32_t :4;
253 uint32_t num_rsvd_eq :4;
254 uint32_t :5;
255 uint32_t log_max_eq :3;
256 uint32_t log_rsvd_mttseg :4;
257 uint32_t :4;
258 uint32_t log_max_mrw_sz :8;
259 uint32_t :4;
260 uint32_t log_rsvd_mpt :4;
261 uint32_t :2;
262 uint32_t log_max_mttseg :6;
263 uint32_t :26;
264 uint32_t log_max_av :6;
265 uint32_t :10;
266 uint32_t log_max_raq_qp :6;
267 uint32_t :10;
268 uint32_t log_max_ras_qp :6;
269 uint32_t :26;
270 uint32_t log_max_ra_glob :6;
271 uint32_t :32;
272 uint32_t :11;
273 uint32_t ca_ack_delay :5;
274 uint32_t max_mtu :4;
275 uint32_t max_port_width :4;
276 uint32_t max_vl :4;
277 uint32_t num_ports :4;
278 uint32_t :28;
279 uint32_t log_max_gid :4;
280 uint32_t stat_rate_sup :16;
281 uint32_t :12;
282 uint32_t log_max_pkey :4;
283 uint32_t :32;
284 uint32_t :6;
285 uint32_t router :1;
286 uint32_t pg_on_demand :1;
287 uint32_t :2;
288 uint32_t ud_multi :1;
289 uint32_t avp :1;
290 uint32_t raw_multi :1;
291 uint32_t atomic :1;
292 uint32_t apm :1;
293 uint32_t mem_win :1;
294 uint32_t :6;
295 uint32_t qkey_v :1;
296 uint32_t pkey_v :1;
297 uint32_t :1;
298 uint32_t srq :1;
299 uint32_t raw_ether :1;
300 uint32_t raw_ipv6 :1;
301 uint32_t rd :1;
302 uint32_t ud :1;
303 uint32_t uc :1;
304 uint32_t rc :1;
305 uint32_t num_rsvd_uar :4;
306 uint32_t :6;
307 uint32_t log_max_uar_sz :6;
308 uint32_t :8;
309 uint32_t log_pg_sz :8;
310 uint32_t :32;
311 uint32_t :8;
312 uint32_t max_sg :8;
313 uint32_t max_desc_sz :16;
314 uint32_t :32;
315 uint32_t rsrv1[2];
316 uint32_t :8;
317 uint32_t log_max_qp_mcg :8;
318 uint32_t :4;
319 uint32_t num_rsvd_mcg :4;
320 uint32_t log_max_mcg :8;
321 uint32_t num_rsvd_pd :4;
322 uint32_t :6;
323 uint32_t log_max_pd :6;
324 uint32_t num_rsvd_rdd :4;
325 uint32_t :6;
326 uint32_t log_max_rdd :6;
327 uint32_t rsrv2[6];
328 uint32_t eec_entry_sz :16;
329 uint32_t qpc_entry_sz :16;
330 uint32_t eeec_entry_sz :16;
331 uint32_t eqpc_entry_sz :16;
332 uint32_t eqc_entry_sz :16;
333 uint32_t cqc_entry_sz :16;
334 uint32_t srq_entry_sz :16;
335 uint32_t uarscr_entry_sz :16;
336 uint32_t rsrv3[28];
351 uint32_t fw_rev_minor :16;
352 uint32_t fw_rev_subminor :16;
353 uint32_t fw_rev_major :16;
354 uint32_t :16;
355 uint32_t log_max_cmd :8;
356 uint32_t :23;
357 uint32_t dbg_trace :1;
358 uint32_t cmd_intf_rev :16;
359 uint32_t :16;
360 uint32_t rsrv0[4];
364 uint32_t :32;
365 uint32_t error_buf_sz;
366 uint32_t rsrv1[48];
370 uint32_t :16;
371 uint32_t fw_rev_major :16;
372 uint32_t fw_rev_subminor :16;
373 uint32_t fw_rev_minor :16;
374 uint32_t :16;
375 uint32_t cmd_intf_rev :16;
376 uint32_t dbg_trace :1;
377 uint32_t :23;
378 uint32_t log_max_cmd :8;
379 uint32_t rsrv0[4];
383 uint32_t error_buf_sz;
384 uint32_t rsrv1[49];
410 uint32_t spd :1;
411 uint32_t sladr :3;
412 uint32_t sock_num :2;
413 uint32_t syn :4;
414 uint32_t :22;
415 uint32_t dimmsz :16;
416 uint32_t :8;
417 uint32_t dimmstatus :1;
418 uint32_t dimm_hidden :1;
419 uint32_t write_only :1;
420 uint32_t :5;
421 uint32_t vendor_id_l;
422 uint32_t vendor_id_h;
423 uint32_t dimm_baseaddr_l;
424 uint32_t dimm_baseaddr_h;
425 uint32_t rsrv0[2];
429 uint32_t :5;
430 uint32_t write_only :1;
431 uint32_t dimm_hidden :1;
432 uint32_t dimmstatus :1;
433 uint32_t :8;
434 uint32_t dimmsz :16;
435 uint32_t :22;
436 uint32_t syn :4;
437 uint32_t sock_num :2;
438 uint32_t sladr :3;
439 uint32_t spd :1;
440 uint32_t vendor_id_h;
441 uint32_t vendor_id_l;
442 uint32_t dimm_baseaddr_h;
443 uint32_t dimm_baseaddr_l;
444 uint32_t rsrv0[2];
463 uint32_t :32;
464 uint32_t data_integrity :2;
465 uint32_t auto_precharge :2;
466 uint32_t ddr_hidden :1;
467 uint32_t :27;
468 uint32_t rsrv0[10];
470 uint32_t rsrv1[16];
476 uint32_t :27;
477 uint32_t ddr_hidden :1;
478 uint32_t auto_precharge :2;
479 uint32_t data_integrity :2;
480 uint32_t :32;
481 uint32_t rsrv0[10];
483 uint32_t rsrv1[16];
506 uint32_t device_id;
507 uint32_t vendor_id;
508 uint32_t :32;
509 uint32_t rev_id;
510 uint32_t :32;
511 uint32_t :24;
512 uint32_t inta_pin :8;
513 uint32_t rsrv0[58];
517 uint32_t vendor_id;
518 uint32_t device_id;
519 uint32_t rev_id;
520 uint32_t :32;
521 uint32_t inta_pin :8;
522 uint32_t :24;
523 uint32_t :32;
524 uint32_t rsrv0[58];
551 uint32_t rsrv0[4];
552 uint32_t log_num_qp :5;
553 uint32_t :2;
554 uint32_t qpc_baseaddr_l :25;
555 uint32_t qpc_baseaddr_h;
556 uint32_t rsrv1[2];
557 uint32_t log_num_ee :5;
558 uint32_t :2;
559 uint32_t eec_baseaddr_l :25;
560 uint32_t eec_baseaddr_h;
561 uint32_t log_num_srq :5;
562 uint32_t srqc_baseaddr_l :27;
563 uint32_t srqc_baseaddr_h;
564 uint32_t log_num_cq :5;
565 uint32_t :1;
566 uint32_t cqc_baseaddr_l :26;
567 uint32_t cqc_baseaddr_h;
568 uint32_t rsrv2[2];
570 uint32_t rsrv3[2];
572 uint32_t rsrv4[2];
573 uint32_t log_num_eq :4;
574 uint32_t :2;
575 uint32_t eqc_baseaddr_l :26;
576 uint32_t eqc_baseaddr_h;
577 uint32_t rsrv5[2];
578 uint32_t rdb_baseaddr_l;
579 uint32_t rdb_baseaddr_h;
580 uint32_t rsrv6[2];
584 uint32_t rsrv0[4];
585 uint32_t qpc_baseaddr_h;
586 uint32_t qpc_baseaddr_l :25;
587 uint32_t :2;
588 uint32_t log_num_qp :5;
589 uint32_t rsrv1[2];
590 uint32_t eec_baseaddr_h;
591 uint32_t eec_baseaddr_l :25;
592 uint32_t :2;
593 uint32_t log_num_ee :5;
594 uint32_t srqc_baseaddr_h;
595 uint32_t srqc_baseaddr_l :27;
596 uint32_t log_num_srq :5;
597 uint32_t cqc_baseaddr_h;
598 uint32_t cqc_baseaddr_l :26;
599 uint32_t :1;
600 uint32_t log_num_cq :5;
601 uint32_t rsrv2[2];
603 uint32_t rsrv3[2];
605 uint32_t rsrv4[2];
606 uint32_t eqc_baseaddr_h;
607 uint32_t eqc_baseaddr_l :26;
608 uint32_t :2;
609 uint32_t log_num_eq :4;
610 uint32_t rsrv5[2];
611 uint32_t rdb_baseaddr_h;
612 uint32_t rdb_baseaddr_l;
613 uint32_t rsrv6[2];
619 uint32_t udav_pd :24;
620 uint32_t :5;
621 uint32_t udav_xlat_en :1;
622 uint32_t :2;
623 uint32_t udav_lkey;
627 uint32_t udav_lkey;
628 uint32_t :2;
629 uint32_t udav_xlat_en :1;
630 uint32_t :5;
631 uint32_t udav_pd :24;
638 uint32_t rsrv0[2];
639 uint32_t mc_tbl_hash_sz :17;
640 uint32_t :15;
641 uint32_t log_mc_tbl_ent :16;
642 uint32_t :16;
643 uint32_t :32;
644 uint32_t log_mc_tbl_sz :5;
645 uint32_t :19;
646 uint32_t mc_hash_fn :3;
647 uint32_t :5;
652 uint32_t rsrv0[2];
653 uint32_t :16;
654 uint32_t log_mc_tbl_ent :16;
655 uint32_t :15;
656 uint32_t mc_tbl_hash_sz :17;
657 uint32_t :5;
658 uint32_t mc_hash_fn :3;
659 uint32_t :19;
660 uint32_t log_mc_tbl_sz :5;
661 uint32_t :32;
669 uint32_t mtt_version :8;
670 uint32_t :24;
671 uint32_t log_mpt_sz :6;
672 uint32_t :2;
673 uint32_t pgfault_rnr_to :5;
674 uint32_t :3;
675 uint32_t mttseg_sz :3;
676 uint32_t :13;
678 uint32_t rsrv0[2];
683 uint32_t :13;
684 uint32_t mttseg_sz :3;
685 uint32_t :3;
686 uint32_t pgfault_rnr_to :5;
687 uint32_t :2;
688 uint32_t log_mpt_sz :6;
689 uint32_t :24;
690 uint32_t mtt_version :8;
692 uint32_t rsrv0[2];
698 uint32_t :20;
699 uint32_t uar_baseaddr_l :12; /* QUERY_HCA only */
700 uint32_t uar_baseaddr_h; /* QUERY_HCA only */
701 uint32_t :32;
702 uint32_t uar_pg_sz :8;
703 uint32_t :24;
705 uint32_t rsrv0[2];
709 uint32_t uar_baseaddr_h; /* QUERY_HCA only */
710 uint32_t uar_baseaddr_l :12; /* QUERY_HCA only */
711 uint32_t :20;
712 uint32_t :24;
713 uint32_t uar_pg_sz :8;
714 uint32_t :32;
716 uint32_t rsrv0[2];
722 uint32_t rsrv0[2];
723 uint32_t :24;
724 uint32_t hca_core_clock :8; /* QUERY_HCA only */
725 uint32_t :32;
726 uint32_t udav_port_chk :1;
727 uint32_t big_endian :1;
728 uint32_t udav_chk :1;
729 uint32_t :5;
730 uint32_t responder_exu :4;
731 uint32_t :4;
732 uint32_t wqe_quota :15;
733 uint32_t wqe_quota_en :1;
734 uint32_t :8;
735 uint32_t router_qp :16;
736 uint32_t :7;
737 uint32_t router_en :1;
738 uint32_t rsrv1[2];
740 uint32_t rsrv2[4];
742 uint32_t rsrv3[2];
744 uint32_t rsrv4[4];
746 uint32_t rsrv5[4];
748 uint32_t rsrv6[48];
752 uint32_t rsrv0[2];
753 uint32_t :32;
754 uint32_t hca_core_clock :8; /* QUERY_HCA only */
755 uint32_t :24;
756 uint32_t router_en :1;
757 uint32_t :7;
758 uint32_t router_qp :16;
759 uint32_t :8;
760 uint32_t wqe_quota_en :1;
761 uint32_t wqe_quota :15;
762 uint32_t :4;
763 uint32_t responder_exu :4;
764 uint32_t :5;
765 uint32_t udav_chk :1;
766 uint32_t big_endian :1;
767 uint32_t udav_port_chk :1;
768 uint32_t rsrv1[2];
770 uint32_t rsrv2[4];
772 uint32_t rsrv3[2];
774 uint32_t rsrv4[4];
776 uint32_t rsrv5[4];
778 uint32_t rsrv6[48];
798 uint32_t max_gid :16;
799 uint32_t :16;
800 uint32_t :4;
801 uint32_t vl_cap :4;
802 uint32_t port_width_cap :4;
803 uint32_t mtu_cap :4;
804 uint32_t set_port_guid0 :1;
805 uint32_t set_node_guid :1;
806 uint32_t set_sysimg_guid :1;
807 uint32_t :13;
808 uint32_t :32;
809 uint32_t max_pkey :16;
810 uint32_t :16;
814 uint32_t rsrv0[54];
818 uint32_t :13;
819 uint32_t set_sysimg_guid :1;
820 uint32_t set_node_guid :1;
821 uint32_t set_port_guid0 :1;
822 uint32_t mtu_cap :4;
823 uint32_t port_width_cap :4;
824 uint32_t vl_cap :4;
825 uint32_t :4;
826 uint32_t :16;
827 uint32_t max_gid :16;
828 uint32_t :16;
829 uint32_t max_pkey :16;
830 uint32_t :32;
834 uint32_t rsrv0[54];
866 uint32_t page_sz :5;
867 uint32_t :27;
868 uint32_t ver :4;
869 uint32_t :4;
870 uint32_t reg_win :1;
871 uint32_t phys_addr :1;
872 uint32_t lr :1;
873 uint32_t lw :1;
874 uint32_t rr :1;
875 uint32_t rw :1;
876 uint32_t atomic :1;
877 uint32_t en_bind :1;
878 uint32_t :1;
879 uint32_t m_io :1;
880 uint32_t :10;
881 uint32_t status :4;
882 uint32_t pd :24;
883 uint32_t :8;
884 uint32_t mem_key;
887 uint32_t win_cnt;
888 uint32_t lkey;
889 uint32_t mttseg_addr_h;
890 uint32_t win_cnt_limit;
891 uint32_t :32;
892 uint32_t :6;
893 uint32_t mttseg_addr_l :26;
894 uint32_t rsrv0[2];
898 uint32_t status :4;
899 uint32_t :10;
900 uint32_t m_io :1;
901 uint32_t :1;
902 uint32_t en_bind :1;
903 uint32_t atomic :1;
904 uint32_t rw :1;
905 uint32_t rr :1;
906 uint32_t lw :1;
907 uint32_t lr :1;
908 uint32_t phys_addr :1;
909 uint32_t reg_win :1;
910 uint32_t :4;
911 uint32_t ver :4;
912 uint32_t :27;
913 uint32_t page_sz :5;
914 uint32_t mem_key;
915 uint32_t :8;
916 uint32_t pd :24;
919 uint32_t lkey;
920 uint32_t win_cnt;
921 uint32_t win_cnt_limit;
922 uint32_t mttseg_addr_h;
923 uint32_t mttseg_addr_l :26;
924 uint32_t :6;
925 uint32_t :32;
926 uint32_t rsrv0[2];
956 uint32_t present :1;
957 uint32_t :11;
958 uint32_t ptag_l :20;
959 uint32_t ptag_h;
963 uint32_t ptag_h;
964 uint32_t ptag_l :20;
965 uint32_t :11;
966 uint32_t present :1;
999 uint32_t start_addr_h;
1000 uint32_t :8;
1001 uint32_t state :2;
1002 uint32_t :7;
1003 uint32_t overrun_ignore :1;
1004 uint32_t xlat :1;
1005 uint32_t :5;
1006 uint32_t owner :4;
1007 uint32_t status :4;
1008 uint32_t usr_page :24;
1009 uint32_t log_eq_sz :5;
1010 uint32_t :3;
1011 uint32_t start_addr_l;
1012 uint32_t intr :8;
1013 uint32_t :24;
1014 uint32_t pd :24;
1015 uint32_t :8;
1016 uint32_t lkey;
1017 uint32_t lost_cnt;
1018 uint32_t rsrv0[2];
1019 uint32_t prod_indx;
1020 uint32_t cons_indx;
1021 uint32_t rsrv1[4];
1025 uint32_t status :4;
1026 uint32_t owner :4;
1027 uint32_t :5;
1028 uint32_t xlat :1;
1029 uint32_t overrun_ignore :1;
1030 uint32_t :7;
1031 uint32_t state :2;
1032 uint32_t :8;
1033 uint32_t start_addr_h;
1034 uint32_t start_addr_l;
1035 uint32_t :3;
1036 uint32_t log_eq_sz :5;
1037 uint32_t usr_page :24;
1038 uint32_t :8;
1039 uint32_t pd :24;
1040 uint32_t :24;
1041 uint32_t intr :8;
1042 uint32_t lost_cnt;
1043 uint32_t lkey;
1044 uint32_t rsrv0[2];
1045 uint32_t cons_indx;
1046 uint32_t prod_indx;
1047 uint32_t rsrv1[4];
1089 uint32_t :8;
1090 uint32_t cqn :24;
1091 uint32_t rsrv0[5];
1095 uint32_t :8;
1096 uint32_t cqn :24;
1097 uint32_t :32;
1098 uint32_t :24;
1099 uint32_t syndrome :8;
1100 uint32_t rsrv0[3];
1106 uint32_t rsrv0[2];
1107 uint32_t :2;
1108 uint32_t port :2;
1109 uint32_t :28;
1110 uint32_t rsrv1[3];
1116 uint32_t :16;
1117 uint32_t token :16;
1118 uint32_t :32;
1119 uint32_t :24;
1120 uint32_t status :8;
1121 uint32_t out_param0;
1122 uint32_t out_param1;
1123 uint32_t :32;
1127 uint32_t :8;
1128 uint32_t qpn :24;
1129 uint32_t :32;
1130 uint32_t :3;
1131 uint32_t qp_ee :1;
1132 uint32_t :28;
1133 uint32_t rsrv0[3];
1137 uint32_t rsrv0[2];
1138 uint32_t :24;
1139 uint32_t error_type :8;
1140 uint32_t data;
1141 uint32_t rsrv1[2];
1150 uint32_t rsrv0[2];
1151 uint32_t :24;
1152 uint32_t fault_type :4;
1153 uint32_t wqv :1;
1154 uint32_t wqe_data :1;
1155 uint32_t rem_loc :1;
1156 uint32_t snd_rcv :1;
1157 uint32_t vaddr_h;
1158 uint32_t vaddr_l;
1159 uint32_t mem_key;
1175 uint32_t rsrcv0[4];
1176 uint32_t overflow :1;
1177 uint32_t :15;
1178 uint32_t :2;
1179 uint32_t err_ba :2;
1180 uint32_t err_da :2;
1181 uint32_t err_src_id :3;
1182 uint32_t err_rmw :1;
1183 uint32_t :2;
1184 uint32_t cause_msb :1;
1185 uint32_t :2;
1186 uint32_t cause_lsb :1;
1188 uint32_t err_ca :16;
1189 uint32_t err_ra :16;
1193 uint32_t :8;
1194 uint32_t event_type :8;
1195 uint32_t :8;
1196 uint32_t event_subtype :8;
1207 uint32_t :24;
1208 uint32_t owner :1;
1209 uint32_t :7;
1244 &((uint32_t *)(eqe))[0]) & TAVOR_EQE_EVTTYPE_MASK) >> \
1248 &((uint32_t *)(eqe))[0]) & TAVOR_EQE_EVTSUBTYPE_MASK) >> \
1252 &((uint32_t *)(eqe))[1]) & TAVOR_EQE_CQNUM_MASK) >> \
1256 &((uint32_t *)(eqe))[1]) & TAVOR_EQE_QPNUM_MASK) >> \
1260 &((uint32_t *)(eqe))[3]) & TAVOR_EQE_PORTNUM_MASK) >> \
1264 &((uint32_t *)(eqe))[1]) & TAVOR_EQE_CMDTOKEN_MASK) >> \
1268 &((uint32_t *)(eqe))[3]) & TAVOR_EQE_CMDSTATUS_MASK) >> \
1271 (ddi_get32((eq)->eq_eqinfo.qa_acchdl, &((uint32_t *)(eqe))[4]))
1273 (ddi_get32((eq)->eq_eqinfo.qa_acchdl, &((uint32_t *)(eqe))[5]))
1276 &((uint32_t *)(eqe))[3]) & TAVOR_EQE_OPERRTYPE_MASK) >> \
1279 (ddi_get32((eq)->eq_eqinfo.qa_acchdl, &((uint32_t *)(eqe))[4]))
1282 &((uint32_t *)(eqe))[7]) & TAVOR_EQE_OWNER_MASK) >> \
1285 (ddi_put32((eq)->eq_eqinfo.qa_acchdl, &((uint32_t *)(eqe))[7], \
1313 uint32_t start_addr_h;
1314 uint32_t :8;
1315 uint32_t state :4;
1316 uint32_t :5;
1317 uint32_t overrun_ignore :1;
1318 uint32_t xlat :1;
1319 uint32_t :9;
1320 uint32_t status :4;
1321 uint32_t usr_page :24;
1322 uint32_t log_cq_sz :5;
1323 uint32_t :3;
1324 uint32_t start_addr_l;
1325 uint32_t c_eqn :8;
1326 uint32_t :24;
1327 uint32_t e_eqn :8;
1328 uint32_t :24;
1329 uint32_t lkey;
1330 uint32_t pd :24;
1331 uint32_t :8;
1332 uint32_t solicit_prod_indx;
1333 uint32_t last_notified_indx;
1334 uint32_t prod_indx;
1335 uint32_t cons_indx;
1336 uint32_t :32;
1337 uint32_t cqn :24;
1338 uint32_t :8;
1339 uint32_t rsrv0[2];
1343 uint32_t status :4;
1344 uint32_t :9;
1345 uint32_t xlat :1;
1346 uint32_t overrun_ignore :1;
1347 uint32_t :5;
1348 uint32_t state :4;
1349 uint32_t :8;
1350 uint32_t start_addr_h;
1351 uint32_t start_addr_l;
1352 uint32_t :3;
1353 uint32_t log_cq_sz :5;
1354 uint32_t usr_page :24;
1355 uint32_t :24;
1356 uint32_t e_eqn :8;
1357 uint32_t :24;
1358 uint32_t c_eqn :8;
1359 uint32_t :8;
1360 uint32_t pd :24;
1361 uint32_t lkey;
1362 uint32_t last_notified_indx;
1363 uint32_t solicit_prod_indx;
1364 uint32_t cons_indx;
1365 uint32_t prod_indx;
1366 uint32_t :8;
1367 uint32_t cqn :24;
1368 uint32_t :32;
1369 uint32_t rsrv0[2];
1391 uint32_t ver :4;
1392 uint32_t :4;
1393 uint32_t my_qpn :24;
1394 uint32_t :8;
1395 uint32_t my_ee :24;
1396 uint32_t :8;
1397 uint32_t rqpn :24;
1398 uint32_t sl :4;
1399 uint32_t :4;
1400 uint32_t grh :1;
1401 uint32_t ml_path :7;
1402 uint32_t rlid :16;
1403 uint32_t imm_eth_pkey_cred;
1404 uint32_t byte_cnt;
1405 uint32_t wqe_addr :26;
1406 uint32_t wqe_sz :6;
1407 uint32_t opcode :8;
1408 uint32_t send_or_recv :1;
1409 uint32_t :15;
1410 uint32_t owner :1;
1411 uint32_t :7;
1443 &((uint32_t *)(cqe))[0]) & TAVOR_CQE_QPNUM_MASK) >> \
1447 &((uint32_t *)(cqe))[2]) & TAVOR_CQE_DQPN_MASK) >> \
1451 &((uint32_t *)(cqe))[3]) & TAVOR_CQE_SL_MASK) >> \
1455 &((uint32_t *)(cqe))[3]) & TAVOR_CQE_GRH_MASK) >> \
1459 &((uint32_t *)(cqe))[3]) & TAVOR_CQE_PATHBITS_MASK) >> \
1463 &((uint32_t *)(cqe))[3]) & TAVOR_CQE_DLID_MASK) >> \
1466 (ddi_get32((cq)->cq_cqinfo.qa_acchdl, &((uint32_t *)(cqe))[4]))
1468 (ddi_put32((cq)->cq_cqinfo.qa_acchdl, &((uint32_t *)(cqe))[4], \
1471 (ddi_get32((cq)->cq_cqinfo.qa_acchdl, &((uint32_t *)(cqe))[5]))
1473 (ddi_get32((cq)->cq_cqinfo.qa_acchdl, &((uint32_t *)(cqe))[6]))
1475 (ddi_put32((cq)->cq_cqinfo.qa_acchdl, &((uint32_t *)(cqe))[6], \
1479 &((uint32_t *)(cqe))[7]) & TAVOR_CQE_OPCODE_MASK) >> \
1483 &((uint32_t *)(cqe))[7]) & TAVOR_CQE_SENDRECV_MASK) >> \
1487 &((uint32_t *)(cqe))[7]) & TAVOR_CQE_OWNER_MASK) >> \
1493 ((uint32_t *)(cqe))[7] = 0x80000000; \
1496 &((uint32_t *)(cqe))[7], 0x00000080); \
1503 ((uint32_t *)(cqe))[7] = 0x00000080; \
1506 &((uint32_t *)(cqe))[7], 0x00000080); \
1516 uint32_t ds :5;
1517 uint32_t next_wqe_addr_l :27;
1518 uint32_t wqe_addr_h;
1520 uint32_t lkey;
1521 uint32_t pd :24;
1522 uint32_t :4;
1523 uint32_t state :4;
1525 uint32_t wqe_cnt :16;
1526 uint32_t :16;
1527 uint32_t uar :24;
1528 uint32_t :8;
1532 uint32_t wqe_addr_h;
1533 uint32_t next_wqe_addr_l :27;
1534 uint32_t ds :5;
1536 uint32_t state :4;
1537 uint32_t :4;
1538 uint32_t pd :24;
1539 uint32_t lkey;
1541 uint32_t :8;
1542 uint32_t uar :24;
1543 uint32_t :16;
1544 uint32_t wqe_cnt :16;
1553 uint32_t :32;
1554 uint32_t log_max_srq :5;
1555 uint32_t :1;
1556 uint32_t srq :1;
1557 uint32_t srq_m :1;
1558 uint32_t :24;
1559 uint32_t reserved[62];
1563 uint32_t :24;
1564 uint32_t srq_m :1;
1565 uint32_t srq :1;
1566 uint32_t :1;
1567 uint32_t log_max_srq :5;
1568 uint32_t :32;
1569 uint32_t reserved[62];
1586 uint32_t rlid :16;
1587 uint32_t ml_path :7;
1588 uint32_t grh :1;
1589 uint32_t :8;
1590 uint32_t pd :24;
1591 uint32_t portnum :2;
1592 uint32_t :6;
1593 uint32_t flow_label :20;
1594 uint32_t tclass :8;
1595 uint32_t sl :4;
1596 uint32_t hop_limit :8;
1597 uint32_t max_stat_rate :3;
1598 uint32_t :1;
1599 uint32_t msg_sz :2;
1600 uint32_t :2;
1601 uint32_t mgid_index :6;
1602 uint32_t :10;
1608 uint32_t :6;
1609 uint32_t portnum :2;
1610 uint32_t pd :24;
1611 uint32_t :8;
1612 uint32_t grh :1;
1613 uint32_t ml_path :7;
1614 uint32_t rlid :16;
1615 uint32_t :10;
1616 uint32_t mgid_index :6;
1617 uint32_t :2;
1618 uint32_t msg_sz :2;
1619 uint32_t :1;
1620 uint32_t max_stat_rate :3;
1621 uint32_t hop_limit :8;
1622 uint32_t sl :4;
1623 uint32_t tclass :8;
1624 uint32_t flow_label :20;
1658 uint32_t rlid :16;
1659 uint32_t ml_path :7;
1660 uint32_t grh :1;
1661 uint32_t :5;
1662 uint32_t rnr_retry :3;
1663 uint32_t pkey_indx :7;
1664 uint32_t :17;
1665 uint32_t portnum :2;
1666 uint32_t :6;
1667 uint32_t flow_label :20;
1668 uint32_t tclass :8;
1669 uint32_t sl :4;
1670 uint32_t hop_limit :8;
1671 uint32_t max_stat_rate :3;
1672 uint32_t :5;
1673 uint32_t mgid_index :6;
1674 uint32_t :5;
1675 uint32_t ack_timeout :5;
1681 uint32_t :6;
1682 uint32_t portnum :2;
1683 uint32_t :17;
1684 uint32_t pkey_indx :7;
1685 uint32_t rnr_retry :3;
1686 uint32_t :5;
1687 uint32_t grh :1;
1688 uint32_t ml_path :7;
1689 uint32_t rlid :16;
1690 uint32_t ack_timeout :5;
1691 uint32_t :5;
1692 uint32_t mgid_index :6;
1693 uint32_t :5;
1694 uint32_t max_stat_rate :3;
1695 uint32_t hop_limit :8;
1696 uint32_t sl :4;
1697 uint32_t tclass :8;
1698 uint32_t flow_label :20;
1706 uint32_t sched_q :4;
1707 uint32_t :28;
1708 uint32_t :8;
1709 uint32_t de :1;
1710 uint32_t :2;
1711 uint32_t pm_state :2;
1712 uint32_t :3;
1713 uint32_t serv_type :3;
1714 uint32_t :9;
1715 uint32_t state :4;
1716 uint32_t usr_page :24;
1717 uint32_t :8;
1718 uint32_t :24;
1719 uint32_t msg_max :5;
1720 uint32_t mtu :3;
1721 uint32_t rem_qpn :24;
1722 uint32_t :8;
1723 uint32_t loc_qpn :24;
1724 uint32_t :8;
1725 uint32_t :32;
1726 uint32_t :32;
1729 uint32_t pd :24;
1730 uint32_t :8;
1731 uint32_t rdd :24;
1732 uint32_t :8;
1733 uint32_t wqe_lkey;
1734 uint32_t wqe_baseaddr;
1735 uint32_t :32;
1736 uint32_t :3;
1737 uint32_t ssc :1;
1738 uint32_t sic :1;
1739 uint32_t cur_retry_cnt :3;
1740 uint32_t cur_rnr_retry :3;
1741 uint32_t :2;
1742 uint32_t sae :1;
1743 uint32_t swe :1;
1744 uint32_t sre :1;
1745 uint32_t retry_cnt :3;
1746 uint32_t :2;
1747 uint32_t sra_max :3;
1748 uint32_t flight_lim :4;
1749 uint32_t ack_req_freq :4;
1750 uint32_t cqn_snd :24;
1751 uint32_t :8;
1752 uint32_t next_snd_psn :24;
1753 uint32_t :8;
1755 uint32_t ssn :24;
1756 uint32_t :8;
1757 uint32_t last_acked_psn :24;
1758 uint32_t :8;
1759 uint32_t next_rcv_psn :24;
1760 uint32_t min_rnr_nak :5;
1761 uint32_t :3;
1762 uint32_t :3;
1763 uint32_t rsc :1;
1764 uint32_t ric :1;
1765 uint32_t :8;
1766 uint32_t rae :1;
1767 uint32_t rwe :1;
1768 uint32_t rre :1;
1769 uint32_t :5;
1770 uint32_t rra_max :3;
1771 uint32_t :8;
1772 uint32_t cqn_rcv :24;
1773 uint32_t :8;
1774 uint32_t :5;
1775 uint32_t ra_buff_indx :27;
1777 uint32_t srq_number :24;
1778 uint32_t srq_en :1;
1779 uint32_t :7;
1780 uint32_t qkey;
1781 uint32_t :32;
1782 uint32_t rmsn :24;
1783 uint32_t :8;
1784 uint32_t rsrv0[18];
1788 uint32_t state :4;
1789 uint32_t :9;
1790 uint32_t serv_type :3;
1791 uint32_t :3;
1792 uint32_t pm_state :2;
1793 uint32_t :2;
1794 uint32_t de :1;
1795 uint32_t :8;
1796 uint32_t :28;
1797 uint32_t sched_q :4;
1798 uint32_t mtu :3;
1799 uint32_t msg_max :5;
1800 uint32_t :24;
1801 uint32_t :8;
1802 uint32_t usr_page :24;
1803 uint32_t :8;
1804 uint32_t loc_qpn :24;
1805 uint32_t :8;
1806 uint32_t rem_qpn :24;
1807 uint32_t :32;
1808 uint32_t :32;
1811 uint32_t :8;
1812 uint32_t rdd :24;
1813 uint32_t :8;
1814 uint32_t pd :24;
1815 uint32_t wqe_baseaddr;
1816 uint32_t wqe_lkey;
1817 uint32_t ack_req_freq :4;
1818 uint32_t flight_lim :4;
1819 uint32_t sra_max :3;
1820 uint32_t :2;
1821 uint32_t retry_cnt :3;
1822 uint32_t sre :1;
1823 uint32_t swe :1;
1824 uint32_t sae :1;
1825 uint32_t :2;
1826 uint32_t cur_rnr_retry :3;
1827 uint32_t cur_retry_cnt :3;
1828 uint32_t sic :1;
1829 uint32_t ssc :1;
1830 uint32_t :3;
1831 uint32_t :32;
1832 uint32_t :8;
1833 uint32_t next_snd_psn :24;
1834 uint32_t :8;
1835 uint32_t cqn_snd :24;
1837 uint32_t :8;
1838 uint32_t last_acked_psn :24;
1839 uint32_t :8;
1840 uint32_t ssn :24;
1841 uint32_t :8;
1842 uint32_t rra_max :3;
1843 uint32_t :5;
1844 uint32_t rre :1;
1845 uint32_t rwe :1;
1846 uint32_t rae :1;
1847 uint32_t :8;
1848 uint32_t ric :1;
1849 uint32_t rsc :1;
1850 uint32_t :3;
1851 uint32_t :3;
1852 uint32_t min_rnr_nak :5;
1853 uint32_t next_rcv_psn :24;
1854 uint32_t ra_buff_indx :27;
1855 uint32_t :5;
1856 uint32_t :8;
1857 uint32_t cqn_rcv :24;
1859 uint32_t qkey;
1860 uint32_t :7;
1861 uint32_t srq_en :1;
1862 uint32_t srq_number :24;
1863 uint32_t :8;
1864 uint32_t rmsn :24;
1865 uint32_t :32;
1866 uint32_t rsrv0[18];
1927 uint32_t :32;
1928 uint32_t :6;
1929 uint32_t next_gid_indx :26;
1930 uint32_t :32;
1931 uint32_t :32;
1937 uint32_t next_gid_indx :26;
1938 uint32_t :6;
1939 uint32_t :32;
1940 uint32_t :32;
1941 uint32_t :32;
1950 uint32_t qpn :24;
1951 uint32_t :7;
1952 uint32_t q :1;
1956 uint32_t q :1;
1957 uint32_t :7;
1958 uint32_t qpn :24;
1970 uint32_t linkdown :8;
1971 uint32_t linkerrrec :8;
1972 uint32_t symerr :16;
1974 uint32_t cntrsel :16;
1975 uint32_t portsel :8;
1976 uint32_t :8;
1978 uint32_t portxmdiscard :16;
1979 uint32_t portrcvswrelay :16;
1981 uint32_t portrcvrem :16;
1982 uint32_t portrcv :16;
1984 uint32_t vl15drop :16;
1985 uint32_t :16;
1987 uint32_t xsbuffovrun :4;
1988 uint32_t locallinkint :4;
1989 uint32_t :8;
1990 uint32_t portrcconstr :8;
1991 uint32_t portxmconstr :8;
1993 uint32_t portrcdata;
1995 uint32_t portxmdata;
1997 uint32_t portrcpkts;
1999 uint32_t portxmpkts;
2001 uint32_t reserved;
2003 uint32_t portxmwait;
2007 uint32_t :8;
2008 uint32_t portsel :8;
2009 uint32_t cntrsel :16;
2011 uint32_t symerr :16;
2012 uint32_t linkerrrec :8;
2013 uint32_t linkdown :8;
2015 uint32_t portrcv :16;
2016 uint32_t portrcvrem :16;
2018 uint32_t portrcvswrelay :16;
2019 uint32_t portxmdiscard :16;
2021 uint32_t portxmconstr :8;
2022 uint32_t portrcconstr :8;
2023 uint32_t :8;
2024 uint32_t locallinkint :4;
2025 uint32_t xsbuffovrun :4;
2027 uint32_t :16;
2028 uint32_t vl15drop :16;
2030 uint32_t portxmdata;
2032 uint32_t portrcdata;
2034 uint32_t portxmpkts;
2036 uint32_t portrcpkts;
2038 uint32_t portxmwait;
2040 uint32_t reserved;
2078 uint32_t nda :26;
2079 uint32_t fence :1;
2080 uint32_t nopcode :5;
2081 uint32_t qpn :24;
2082 uint32_t :2;
2083 uint32_t nds :6;
2092 uint32_t nda :26;
2093 uint32_t nds :6;
2094 uint32_t qpn :24;
2095 uint32_t credits :8;
2105 uint32_t cmd :8;
2106 uint32_t cqn :24;
2107 uint32_t param;
2120 uint32_t cmd :8;
2121 uint32_t :18;
2122 uint32_t eqn :6;
2123 uint32_t param;
2135 uint32_t rsrv0[4]; /* "RD Send" unsupported */
2140 uint32_t rsrv1[244];
2141 uint32_t iblast[256]; /* "InfiniBlast" unsupported */
2174 uint32_t next_wqe_addr :26;
2175 uint32_t :1;
2176 uint32_t nopcode :5;
2177 uint32_t next_eec :24;
2178 uint32_t dbd :1;
2179 uint32_t fence :1;
2180 uint32_t nds :6;
2182 uint32_t :28;
2183 uint32_t c :1;
2184 uint32_t e :1;
2185 uint32_t s :1;
2186 uint32_t i :1;
2187 uint32_t immediate :32;
2208 uint32_t :32;
2209 uint32_t lkey :32;
2210 uint32_t av_addr_h :32;
2211 uint32_t av_addr_l :27;
2212 uint32_t :5;
2213 uint32_t rsrv0[4];
2214 uint32_t :8;
2215 uint32_t dest_qp :24;
2216 uint32_t qkey :32;
2217 uint32_t :32;
2218 uint32_t :32;
2224 uint32_t ae :1;
2225 uint32_t rw :1;
2226 uint32_t rr :1;
2227 uint32_t :29;
2228 uint32_t :32;
2229 uint32_t new_rkey;
2230 uint32_t reg_lkey;
2240 uint32_t rkey;
2241 uint32_t :32;
2262 uint32_t next_wqe_addr :26;
2263 uint32_t :1;
2264 uint32_t nopcode :5;
2265 uint32_t :24;
2266 uint32_t dbd :1;
2267 uint32_t :1;
2268 uint32_t nds :6;
2270 uint32_t :14;
2271 uint32_t vl15 :1;
2272 uint32_t slr :1;
2273 uint32_t :1;
2274 uint32_t max_srate :3;
2275 uint32_t sl :4;
2276 uint32_t :4;
2277 uint32_t c :1;
2278 uint32_t e :1;
2279 uint32_t :2;
2280 uint32_t rlid :16;
2281 uint32_t vcrc :16;
2301 uint32_t next_wqe_addr :26;
2302 uint32_t :5;
2303 uint32_t one :1;
2304 uint32_t :24;
2305 uint32_t dbd :1;
2306 uint32_t :1;
2307 uint32_t nds :6;
2309 uint32_t :28;
2310 uint32_t c :1;
2311 uint32_t e :1;
2312 uint32_t :2;
2313 uint32_t :32;
2324 uint32_t inline_data :1;
2325 uint32_t byte_cnt :31;
2326 uint32_t lkey;
2485 uint32_t *tmp; \
2486 uint32_t inline_tmp; \
2488 tmp = (uint32_t *)(ds); \
2495 uint32_t *tmp; \
2496 uint32_t inline_tmp; \
2498 tmp = (uint32_t *)(ds); \
2528 uint32_t *tmp; \
2529 uint32_t lrh_tmp; \
2531 tmp = (uint32_t *)(lrh); \
2564 uint32_t *tmp; \
2565 uint32_t grh_tmp; \
2568 tmp = (uint32_t *)(grh); \
2589 uint32_t *tmp; \
2590 uint32_t bth_tmp; \
2592 tmp = (uint32_t *)(bth); \
2613 uint32_t *tmp; \
2615 tmp = (uint32_t *)(deth); \
2668 (uint32_t *)((uintptr_t)(state)->ts_reg_cmd_baseaddr + \
2674 (uint32_t *)((uintptr_t)(state)->ts_reg_cmd_baseaddr + \
2680 (uint32_t *)((uintptr_t)(state)->ts_reg_cmd_baseaddr + \
2686 (uint32_t *)((uintptr_t)(state)->ts_reg_cmd_baseaddr + \
2705 (uint32_t *)((uintptr_t)(state)->ts_reg_cmd_baseaddr + \