Lines Matching refs:NULL
46 { MAC_STAT_MULTIRCV, "multircv", NULL },
47 { MAC_STAT_BRDCSTRCV, "brdcstrcv", NULL },
48 { MAC_STAT_MULTIXMT, "multixmt", NULL },
49 { MAC_STAT_BRDCSTXMT, "brdcstxmt", NULL },
51 { MAC_STAT_IERRORS, "ierrors", NULL },
52 { MAC_STAT_UNKNOWNS, "unknowns", NULL },
54 { MAC_STAT_OERRORS, "oerrors", NULL },
55 { MAC_STAT_COLLISIONS, "collisions", NULL },
60 { MAC_STAT_UNDERFLOWS, "uflo", NULL },
61 { MAC_STAT_OVERFLOWS, "oflo", NULL }
74 { ETHER_STAT_FIRST_COLLISIONS, "first_collisions", NULL },
75 { ETHER_STAT_MULTI_COLLISIONS, "multi_collisions", NULL },
76 { ETHER_STAT_SQE_ERRORS, "sqe_errors", NULL },
77 { ETHER_STAT_DEFER_XMTS, "defer_xmts", NULL },
82 { ETHER_STAT_MACXMT_ERRORS, "macxmt_errors", NULL },
83 { ETHER_STAT_CARRIER_ERRORS, "carrier_errors", NULL },
88 { ETHER_STAT_XCVR_ADDR, "xcvr_addr", NULL },
89 { ETHER_STAT_XCVR_ID, "xcvr_id", NULL },
90 { ETHER_STAT_XCVR_INUSE, "xcvr_inuse", NULL },
92 { ETHER_STAT_CAP_1000FDX, "cap_1000fdx", NULL },
93 { ETHER_STAT_CAP_1000HDX, "cap_1000hdx", NULL },
94 { ETHER_STAT_CAP_100FDX, "cap_100fdx", NULL },
95 { ETHER_STAT_CAP_100HDX, "cap_100hdx", NULL },
96 { ETHER_STAT_CAP_10FDX, "cap_10fdx", NULL },
97 { ETHER_STAT_CAP_10HDX, "cap_10hdx", NULL },
98 { ETHER_STAT_CAP_ASMPAUSE, "cap_asmpause", NULL },
99 { ETHER_STAT_CAP_PAUSE, "cap_pause", NULL },
100 { ETHER_STAT_CAP_AUTONEG, "cap_autoneg", NULL },
102 { ETHER_STAT_ADV_CAP_1000FDX, "adv_cap_1000fdx", NULL },
103 { ETHER_STAT_ADV_CAP_1000HDX, "adv_cap_1000hdx", NULL },
104 { ETHER_STAT_ADV_CAP_100FDX, "adv_cap_100fdx", NULL },
105 { ETHER_STAT_ADV_CAP_100HDX, "adv_cap_100hdx", NULL },
106 { ETHER_STAT_ADV_CAP_10FDX, "adv_cap_10fdx", NULL },
107 { ETHER_STAT_ADV_CAP_10HDX, "adv_cap_10hdx", NULL },
108 { ETHER_STAT_ADV_CAP_ASMPAUSE, "adv_cap_asmpause", NULL },
109 { ETHER_STAT_ADV_CAP_PAUSE, "adv_cap_pause", NULL },
110 { ETHER_STAT_ADV_CAP_AUTONEG, "adv_cap_autoneg", NULL },
112 { ETHER_STAT_LP_CAP_1000FDX, "lp_cap_1000fdx", NULL },
113 { ETHER_STAT_LP_CAP_1000HDX, "lp_cap_1000hdx", NULL },
114 { ETHER_STAT_LP_CAP_100FDX, "lp_cap_100fdx", NULL },
115 { ETHER_STAT_LP_CAP_100HDX, "lp_cap_100hdx", NULL },
116 { ETHER_STAT_LP_CAP_10FDX, "lp_cap_10fdx", NULL },
117 { ETHER_STAT_LP_CAP_10HDX, "lp_cap_10hdx", NULL },
118 { ETHER_STAT_LP_CAP_ASMPAUSE, "lp_cap_asmpause", NULL },
119 { ETHER_STAT_LP_CAP_PAUSE, "lp_cap_pause", NULL },
120 { ETHER_STAT_LP_CAP_AUTONEG, "lp_cap_autoneg", NULL },
122 { ETHER_STAT_LINK_ASMPAUSE, "link_asmpause", NULL },
123 { ETHER_STAT_LINK_PAUSE, "link_pause", NULL },
124 { ETHER_STAT_LINK_AUTONEG, "link_autoneg", NULL },
127 { ETHER_STAT_TOOSHORT_ERRORS, "runt_errors", NULL },
128 { ETHER_STAT_CAP_REMFAULT, "cap_rem_fault", NULL },
129 { ETHER_STAT_ADV_REMFAULT, "adv_rem_fault", NULL },
130 { ETHER_STAT_LP_REMFAULT, "lp_rem_fault", NULL },
132 { ETHER_STAT_JABBER_ERRORS, "jabber_errors", NULL },
133 { ETHER_STAT_CAP_100T4, "cap_100T4", NULL },
134 { ETHER_STAT_ADV_CAP_100T4, "adv_cap_100T4", NULL },
135 { ETHER_STAT_LP_CAP_100T4, "lp_cap_100T4", NULL },
137 { ETHER_STAT_CAP_10GFDX, "cap_10gfdx", NULL },
138 { ETHER_STAT_ADV_CAP_10GFDX, "adv_cap_10gfdx", NULL },
139 { ETHER_STAT_LP_CAP_1000FDX, "lp_cap_10gfdx", NULL },
141 { ETHER_STAT_CAP_40GFDX, "cap_40gfdx", NULL },
142 { ETHER_STAT_ADV_CAP_40GFDX, "adv_cap_40gfdx", NULL },
143 { ETHER_STAT_LP_CAP_40GFDX, "lp_cap_40gfdx", NULL },
145 { ETHER_STAT_CAP_100GFDX, "cap_100gfdx", NULL },
146 { ETHER_STAT_ADV_CAP_100GFDX, "adv_cap_100gfdx", NULL },
147 { ETHER_STAT_LP_CAP_100GFDX, "lp_cap_100gfdx", NULL },
149 { ETHER_STAT_CAP_2500FDX, "cap_2500fdx", NULL },
150 { ETHER_STAT_ADV_CAP_2500FDX, "adv_cap_2500fdx", NULL },
151 { ETHER_STAT_LP_CAP_2500FDX, "lp_cap_2500fdx", NULL },
153 { ETHER_STAT_CAP_5000FDX, "cap_5000fdx", NULL },
154 { ETHER_STAT_ADV_CAP_5000FDX, "adv_cap_5000fdx", NULL },
155 { ETHER_STAT_LP_CAP_5000FDX, "lp_cap_5000fdx", NULL },
157 { ETHER_STAT_CAP_25GFDX, "cap_25gfdx", NULL },
158 { ETHER_STAT_ADV_CAP_25GFDX, "adv_cap_25gfdx", NULL },
159 { ETHER_STAT_LP_CAP_25GFDX, "lp_cap_25gfdx", NULL },
161 { ETHER_STAT_CAP_50GFDX, "cap_50gfdx", NULL },
162 { ETHER_STAT_ADV_CAP_50GFDX, "adv_cap_50gfdx", NULL },
163 { ETHER_STAT_LP_CAP_50GFDX, "lp_cap_50gfdx", NULL },
165 { ETHER_STAT_CAP_200GFDX, "cap_200gfdx", NULL },
166 { ETHER_STAT_ADV_CAP_200GFDX, "adv_cap_200gfdx", NULL },
167 { ETHER_STAT_LP_CAP_200GFDX, "lp_cap_200gfdx", NULL },
169 { ETHER_STAT_CAP_400GFDX, "cap_400gfdx", NULL },
170 { ETHER_STAT_ADV_CAP_400GFDX, "adv_cap_400gfdx", NULL },
171 { ETHER_STAT_LP_CAP_400GFDX, "lp_cap_400gfdx", NULL },
190 return (NULL); in softmac_hold_dev_kstat()
197 if (ksp != NULL) { in softmac_hold_dev_kstat()
200 if ((ksp->ks_data != NULL) && in softmac_hold_dev_kstat()
212 return (NULL); in softmac_hold_dev_kstat()
232 if (name == NULL) in softmac_get_kstat()
285 if ((ksp = softmac_hold_dev_kstat(softmac)) == NULL) in softmac_m_stat()
289 i_softmac_stat_info_t *ssip = NULL; in softmac_m_stat()
298 if (ssip == NULL) { in softmac_m_stat()
311 i_softmac_stat_info_t *ssip = NULL; in softmac_m_stat()
321 if (ssip == NULL) { in softmac_m_stat()