Lines Matching refs:sp
54 sfxge_pci_cap_find(sfxge_t *sp, uint8_t cap_id, off_t *offp) in sfxge_pci_cap_find() argument
60 stat = pci_config_get16(sp->s_pci_handle, PCI_CONF_STAT); in sfxge_pci_cap_find()
67 for (off = pci_config_get8(sp->s_pci_handle, PCI_CONF_CAP_PTR); in sfxge_pci_cap_find()
69 off = pci_config_get8(sp->s_pci_handle, off + PCI_CAP_NEXT_PTR)) { in sfxge_pci_cap_find()
70 if (cap_id == pci_config_get8(sp->s_pci_handle, in sfxge_pci_cap_find()
91 sfxge_pci_init(sfxge_t *sp) in sfxge_pci_init() argument
116 if (ddi_prop_lookup_int_array(DDI_DEV_T_ANY, sp->s_dip, in sfxge_pci_init()
122 sp->s_bus_addr = pci_regs[0]; in sfxge_pci_init()
126 if (pci_config_setup(sp->s_dip, &(sp->s_pci_handle)) != DDI_SUCCESS) { in sfxge_pci_init()
131 sp->s_pci_venid = pci_config_get16(sp->s_pci_handle, PCI_CONF_VENID); in sfxge_pci_init()
132 sp->s_pci_devid = pci_config_get16(sp->s_pci_handle, PCI_CONF_DEVID); in sfxge_pci_init()
133 if ((rc = efx_family(sp->s_pci_venid, sp->s_pci_devid, in sfxge_pci_init()
134 &sp->s_family)) != 0) in sfxge_pci_init()
137 if ((rc = sfxge_pci_cap_find(sp, PCI_CAP_ID_PCI_E, &off)) != 0) in sfxge_pci_init()
140 pciecap = pci_config_get16(sp->s_pci_handle, off + PCIE_PCIECAP); in sfxge_pci_init()
143 linksts = pci_config_get16(sp->s_pci_handle, off + PCIE_LINKSTS); in sfxge_pci_init()
146 sp->s_pcie_nlanes = 1; in sfxge_pci_init()
150 sp->s_pcie_nlanes = 2; in sfxge_pci_init()
154 sp->s_pcie_nlanes = 4; in sfxge_pci_init()
158 sp->s_pcie_nlanes = 8; in sfxge_pci_init()
168 sp->s_pcie_linkspeed = 1; in sfxge_pci_init()
172 sp->s_pcie_linkspeed = 2; in sfxge_pci_init()
176 sp->s_pcie_linkspeed = 3; in sfxge_pci_init()
184 devctl = pci_config_get16(sp->s_pci_handle, off + PCIE_DEVCTL); in sfxge_pci_init()
192 dev_err(sp->s_dip, CE_NOTE, in sfxge_pci_init()
196 (sp->s_pcie_linkspeed == 1) ? "2.5G" : in sfxge_pci_init()
197 (sp->s_pcie_linkspeed == 2) ? "5.0G" : in sfxge_pci_init()
198 (sp->s_pcie_linkspeed == 3) ? "8.0G" : in sfxge_pci_init()
200 sp->s_pcie_nlanes); in sfxge_pci_init()
209 pci_config_teardown(&(sp->s_pci_handle)); in sfxge_pci_init()
210 sp->s_pci_handle = NULL; in sfxge_pci_init()
219 sfxge_pcie_check_link(sfxge_t *sp, unsigned int full_nlanes, in sfxge_pcie_check_link() argument
222 if ((sp->s_pcie_linkspeed < full_speed) || in sfxge_pcie_check_link()
223 (sp->s_pcie_nlanes < full_nlanes)) in sfxge_pcie_check_link()
224 dev_err(sp->s_dip, CE_NOTE, in sfxge_pcie_check_link()
235 sfxge_pci_fini(sfxge_t *sp) in sfxge_pci_fini() argument
237 sp->s_pcie_nlanes = 0; in sfxge_pci_fini()
238 sp->s_pcie_linkspeed = 0; in sfxge_pci_fini()
240 pci_config_teardown(&(sp->s_pci_handle)); in sfxge_pci_fini()
241 sp->s_pci_handle = NULL; in sfxge_pci_fini()