Lines Matching refs:channel
309 dc->channel = (nxge_channel_t)i; in nxge_hio_vr_add()
342 dc->channel = (nxge_channel_t)i; in nxge_hio_vr_add()
414 nxge_hio_get_dc_htable_idx(nxge_t *nxge, vpc_type_t type, uint32_t channel) in nxge_hio_get_dc_htable_idx() argument
420 dc = nxge_grp_dc_find(nxge, type, channel); in nxge_hio_get_dc_htable_idx()
602 int channel) in nxge_tdc_lp_conf() argument
614 ring = nxge->tx_rings->rings[channel]; in nxge_tdc_lp_conf()
621 if (!(dc = nxge_grp_dc_find(nxge, VP_BOUND_TX, channel))) in nxge_tdc_lp_conf()
630 data = nxge->tx_buf_pool_p->dma_buf_pool_p[channel]; in nxge_tdc_lp_conf()
635 (uint64_t)channel, 0, in nxge_tdc_lp_conf()
644 channel, hv_rv, in nxge_tdc_lp_conf()
652 (uint64_t)channel, 0, &ra, &size); in nxge_tdc_lp_conf()
659 channel, hv_rv, ring->hv_tx_buf_base_ioaddr_pp, in nxge_tdc_lp_conf()
665 control = nxge->tx_cntl_pool_p->dma_buf_pool_p[channel]; in nxge_tdc_lp_conf()
670 (uint64_t)channel, (uint64_t)1, in nxge_tdc_lp_conf()
679 channel, hv_rv, in nxge_tdc_lp_conf()
687 (uint64_t)channel, (uint64_t)1, &ra, &size); in nxge_tdc_lp_conf()
694 channel, hv_rv, ring->hv_tx_cntl_base_ioaddr_pp, in nxge_tdc_lp_conf()
721 int channel) in nxge_rdc_lp_conf() argument
733 ring = nxge->rx_rbr_rings->rbr_rings[channel]; in nxge_rdc_lp_conf()
739 if (!(dc = nxge_grp_dc_find(nxge, VP_BOUND_RX, channel))) in nxge_rdc_lp_conf()
748 data = nxge->rx_buf_pool_p->dma_buf_pool_p[channel]; in nxge_rdc_lp_conf()
753 (uint64_t)channel, 0, in nxge_rdc_lp_conf()
762 channel, hv_rv, in nxge_rdc_lp_conf()
770 (uint64_t)channel, 0, &ra, &size); in nxge_rdc_lp_conf()
777 channel, hv_rv, ring->hv_rx_buf_base_ioaddr_pp, in nxge_rdc_lp_conf()
783 control = nxge->rx_cntl_pool_p->dma_buf_pool_p[channel]; in nxge_rdc_lp_conf()
788 (uint64_t)channel, (uint64_t)1, in nxge_rdc_lp_conf()
797 channel, hv_rv, in nxge_rdc_lp_conf()
805 (uint64_t)channel, (uint64_t)1, &ra, &size); in nxge_rdc_lp_conf()
812 channel, hv_rv, ring->hv_rx_cntl_base_ioaddr_pp, in nxge_rdc_lp_conf()
925 uint32_t channel; in nxge_hio_rdc_intr_arm() local
947 for (channel = 0; channel < NXGE_MAX_RDCS; channel++) { in nxge_hio_rdc_intr_arm()
948 if ((1 << channel) & group->map) { in nxge_hio_rdc_intr_arm()
952 dc = nxge_grp_dc_find(nxge, VP_BOUND_RX, channel); in nxge_hio_rdc_intr_arm()
980 uint32_t channel; in nxge_hio_rdc_enable() local
1003 for (channel = 0; channel < NXGE_MAX_RDCS; channel++) { in nxge_hio_rdc_enable()
1008 if ((1 << channel) & group->map) { in nxge_hio_rdc_enable()
1012 rval = npi_rxdma_cfg_rdc_enable(handle, channel); in nxge_hio_rdc_enable()
1017 channel); in nxge_hio_rdc_enable()