Lines Matching refs:val
36 uint64_t val = 0; in npi_zcp_config() local
49 NXGE_REG_RD64(handle, ZCP_CONFIG_REG, &val); in npi_zcp_config()
52 val |= ZC_ENABLE; in npi_zcp_config()
54 val &= ~ECC_CHK_DIS; in npi_zcp_config()
56 val &= ~PAR_CHK_DIS; in npi_zcp_config()
58 val &= ~DIS_BUFF_RN; in npi_zcp_config()
60 val &= ~DIS_BUFF_RQ_IF; in npi_zcp_config()
63 val &= ~ZC_ENABLE; in npi_zcp_config()
65 val |= ECC_CHK_DIS; in npi_zcp_config()
67 val |= PAR_CHK_DIS; in npi_zcp_config()
69 val |= DIS_BUFF_RN; in npi_zcp_config()
71 val |= DIS_BUFF_RQ_IF; in npi_zcp_config()
73 NXGE_REG_WR64(handle, ZCP_CONFIG_REG, val); in npi_zcp_config()
77 NXGE_REG_RD64(handle, ZCP_CONFIG_REG, &val); in npi_zcp_config()
78 val &= ((ZCP_DEBUG_SEL_MASK) | (RDMA_TH_MASK)); in npi_zcp_config()
80 val |= ZC_ENABLE; in npi_zcp_config()
82 val &= ~ZC_ENABLE; in npi_zcp_config()
84 val &= ~ECC_CHK_DIS; in npi_zcp_config()
86 val |= ECC_CHK_DIS; in npi_zcp_config()
88 val &= ~PAR_CHK_DIS; in npi_zcp_config()
90 val |= PAR_CHK_DIS; in npi_zcp_config()
92 val &= ~DIS_BUFF_RN; in npi_zcp_config()
94 val |= DIS_BUFF_RN; in npi_zcp_config()
96 val &= DIS_BUFF_RQ_IF; in npi_zcp_config()
98 val |= DIS_BUFF_RQ_IF; in npi_zcp_config()
99 NXGE_REG_WR64(handle, ZCP_CONFIG_REG, val); in npi_zcp_config()
116 uint64_t val = 0; in npi_zcp_iconfig() local
129 NXGE_REG_RD64(handle, ZCP_INT_MASK_REG, &val); in npi_zcp_iconfig()
131 val |= iconfig; in npi_zcp_iconfig()
133 val &= ~iconfig; in npi_zcp_iconfig()
134 NXGE_REG_WR64(handle, ZCP_INT_MASK_REG, val); in npi_zcp_iconfig()
146 val = (uint64_t)iconfig; in npi_zcp_iconfig()
147 NXGE_REG_WR64(handle, ZCP_INT_MASK_REG, val); in npi_zcp_iconfig()
164 uint64_t val; in npi_zcp_get_istatus() local
166 NXGE_REG_RD64(handle, ZCP_INT_STAT_REG, &val); in npi_zcp_get_istatus()
167 *istatus = (uint32_t)val; in npi_zcp_get_istatus()
175 uint64_t val; in npi_zcp_clear_istatus() local
177 val = (uint64_t)0xffff; in npi_zcp_clear_istatus()
178 NXGE_REG_WR64(handle, ZCP_INT_STAT_REG, val); in npi_zcp_clear_istatus()
186 uint64_t val = 0; in npi_zcp_set_dma_thresh() local
196 NXGE_REG_RD64(handle, ZCP_CONFIG_REG, &val); in npi_zcp_set_dma_thresh()
198 val &= ~RDMA_TH_MASK; in npi_zcp_set_dma_thresh()
199 val |= (dma_thres << RDMA_TH_SHIFT); in npi_zcp_set_dma_thresh()
201 NXGE_REG_WR64(handle, ZCP_CONFIG_REG, val); in npi_zcp_set_dma_thresh()
242 uint64_t val = 0; in npi_zcp_set_dst_region() local
260 val = (uint64_t)row_idx; in npi_zcp_set_dst_region()
264 NXGE_REG_WR64(handle, ZCP_DST4_RE_CTL_REG, val); in npi_zcp_set_dst_region()
267 NXGE_REG_WR64(handle, ZCP_DST8_RE_CTL_REG, val); in npi_zcp_set_dst_region()
270 NXGE_REG_WR64(handle, ZCP_DST16_RE_CTL_REG, val); in npi_zcp_set_dst_region()
273 NXGE_REG_WR64(handle, ZCP_DST32_RE_CTL_REG, val); in npi_zcp_set_dst_region()
285 tte_sflow_attr_t val; in npi_zcp_tt_static_entry() local
312 (zcp_ram_unit_t *)&val) != 0) { in npi_zcp_tt_static_entry()
322 val.qw0.bits.ldw.rdc_tbl_offset = in npi_zcp_tt_static_entry()
327 val.qw0.bits.ldw.buf_size = in npi_zcp_tt_static_entry()
332 val.qw0.bits.ldw.num_buf = sflow->qw0.bits.ldw.num_buf; in npi_zcp_tt_static_entry()
336 val.qw0.bits.ldw.ulp_end = sflow->qw0.bits.ldw.ulp_end; in npi_zcp_tt_static_entry()
340 val.qw1.bits.ldw.ulp_end = sflow->qw1.bits.ldw.ulp_end; in npi_zcp_tt_static_entry()
344 val.qw1.bits.ldw.ulp_end_en = in npi_zcp_tt_static_entry()
349 val.qw1.bits.ldw.unmap_all_en = in npi_zcp_tt_static_entry()
354 val.qw1.bits.ldw.tmode = sflow->qw1.bits.ldw.tmode; in npi_zcp_tt_static_entry()
358 val.qw1.bits.ldw.skip = sflow->qw1.bits.ldw.skip; in npi_zcp_tt_static_entry()
362 val.qw1.bits.ldw.ring_base = in npi_zcp_tt_static_entry()
367 val.qw2.bits.ldw.ring_base = in npi_zcp_tt_static_entry()
372 val.qw2.bits.ldw.ring_size = in npi_zcp_tt_static_entry()
377 val.qw2.bits.ldw.busy = sflow->qw2.bits.ldw.busy; in npi_zcp_tt_static_entry()
381 val.qw3.bits.ldw.toq = sflow->qw3.bits.ldw.toq; in npi_zcp_tt_static_entry()
386 byte_en, 0, (zcp_ram_unit_t *)&val) != 0) { in npi_zcp_tt_static_entry()
394 sflow->qw0.value = val.qw0.value; in npi_zcp_tt_static_entry()
395 sflow->qw1.value = val.qw1.value; in npi_zcp_tt_static_entry()
396 sflow->qw2.value = val.qw2.value; in npi_zcp_tt_static_entry()
397 sflow->qw3.value = val.qw3.value; in npi_zcp_tt_static_entry()
398 sflow->qw4.value = val.qw4.value; in npi_zcp_tt_static_entry()
409 tte_dflow_attr_t val; in npi_zcp_tt_dynamic_entry() local
435 (zcp_ram_unit_t *)&val) != 0) { in npi_zcp_tt_dynamic_entry()
447 val.qw0.bits.ldw.mapped_in = in npi_zcp_tt_dynamic_entry()
452 val.qw1.bits.ldw.anchor_seq = in npi_zcp_tt_dynamic_entry()
457 val.qw2.bits.ldw.anchor_offset = in npi_zcp_tt_dynamic_entry()
462 val.qw2.bits.ldw.anchor_buf = in npi_zcp_tt_dynamic_entry()
467 val.qw2.bits.ldw.anchor_buf_flag = in npi_zcp_tt_dynamic_entry()
472 val.qw2.bits.ldw.unmap_on_left = in npi_zcp_tt_dynamic_entry()
477 val.qw2.bits.ldw.ulp_end_reached = in npi_zcp_tt_dynamic_entry()
482 val.qw3.bits.ldw.err_stat = in npi_zcp_tt_dynamic_entry()
487 val.qw3.bits.ldw.wr_ptr = dflow->qw3.bits.ldw.wr_ptr; in npi_zcp_tt_dynamic_entry()
491 val.qw3.bits.ldw.hoq = dflow->qw3.bits.ldw.hoq; in npi_zcp_tt_dynamic_entry()
495 val.qw3.bits.ldw.prefetch_on = in npi_zcp_tt_dynamic_entry()
501 byte_en, 0, (zcp_ram_unit_t *)&val) != 0) { in npi_zcp_tt_dynamic_entry()
509 dflow->qw0.value = val.qw0.value; in npi_zcp_tt_dynamic_entry()
510 dflow->qw1.value = val.qw1.value; in npi_zcp_tt_dynamic_entry()
511 dflow->qw2.value = val.qw2.value; in npi_zcp_tt_dynamic_entry()
512 dflow->qw3.value = val.qw3.value; in npi_zcp_tt_dynamic_entry()
513 dflow->qw4.value = val.qw4.value; in npi_zcp_tt_dynamic_entry()
523 zcp_ram_unit_t val; in npi_zcp_tt_bam_entry() local
557 (zcp_ram_unit_t *)&val) != 0) { in npi_zcp_tt_bam_entry()
567 word_en, 0, (zcp_ram_unit_t *)&val) != 0) { in npi_zcp_tt_bam_entry()
575 data->w0 = val.w0; in npi_zcp_tt_bam_entry()
576 data->w1 = val.w1; in npi_zcp_tt_bam_entry()
577 data->w2 = val.w2; in npi_zcp_tt_bam_entry()
578 data->w3 = val.w3; in npi_zcp_tt_bam_entry()
681 uint16_t cfifo_entryn, zcp_ram_unit_t *val) in zcp_mem_read() argument
710 NXGE_REG_RD64(handle, ZCP_RAM_DATA0_REG, &val->w0); in zcp_mem_read()
711 NXGE_REG_RD64(handle, ZCP_RAM_DATA1_REG, &val->w1); in zcp_mem_read()
712 NXGE_REG_RD64(handle, ZCP_RAM_DATA2_REG, &val->w2); in zcp_mem_read()
713 NXGE_REG_RD64(handle, ZCP_RAM_DATA3_REG, &val->w3); in zcp_mem_read()
714 NXGE_REG_RD64(handle, ZCP_RAM_DATA4_REG, &val->w4); in zcp_mem_read()
721 uint32_t byte_en, uint16_t cfifo_entryn, zcp_ram_unit_t *val) in zcp_mem_write() argument
734 NXGE_REG_WR64(handle, ZCP_RAM_DATA0_REG, val->w0); in zcp_mem_write()
735 NXGE_REG_WR64(handle, ZCP_RAM_DATA1_REG, val->w1); in zcp_mem_write()
736 NXGE_REG_WR64(handle, ZCP_RAM_DATA2_REG, val->w2); in zcp_mem_write()
737 NXGE_REG_WR64(handle, ZCP_RAM_DATA3_REG, val->w3); in zcp_mem_write()
738 NXGE_REG_WR64(handle, ZCP_RAM_DATA4_REG, val->w4); in zcp_mem_write()