Lines Matching refs:reg

99 unm_niu_gbe_phy_read(struct unm_adapter_s *adapter, long reg,  in unm_niu_gbe_phy_read()  argument
134 	address.reg_addr = (unm_crbword_t)reg;  in unm_niu_gbe_phy_read()
402 	unm_niu_gb_drop_crc_t reg;  in unm_niu_set_promiscuous_mode()  local
443 		    &reg, 4);  in unm_niu_set_promiscuous_mode()
446 			reg.drop_gb0 = data;  in unm_niu_set_promiscuous_mode()
449 			reg.drop_gb1 = data;  in unm_niu_set_promiscuous_mode()
452 			reg.drop_gb2 = data;  in unm_niu_set_promiscuous_mode()
455 			reg.drop_gb3 = data;  in unm_niu_set_promiscuous_mode()
462 		    &reg, 4);  in unm_niu_set_promiscuous_mode()
549 	long  reg;  in unm_niu_xg_set_promiscuous_mode()  local
563 		reg = 0;  in unm_niu_xg_set_promiscuous_mode()
565 		    UNM_NIU_GB_DROP_WRONGADDR, (void*)&reg, 4);  in unm_niu_xg_set_promiscuous_mode()
580 			reg = 0x0200;  in unm_niu_xg_set_promiscuous_mode()
582 			    UNM_NIU_FRAME_COUNT_SELECT, reg);  in unm_niu_xg_set_promiscuous_mode()
585 			reg = (0x20 << port);  in unm_niu_xg_set_promiscuous_mode()
587 			    UNM_NIU_FRAME_COUNT_SELECT, reg);  in unm_niu_xg_set_promiscuous_mode()
591 			    UNM_NIU_FRAME_COUNT, &reg, 4);  in unm_niu_xg_set_promiscuous_mode()
598 		} while (reg);  in unm_niu_xg_set_promiscuous_mode()
603 			    UNM_NIU_XGE_CONFIG_1 + (0x10000 * port), &reg, 4);  in unm_niu_xg_set_promiscuous_mode()
605 				reg = (reg | 0x2000UL);  in unm_niu_xg_set_promiscuous_mode()
607 				reg = (reg & ~0x2000UL);  in unm_niu_xg_set_promiscuous_mode()
610 			    UNM_NIU_XGE_CONFIG_1 + (0x10000 * port), reg);  in unm_niu_xg_set_promiscuous_mode()
626 	unm_niu_xg_pause_ctl_t reg;  in unm_niu_xg_set_tx_flow_ctl()  local
631 	adapter->unm_nic_hw_read_wx(adapter, UNM_NIU_XG_PAUSE_CTL, &reg, 4);  in unm_niu_xg_set_tx_flow_ctl()
633 		reg.xg0_mask = !enable;  in unm_niu_xg_set_tx_flow_ctl()
635 		reg.xg1_mask = !enable;  in unm_niu_xg_set_tx_flow_ctl()
637 	adapter->unm_nic_hw_write_wx(adapter, UNM_NIU_XG_PAUSE_CTL, &reg, 4);  in unm_niu_xg_set_tx_flow_ctl()
646 	unm_niu_gb_pause_ctl_t reg;  in unm_niu_gbe_set_tx_flow_ctl()  local
651 	adapter->unm_nic_hw_read_wx(adapter, UNM_NIU_GB_PAUSE_CTL, &reg, 4);  in unm_niu_gbe_set_tx_flow_ctl()
654 		reg.gb0_mask = !enable;  in unm_niu_gbe_set_tx_flow_ctl()
657 		reg.gb1_mask = !enable;  in unm_niu_gbe_set_tx_flow_ctl()
660 		reg.gb2_mask = !enable;  in unm_niu_gbe_set_tx_flow_ctl()
664 		reg.gb3_mask = !enable;  in unm_niu_gbe_set_tx_flow_ctl()
667 	adapter->unm_nic_hw_write_wx(adapter, UNM_NIU_GB_PAUSE_CTL, &reg, 4);  in unm_niu_gbe_set_tx_flow_ctl()
676 	unm_niu_gb_mac_config_0_t reg;  in unm_niu_gbe_set_rx_flow_ctl()  local
682 	    &reg, 4);  in unm_niu_gbe_set_rx_flow_ctl()
683 	reg.rx_flowctl = enable;  in unm_niu_gbe_set_rx_flow_ctl()
685 	    &reg, 4);  in unm_niu_gbe_set_rx_flow_ctl()