Lines Matching refs:reg
124 u32 reg = 0; in ixgbe_dcb_config_rx_arbiter_82598() local
129 reg = IXGBE_READ_REG(hw, IXGBE_RUPPBMR) | IXGBE_RUPPBMR_MQA; in ixgbe_dcb_config_rx_arbiter_82598()
130 IXGBE_WRITE_REG(hw, IXGBE_RUPPBMR, reg); in ixgbe_dcb_config_rx_arbiter_82598()
132 reg = IXGBE_READ_REG(hw, IXGBE_RMCS); in ixgbe_dcb_config_rx_arbiter_82598()
134 reg &= ~IXGBE_RMCS_ARBDIS; in ixgbe_dcb_config_rx_arbiter_82598()
136 reg |= IXGBE_RMCS_RRM; in ixgbe_dcb_config_rx_arbiter_82598()
138 reg |= IXGBE_RMCS_DFP; in ixgbe_dcb_config_rx_arbiter_82598()
140 IXGBE_WRITE_REG(hw, IXGBE_RMCS, reg); in ixgbe_dcb_config_rx_arbiter_82598()
147 reg = credit_refill | (credit_max << IXGBE_RT2CR_MCL_SHIFT); in ixgbe_dcb_config_rx_arbiter_82598()
150 reg |= IXGBE_RT2CR_LSP; in ixgbe_dcb_config_rx_arbiter_82598()
152 IXGBE_WRITE_REG(hw, IXGBE_RT2CR(i), reg); in ixgbe_dcb_config_rx_arbiter_82598()
155 reg = IXGBE_READ_REG(hw, IXGBE_RDRXCTL); in ixgbe_dcb_config_rx_arbiter_82598()
156 reg |= IXGBE_RDRXCTL_RDMTS_1_2; in ixgbe_dcb_config_rx_arbiter_82598()
157 reg |= IXGBE_RDRXCTL_MPBEN; in ixgbe_dcb_config_rx_arbiter_82598()
158 reg |= IXGBE_RDRXCTL_MCEN; in ixgbe_dcb_config_rx_arbiter_82598()
159 IXGBE_WRITE_REG(hw, IXGBE_RDRXCTL, reg); in ixgbe_dcb_config_rx_arbiter_82598()
161 reg = IXGBE_READ_REG(hw, IXGBE_RXCTRL); in ixgbe_dcb_config_rx_arbiter_82598()
163 reg &= ~IXGBE_RXCTRL_DMBYPS; in ixgbe_dcb_config_rx_arbiter_82598()
164 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, reg); in ixgbe_dcb_config_rx_arbiter_82598()
183 u32 reg, max_credits; in ixgbe_dcb_config_tx_desc_arbiter_82598() local
186 reg = IXGBE_READ_REG(hw, IXGBE_DPMCS); in ixgbe_dcb_config_tx_desc_arbiter_82598()
189 reg &= ~IXGBE_DPMCS_ARBDIS; in ixgbe_dcb_config_tx_desc_arbiter_82598()
190 reg |= IXGBE_DPMCS_TSOEF; in ixgbe_dcb_config_tx_desc_arbiter_82598()
193 reg |= (0x4 << IXGBE_DPMCS_MTSOS_SHIFT); in ixgbe_dcb_config_tx_desc_arbiter_82598()
195 IXGBE_WRITE_REG(hw, IXGBE_DPMCS, reg); in ixgbe_dcb_config_tx_desc_arbiter_82598()
200 reg = max_credits << IXGBE_TDTQ2TCCR_MCL_SHIFT; in ixgbe_dcb_config_tx_desc_arbiter_82598()
201 reg |= refill[i]; in ixgbe_dcb_config_tx_desc_arbiter_82598()
202 reg |= (u32)(bwg_id[i]) << IXGBE_TDTQ2TCCR_BWG_SHIFT; in ixgbe_dcb_config_tx_desc_arbiter_82598()
205 reg |= IXGBE_TDTQ2TCCR_GSP; in ixgbe_dcb_config_tx_desc_arbiter_82598()
208 reg |= IXGBE_TDTQ2TCCR_LSP; in ixgbe_dcb_config_tx_desc_arbiter_82598()
210 IXGBE_WRITE_REG(hw, IXGBE_TDTQ2TCCR(i), reg); in ixgbe_dcb_config_tx_desc_arbiter_82598()
230 u32 reg; in ixgbe_dcb_config_tx_data_arbiter_82598() local
233 reg = IXGBE_READ_REG(hw, IXGBE_PDPMCS); in ixgbe_dcb_config_tx_data_arbiter_82598()
235 reg &= ~IXGBE_PDPMCS_ARBDIS; in ixgbe_dcb_config_tx_data_arbiter_82598()
237 reg |= (IXGBE_PDPMCS_TPPAC | IXGBE_PDPMCS_TRM); in ixgbe_dcb_config_tx_data_arbiter_82598()
239 IXGBE_WRITE_REG(hw, IXGBE_PDPMCS, reg); in ixgbe_dcb_config_tx_data_arbiter_82598()
243 reg = refill[i]; in ixgbe_dcb_config_tx_data_arbiter_82598()
244 reg |= (u32)(max[i]) << IXGBE_TDPT2TCCR_MCL_SHIFT; in ixgbe_dcb_config_tx_data_arbiter_82598()
245 reg |= (u32)(bwg_id[i]) << IXGBE_TDPT2TCCR_BWG_SHIFT; in ixgbe_dcb_config_tx_data_arbiter_82598()
248 reg |= IXGBE_TDPT2TCCR_GSP; in ixgbe_dcb_config_tx_data_arbiter_82598()
251 reg |= IXGBE_TDPT2TCCR_LSP; in ixgbe_dcb_config_tx_data_arbiter_82598()
253 IXGBE_WRITE_REG(hw, IXGBE_TDPT2TCCR(i), reg); in ixgbe_dcb_config_tx_data_arbiter_82598()
257 reg = IXGBE_READ_REG(hw, IXGBE_DTXCTL); in ixgbe_dcb_config_tx_data_arbiter_82598()
258 reg |= IXGBE_DTXCTL_ENDBUBD; in ixgbe_dcb_config_tx_data_arbiter_82598()
259 IXGBE_WRITE_REG(hw, IXGBE_DTXCTL, reg); in ixgbe_dcb_config_tx_data_arbiter_82598()
273 u32 fcrtl, reg; in ixgbe_dcb_config_pfc_82598() local
277 reg = IXGBE_READ_REG(hw, IXGBE_RMCS); in ixgbe_dcb_config_pfc_82598()
278 reg &= ~IXGBE_RMCS_TFCE_802_3X; in ixgbe_dcb_config_pfc_82598()
279 reg |= IXGBE_RMCS_TFCE_PRIORITY; in ixgbe_dcb_config_pfc_82598()
280 IXGBE_WRITE_REG(hw, IXGBE_RMCS, reg); in ixgbe_dcb_config_pfc_82598()
283 reg = IXGBE_READ_REG(hw, IXGBE_FCTRL); in ixgbe_dcb_config_pfc_82598()
284 reg &= ~(IXGBE_FCTRL_RPFCE | IXGBE_FCTRL_RFCE); in ixgbe_dcb_config_pfc_82598()
287 reg |= IXGBE_FCTRL_RPFCE; in ixgbe_dcb_config_pfc_82598()
289 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, reg); in ixgbe_dcb_config_pfc_82598()
300 reg = (hw->fc.high_water[i] << 10) | IXGBE_FCRTH_FCEN; in ixgbe_dcb_config_pfc_82598()
302 IXGBE_WRITE_REG(hw, IXGBE_FCRTH(i), reg); in ixgbe_dcb_config_pfc_82598()
306 reg = hw->fc.pause_time | (hw->fc.pause_time << 16); in ixgbe_dcb_config_pfc_82598()
308 IXGBE_WRITE_REG(hw, IXGBE_FCTTV(i), reg); in ixgbe_dcb_config_pfc_82598()
325 u32 reg = 0; in ixgbe_dcb_config_tc_stats_82598() local
331 reg = IXGBE_READ_REG(hw, IXGBE_RQSMR(i)); in ixgbe_dcb_config_tc_stats_82598()
332 reg |= ((0x1010101) * j); in ixgbe_dcb_config_tc_stats_82598()
333 IXGBE_WRITE_REG(hw, IXGBE_RQSMR(i), reg); in ixgbe_dcb_config_tc_stats_82598()
334 reg = IXGBE_READ_REG(hw, IXGBE_RQSMR(i + 1)); in ixgbe_dcb_config_tc_stats_82598()
335 reg |= ((0x1010101) * j); in ixgbe_dcb_config_tc_stats_82598()
336 IXGBE_WRITE_REG(hw, IXGBE_RQSMR(i + 1), reg); in ixgbe_dcb_config_tc_stats_82598()
340 reg = IXGBE_READ_REG(hw, IXGBE_TQSMR(i)); in ixgbe_dcb_config_tc_stats_82598()
341 reg |= ((0x1010101) * i); in ixgbe_dcb_config_tc_stats_82598()
342 IXGBE_WRITE_REG(hw, IXGBE_TQSMR(i), reg); in ixgbe_dcb_config_tc_stats_82598()