Lines Matching refs:i40e_hmc_obj_txq
709 {I40E_HMC_STORE(i40e_hmc_obj_txq, head), 13, 0 },
710 {I40E_HMC_STORE(i40e_hmc_obj_txq, new_context), 1, 30 },
711 {I40E_HMC_STORE(i40e_hmc_obj_txq, base), 57, 32 },
712 {I40E_HMC_STORE(i40e_hmc_obj_txq, fc_ena), 1, 89 },
713 {I40E_HMC_STORE(i40e_hmc_obj_txq, timesync_ena), 1, 90 },
714 {I40E_HMC_STORE(i40e_hmc_obj_txq, fd_ena), 1, 91 },
715 {I40E_HMC_STORE(i40e_hmc_obj_txq, alt_vlan_ena), 1, 92 },
716 {I40E_HMC_STORE(i40e_hmc_obj_txq, cpuid), 8, 96 },
718 {I40E_HMC_STORE(i40e_hmc_obj_txq, thead_wb), 13, 0 + 128 },
719 {I40E_HMC_STORE(i40e_hmc_obj_txq, head_wb_ena), 1, 32 + 128 },
720 {I40E_HMC_STORE(i40e_hmc_obj_txq, qlen), 13, 33 + 128 },
721 {I40E_HMC_STORE(i40e_hmc_obj_txq, tphrdesc_ena), 1, 46 + 128 },
722 {I40E_HMC_STORE(i40e_hmc_obj_txq, tphrpacket_ena), 1, 47 + 128 },
723 {I40E_HMC_STORE(i40e_hmc_obj_txq, tphwdesc_ena), 1, 48 + 128 },
724 {I40E_HMC_STORE(i40e_hmc_obj_txq, head_wb_addr), 64, 64 + 128 },
726 {I40E_HMC_STORE(i40e_hmc_obj_txq, crc), 32, 0 + (7 * 128) },
727 {I40E_HMC_STORE(i40e_hmc_obj_txq, rdylist), 10, 84 + (7 * 128) },
728 {I40E_HMC_STORE(i40e_hmc_obj_txq, rdylist_act), 1, 94 + (7 * 128) },
1302 struct i40e_hmc_obj_txq *s) in i40e_get_lan_tx_queue_context()
1341 struct i40e_hmc_obj_txq *s) in i40e_set_lan_tx_queue_context()