Lines Matching refs:bits
55 page_hdl.bits.handle = (uint32_t)page_handle; in hpi_rxdma_cfg_logical_page_handle()
71 while ((count--) && (cfg.bits.qst == 0)) { in hpi_rxdma_cfg_rdc_wait_for_qst()
76 if (cfg.bits.qst == 0) in hpi_rxdma_cfg_rdc_wait_for_qst()
100 cfg.bits.enable = 1; in hpi_rxdma_cfg_rdc_ctl()
106 while ((count--) && (cfg.bits.qst == 1)) { in hpi_rxdma_cfg_rdc_ctl()
110 if (cfg.bits.qst == 1) { in hpi_rxdma_cfg_rdc_ctl()
117 cfg.bits.enable = 0; in hpi_rxdma_cfg_rdc_ctl()
133 cfg.bits.reset = 1; in hpi_rxdma_cfg_rdc_ctl()
138 while ((count--) && (cfg.bits.qst == 0)) { in hpi_rxdma_cfg_rdc_ctl()
191 rcr_cfgb.bits.timeout = (uint8_t)param; in hpi_rxdma_cfg_rdc_rcr_ctl()
192 rcr_cfgb.bits.entout = 1; in hpi_rxdma_cfg_rdc_rcr_ctl()
196 rcr_cfgb.bits.pthres = param; in hpi_rxdma_cfg_rdc_rcr_ctl()
200 rcr_cfgb.bits.entout = 0; in hpi_rxdma_cfg_rdc_rcr_ctl()
257 cfg1.bits.mbaddr_h = (rdc_desc_cfg->mbox_addr >> 32) & 0xfff; in hpi_rxdma_cfg_rdc_ring()
258 cfg2.bits.mbaddr_l = ((rdc_desc_cfg->mbox_addr & in hpi_rxdma_cfg_rdc_ring()
272 cfg2.bits.full_hdr = 1; in hpi_rxdma_cfg_rdc_ring()
275 cfg2.bits.offset = rdc_desc_cfg->offset; in hpi_rxdma_cfg_rdc_ring()
277 cfg2.bits.offset = SW_OFFSET_NO_OFFSET; in hpi_rxdma_cfg_rdc_ring()
285 page_handle.bits.handle = (rdc_desc_cfg->rbr_addr >> 44) && 0xfffff; in hpi_rxdma_cfg_rdc_ring()
303 cfga.bits.len = rdc_desc_cfg->rbr_len >> 6; in hpi_rxdma_cfg_rdc_ring()
306 cfga.value, cfga.bits.len, rdc_desc_cfg->rbr_len)); in hpi_rxdma_cfg_rdc_ring()
313 cfgb.bits.bksize = RBR_BKSIZE_4K; in hpi_rxdma_cfg_rdc_ring()
315 cfgb.bits.bksize = RBR_BKSIZE_8K; in hpi_rxdma_cfg_rdc_ring()
328 cfgb.bits.bufsz0 = RBR_BUFSZ0_256B; in hpi_rxdma_cfg_rdc_ring()
330 cfgb.bits.bufsz0 = RBR_BUFSZ0_512B; in hpi_rxdma_cfg_rdc_ring()
332 cfgb.bits.bufsz0 = RBR_BUFSZ0_1K; in hpi_rxdma_cfg_rdc_ring()
340 cfgb.bits.vld0 = 1; in hpi_rxdma_cfg_rdc_ring()
342 cfgb.bits.vld0 = 0; in hpi_rxdma_cfg_rdc_ring()
350 cfgb.bits.bufsz1 = RBR_BUFSZ1_1K; in hpi_rxdma_cfg_rdc_ring()
352 cfgb.bits.bufsz1 = RBR_BUFSZ1_2K; in hpi_rxdma_cfg_rdc_ring()
360 cfgb.bits.vld1 = 1; in hpi_rxdma_cfg_rdc_ring()
362 cfgb.bits.vld1 = 0; in hpi_rxdma_cfg_rdc_ring()
370 cfgb.bits.bufsz2 = RBR_BUFSZ2_2K; in hpi_rxdma_cfg_rdc_ring()
372 cfgb.bits.bufsz2 = RBR_BUFSZ2_4K; in hpi_rxdma_cfg_rdc_ring()
380 cfgb.bits.vld2 = 1; in hpi_rxdma_cfg_rdc_ring()
382 cfgb.bits.vld2 = 0; in hpi_rxdma_cfg_rdc_ring()
404 rcr_cfga.bits.len = rdc_desc_cfg->rcr_len >> 5; in hpi_rxdma_cfg_rdc_ring()
411 rcr_cfgb.bits.timeout = rdc_desc_cfg->rcr_timeout; in hpi_rxdma_cfg_rdc_ring()
412 rcr_cfgb.bits.entout = 1; in hpi_rxdma_cfg_rdc_ring()
418 rcr_cfgb.bits.entout = 0; in hpi_rxdma_cfg_rdc_ring()
421 rcr_cfgb.bits.entout = 0; in hpi_rxdma_cfg_rdc_ring()
426 rcr_cfgb.bits.pthres = rdc_desc_cfg->rcr_threshold; in hpi_rxdma_cfg_rdc_ring()
431 rcr_cfgb.bits.pthres = 1; in hpi_rxdma_cfg_rdc_ring()
475 clk_div.bits.count = count; in hpi_rxdma_cfg_clock_div_set()
515 *rcr_qlen = stats.bits.qlen; in hpi_rxdma_rdc_rcr_qlen_get()
518 rdc, *rcr_qlen, stats.bits.qlen)); in hpi_rxdma_rdc_rcr_qlen_get()
534 cs.bits.rbr_empty = 1; in hpi_rxdma_channel_rbr_empty_clear()