Lines Matching refs:ops
209 ret_val = hw->phy.ops.read_reg_locked(hw, PHY_ID1, &phy_reg); in e1000_phy_is_accessible_pchlan()
214 ret_val = hw->phy.ops.read_reg_locked(hw, PHY_ID2, &phy_reg); in e1000_phy_is_accessible_pchlan()
236 hw->phy.ops.release(hw); in e1000_phy_is_accessible_pchlan()
240 hw->phy.ops.acquire(hw); in e1000_phy_is_accessible_pchlan()
251 hw->phy.ops.read_reg_locked(hw, CV_SMB_CTRL, &phy_reg); in e1000_phy_is_accessible_pchlan()
253 hw->phy.ops.write_reg_locked(hw, CV_SMB_CTRL, phy_reg); in e1000_phy_is_accessible_pchlan()
334 ret_val = hw->phy.ops.acquire(hw); in e1000_init_phy_workarounds_pchlan()
383 if (hw->phy.ops.check_reset_block(hw)) { in e1000_init_phy_workarounds_pchlan()
412 hw->phy.ops.release(hw); in e1000_init_phy_workarounds_pchlan()
416 if (hw->phy.ops.check_reset_block(hw)) { in e1000_init_phy_workarounds_pchlan()
436 ret_val = hw->phy.ops.check_reset_block(hw); in e1000_init_phy_workarounds_pchlan()
468 phy->ops.acquire = e1000_acquire_swflag_ich8lan; in e1000_init_phy_params_pchlan()
469 phy->ops.check_reset_block = e1000_check_reset_block_ich8lan; in e1000_init_phy_params_pchlan()
470 phy->ops.get_cfg_done = e1000_get_cfg_done_ich8lan; in e1000_init_phy_params_pchlan()
471 phy->ops.set_page = e1000_set_page_igp; in e1000_init_phy_params_pchlan()
472 phy->ops.read_reg = e1000_read_phy_reg_hv; in e1000_init_phy_params_pchlan()
473 phy->ops.read_reg_locked = e1000_read_phy_reg_hv_locked; in e1000_init_phy_params_pchlan()
474 phy->ops.read_reg_page = e1000_read_phy_reg_page_hv; in e1000_init_phy_params_pchlan()
475 phy->ops.release = e1000_release_swflag_ich8lan; in e1000_init_phy_params_pchlan()
476 phy->ops.reset = e1000_phy_hw_reset_ich8lan; in e1000_init_phy_params_pchlan()
477 phy->ops.set_d0_lplu_state = e1000_set_lplu_state_pchlan; in e1000_init_phy_params_pchlan()
478 phy->ops.set_d3_lplu_state = e1000_set_lplu_state_pchlan; in e1000_init_phy_params_pchlan()
479 phy->ops.write_reg = e1000_write_phy_reg_hv; in e1000_init_phy_params_pchlan()
480 phy->ops.write_reg_locked = e1000_write_phy_reg_hv_locked; in e1000_init_phy_params_pchlan()
481 phy->ops.write_reg_page = e1000_write_phy_reg_page_hv; in e1000_init_phy_params_pchlan()
482 phy->ops.power_up = e1000_power_up_phy_copper; in e1000_init_phy_params_pchlan()
483 phy->ops.power_down = e1000_power_down_phy_copper_ich8lan; in e1000_init_phy_params_pchlan()
530 phy->ops.check_polarity = e1000_check_polarity_82577; in e1000_init_phy_params_pchlan()
531 phy->ops.force_speed_duplex = in e1000_init_phy_params_pchlan()
533 phy->ops.get_cable_length = e1000_get_cable_length_82577; in e1000_init_phy_params_pchlan()
534 phy->ops.get_info = e1000_get_phy_info_82577; in e1000_init_phy_params_pchlan()
535 phy->ops.commit = e1000_phy_sw_reset_generic; in e1000_init_phy_params_pchlan()
538 phy->ops.check_polarity = e1000_check_polarity_m88; in e1000_init_phy_params_pchlan()
539 phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_m88; in e1000_init_phy_params_pchlan()
540 phy->ops.get_cable_length = e1000_get_cable_length_m88; in e1000_init_phy_params_pchlan()
541 phy->ops.get_info = e1000_get_phy_info_m88; in e1000_init_phy_params_pchlan()
568 phy->ops.acquire = e1000_acquire_swflag_ich8lan; in e1000_init_phy_params_ich8lan()
569 phy->ops.check_reset_block = e1000_check_reset_block_ich8lan; in e1000_init_phy_params_ich8lan()
570 phy->ops.get_cable_length = e1000_get_cable_length_igp_2; in e1000_init_phy_params_ich8lan()
571 phy->ops.get_cfg_done = e1000_get_cfg_done_ich8lan; in e1000_init_phy_params_ich8lan()
572 phy->ops.read_reg = e1000_read_phy_reg_igp; in e1000_init_phy_params_ich8lan()
573 phy->ops.release = e1000_release_swflag_ich8lan; in e1000_init_phy_params_ich8lan()
574 phy->ops.reset = e1000_phy_hw_reset_ich8lan; in e1000_init_phy_params_ich8lan()
575 phy->ops.set_d0_lplu_state = e1000_set_d0_lplu_state_ich8lan; in e1000_init_phy_params_ich8lan()
576 phy->ops.set_d3_lplu_state = e1000_set_d3_lplu_state_ich8lan; in e1000_init_phy_params_ich8lan()
577 phy->ops.write_reg = e1000_write_phy_reg_igp; in e1000_init_phy_params_ich8lan()
578 phy->ops.power_up = e1000_power_up_phy_copper; in e1000_init_phy_params_ich8lan()
579 phy->ops.power_down = e1000_power_down_phy_copper_ich8lan; in e1000_init_phy_params_ich8lan()
586 phy->ops.write_reg = e1000_write_phy_reg_bm; in e1000_init_phy_params_ich8lan()
587 phy->ops.read_reg = e1000_read_phy_reg_bm; in e1000_init_phy_params_ich8lan()
609 phy->ops.read_reg_locked = e1000_read_phy_reg_igp_locked; in e1000_init_phy_params_ich8lan()
610 phy->ops.write_reg_locked = e1000_write_phy_reg_igp_locked; in e1000_init_phy_params_ich8lan()
611 phy->ops.get_info = e1000_get_phy_info_igp; in e1000_init_phy_params_ich8lan()
612 phy->ops.check_polarity = e1000_check_polarity_igp; in e1000_init_phy_params_ich8lan()
613 phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_igp; in e1000_init_phy_params_ich8lan()
620 phy->ops.get_info = e1000_get_phy_info_ife; in e1000_init_phy_params_ich8lan()
621 phy->ops.check_polarity = e1000_check_polarity_ife; in e1000_init_phy_params_ich8lan()
622 phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_ife; in e1000_init_phy_params_ich8lan()
627 phy->ops.read_reg = e1000_read_phy_reg_bm; in e1000_init_phy_params_ich8lan()
628 phy->ops.write_reg = e1000_write_phy_reg_bm; in e1000_init_phy_params_ich8lan()
629 phy->ops.commit = e1000_phy_sw_reset_generic; in e1000_init_phy_params_ich8lan()
630 phy->ops.get_info = e1000_get_phy_info_m88; in e1000_init_phy_params_ich8lan()
631 phy->ops.check_polarity = e1000_check_polarity_m88; in e1000_init_phy_params_ich8lan()
632 phy->ops.force_speed_duplex = e1000_phy_force_speed_duplex_m88; in e1000_init_phy_params_ich8lan()
719 nvm->ops.acquire = e1000_acquire_nvm_ich8lan; in e1000_init_nvm_params_ich8lan()
720 nvm->ops.release = e1000_release_nvm_ich8lan; in e1000_init_nvm_params_ich8lan()
722 nvm->ops.read = e1000_read_nvm_spt; in e1000_init_nvm_params_ich8lan()
723 nvm->ops.update = e1000_update_nvm_checksum_spt; in e1000_init_nvm_params_ich8lan()
725 nvm->ops.read = e1000_read_nvm_ich8lan; in e1000_init_nvm_params_ich8lan()
726 nvm->ops.update = e1000_update_nvm_checksum_ich8lan; in e1000_init_nvm_params_ich8lan()
728 nvm->ops.valid_led_default = e1000_valid_led_default_ich8lan; in e1000_init_nvm_params_ich8lan()
729 nvm->ops.validate = e1000_validate_nvm_checksum_ich8lan; in e1000_init_nvm_params_ich8lan()
730 nvm->ops.write = e1000_write_nvm_ich8lan; in e1000_init_nvm_params_ich8lan()
769 mac->ops.get_bus_info = e1000_get_bus_info_ich8lan; in e1000_init_mac_params_ich8lan()
771 mac->ops.set_lan_id = e1000_set_lan_id_single_port; in e1000_init_mac_params_ich8lan()
773 mac->ops.reset_hw = e1000_reset_hw_ich8lan; in e1000_init_mac_params_ich8lan()
775 mac->ops.init_hw = e1000_init_hw_ich8lan; in e1000_init_mac_params_ich8lan()
777 mac->ops.setup_link = e1000_setup_link_ich8lan; in e1000_init_mac_params_ich8lan()
779 mac->ops.setup_physical_interface = e1000_setup_copper_link_ich8lan; in e1000_init_mac_params_ich8lan()
781 mac->ops.check_for_link = e1000_check_for_copper_link_ich8lan; in e1000_init_mac_params_ich8lan()
783 mac->ops.get_link_up_info = e1000_get_link_up_info_ich8lan; in e1000_init_mac_params_ich8lan()
785 mac->ops.update_mc_addr_list = e1000_update_mc_addr_list_generic; in e1000_init_mac_params_ich8lan()
787 mac->ops.clear_hw_cntrs = e1000_clear_hw_cntrs_ich8lan; in e1000_init_mac_params_ich8lan()
795 mac->ops.check_mng_mode = e1000_check_mng_mode_ich8lan; in e1000_init_mac_params_ich8lan()
797 mac->ops.id_led_init = e1000_id_led_init_generic; in e1000_init_mac_params_ich8lan()
799 mac->ops.blink_led = e1000_blink_led_generic; in e1000_init_mac_params_ich8lan()
801 mac->ops.setup_led = e1000_setup_led_generic; in e1000_init_mac_params_ich8lan()
803 mac->ops.cleanup_led = e1000_cleanup_led_ich8lan; in e1000_init_mac_params_ich8lan()
805 mac->ops.led_on = e1000_led_on_ich8lan; in e1000_init_mac_params_ich8lan()
806 mac->ops.led_off = e1000_led_off_ich8lan; in e1000_init_mac_params_ich8lan()
810 mac->ops.rar_set = e1000_rar_set_pch2lan; in e1000_init_mac_params_ich8lan()
824 mac->ops.update_mc_addr_list = in e1000_init_mac_params_ich8lan()
829 mac->ops.check_mng_mode = e1000_check_mng_mode_pchlan; in e1000_init_mac_params_ich8lan()
831 mac->ops.id_led_init = e1000_id_led_init_pchlan; in e1000_init_mac_params_ich8lan()
833 mac->ops.setup_led = e1000_setup_led_pchlan; in e1000_init_mac_params_ich8lan()
835 mac->ops.cleanup_led = e1000_cleanup_led_pchlan; in e1000_init_mac_params_ich8lan()
837 mac->ops.led_on = e1000_led_on_pchlan; in e1000_init_mac_params_ich8lan()
838 mac->ops.led_off = e1000_led_off_pchlan; in e1000_init_mac_params_ich8lan()
846 mac->ops.rar_set = e1000_rar_set_pch_lpt; in e1000_init_mac_params_ich8lan()
847 mac->ops.setup_physical_interface = e1000_setup_copper_link_pch_lpt; in e1000_init_mac_params_ich8lan()
848 mac->ops.set_obff_timer = e1000_set_obff_timer_pch_lpt; in e1000_init_mac_params_ich8lan()
874 ret_val = hw->phy.ops.write_reg_locked(hw, I82579_EMI_ADDR, address); in __e1000_access_emi_reg_locked()
879 ret_val = hw->phy.ops.read_reg_locked(hw, I82579_EMI_DATA, in __e1000_access_emi_reg_locked()
882 ret_val = hw->phy.ops.write_reg_locked(hw, I82579_EMI_DATA, in __e1000_access_emi_reg_locked()
955 ret_val = hw->phy.ops.acquire(hw); in e1000_set_eee_pchlan()
959 ret_val = hw->phy.ops.read_reg_locked(hw, I82579_LPI_CTRL, &lpi_ctrl); in e1000_set_eee_pchlan()
986 hw->phy.ops.read_reg_locked(hw, PHY_LP_ABILITY, &data); in e1000_set_eee_pchlan()
1015 ret_val = hw->phy.ops.write_reg_locked(hw, I82579_LPI_CTRL, lpi_ctrl); in e1000_set_eee_pchlan()
1017 hw->phy.ops.release(hw); in e1000_set_eee_pchlan()
1041 ret_val = hw->phy.ops.acquire(hw); in e1000_k1_workaround_lpt_lp()
1069 hw->phy.ops.release(hw); in e1000_k1_workaround_lpt_lp()
1079 ret_val = hw->phy.ops.read_reg(hw, I217_INBAND_CTRL, ®); in e1000_k1_workaround_lpt_lp()
1101 ret_val = hw->phy.ops.write_reg(hw, I217_INBAND_CTRL, reg); in e1000_k1_workaround_lpt_lp()
1164 hw->mac.ops.get_link_up_info(hw, &speed, &duplex); in e1000_platform_pm_pch_lpt()
1329 ret_val = hw->phy.ops.acquire(hw); in e1000_enable_ulp_lpt_lp()
1405 hw->phy.ops.release(hw); in e1000_enable_ulp_lpt_lp()
1480 ret_val = hw->phy.ops.acquire(hw); in e1000_disable_ulp_lpt_lp()
1546 hw->phy.ops.release(hw); in e1000_disable_ulp_lpt_lp()
1548 hw->phy.ops.reset(hw); in e1000_disable_ulp_lpt_lp()
1627 ret_val = hw->phy.ops.acquire(hw); in e1000_check_for_copper_link_ich8lan()
1640 hw->phy.ops.read_reg_locked(hw, I217_PLL_CLOCK_GATE_REG, in e1000_check_for_copper_link_ich8lan()
1647 hw->phy.ops.write_reg_locked(hw, in e1000_check_for_copper_link_ich8lan()
1652 hw->phy.ops.read_reg_locked(hw, HV_PM_CTRL, in e1000_check_for_copper_link_ich8lan()
1657 hw->phy.ops.write_reg_locked(hw, HV_PM_CTRL, in e1000_check_for_copper_link_ich8lan()
1661 hw->phy.ops.release(hw); in e1000_check_for_copper_link_ich8lan()
1671 ret_val = hw->phy.ops.acquire(hw); in e1000_check_for_copper_link_ich8lan()
1675 ret_val = hw->phy.ops.read_reg_locked(hw, in e1000_check_for_copper_link_ich8lan()
1679 hw->phy.ops.release(hw); in e1000_check_for_copper_link_ich8lan()
1688 hw->phy.ops.write_reg_locked(hw, in e1000_check_for_copper_link_ich8lan()
1691 hw->phy.ops.release(hw); in e1000_check_for_copper_link_ich8lan()
1695 ret_val = hw->phy.ops.acquire(hw); in e1000_check_for_copper_link_ich8lan()
1699 ret_val = hw->phy.ops.write_reg_locked(hw, in e1000_check_for_copper_link_ich8lan()
1702 hw->phy.ops.release(hw); in e1000_check_for_copper_link_ich8lan()
1783 hw->phy.ops.read_reg(hw, HV_KMRN_FIFO_CTRLSTA, &phy_reg); in e1000_check_for_copper_link_ich8lan()
1790 hw->phy.ops.write_reg(hw, HV_KMRN_FIFO_CTRLSTA, phy_reg); in e1000_check_for_copper_link_ich8lan()
1818 mac->ops.config_collision_dist(hw); in e1000_check_for_copper_link_ich8lan()
1842 hw->mac.ops.init_params = e1000_init_mac_params_ich8lan; in e1000_init_function_pointers_ich8lan()
1843 hw->nvm.ops.init_params = e1000_init_nvm_params_ich8lan; in e1000_init_function_pointers_ich8lan()
1848 hw->phy.ops.init_params = e1000_init_phy_params_ich8lan; in e1000_init_function_pointers_ich8lan()
1863 hw->phy.ops.init_params = e1000_init_phy_params_pchlan; in e1000_init_function_pointers_ich8lan()
2198 ret_val = hw->phy.ops.acquire(hw); in e1000_update_mc_addr_list_pch2lan()
2207 hw->phy.ops.write_reg_page(hw, BM_MTA(i), in e1000_update_mc_addr_list_pch2lan()
2210 hw->phy.ops.write_reg_page(hw, (BM_MTA(i) + 1), in e1000_update_mc_addr_list_pch2lan()
2218 hw->phy.ops.release(hw); in e1000_update_mc_addr_list_pch2lan()
2342 ret_val = hw->phy.ops.acquire(hw); in e1000_sw_lcd_config_ich8lan()
2392 ret_val = hw->nvm.ops.read(hw, (word_addr + i * 2), 1, in e1000_sw_lcd_config_ich8lan()
2397 ret_val = hw->nvm.ops.read(hw, (word_addr + i * 2 + 1), in e1000_sw_lcd_config_ich8lan()
2411 ret_val = phy->ops.write_reg_locked(hw, (u32)reg_addr, in e1000_sw_lcd_config_ich8lan()
2418 hw->phy.ops.release(hw); in e1000_sw_lcd_config_ich8lan()
2444 ret_val = hw->phy.ops.acquire(hw); in e1000_k1_gig_workaround_hv()
2451 ret_val = hw->phy.ops.read_reg_locked(hw, BM_CS_STATUS, in e1000_k1_gig_workaround_hv()
2467 ret_val = hw->phy.ops.read_reg_locked(hw, HV_M_STATUS, in e1000_k1_gig_workaround_hv()
2483 ret_val = hw->phy.ops.write_reg_locked(hw, PHY_REG(770, 19), in e1000_k1_gig_workaround_hv()
2490 ret_val = hw->phy.ops.write_reg_locked(hw, PHY_REG(770, 19), in e1000_k1_gig_workaround_hv()
2499 hw->phy.ops.release(hw); in e1000_k1_gig_workaround_hv()
2578 ret_val = hw->phy.ops.acquire(hw); in e1000_oem_bits_config_ich8lan()
2594 ret_val = hw->phy.ops.read_reg_locked(hw, HV_OEM_BITS, &oem_reg); in e1000_oem_bits_config_ich8lan()
2618 !hw->phy.ops.check_reset_block(hw)) in e1000_oem_bits_config_ich8lan()
2621 ret_val = hw->phy.ops.write_reg_locked(hw, HV_OEM_BITS, oem_reg); in e1000_oem_bits_config_ich8lan()
2624 hw->phy.ops.release(hw); in e1000_oem_bits_config_ich8lan()
2641 ret_val = hw->phy.ops.read_reg(hw, HV_KMRN_MODE_CTRL, &data); in e1000_set_mdio_slow_mode_hv()
2647 ret_val = hw->phy.ops.write_reg(hw, HV_KMRN_MODE_CTRL, data); in e1000_set_mdio_slow_mode_hv()
2677 ret_val = hw->phy.ops.write_reg(hw, PHY_REG(769, 25), 0x4431); in e1000_hv_phy_workarounds_ich8lan()
2682 ret_val = hw->phy.ops.write_reg(hw, HV_KMRN_FIFO_CTRLSTA, in e1000_hv_phy_workarounds_ich8lan()
2694 ret_val = hw->phy.ops.write_reg(hw, PHY_CONTROL, in e1000_hv_phy_workarounds_ich8lan()
2700 ret_val = hw->phy.ops.acquire(hw); in e1000_hv_phy_workarounds_ich8lan()
2706 hw->phy.ops.release(hw); in e1000_hv_phy_workarounds_ich8lan()
2718 ret_val = hw->phy.ops.acquire(hw); in e1000_hv_phy_workarounds_ich8lan()
2721 ret_val = hw->phy.ops.read_reg_locked(hw, BM_PORT_GEN_CFG, &phy_data); in e1000_hv_phy_workarounds_ich8lan()
2724 ret_val = hw->phy.ops.write_reg_locked(hw, BM_PORT_GEN_CFG, in e1000_hv_phy_workarounds_ich8lan()
2732 hw->phy.ops.release(hw); in e1000_hv_phy_workarounds_ich8lan()
2749 ret_val = hw->phy.ops.acquire(hw); in e1000_copy_rx_addrs_to_phy_ich8lan()
2759 hw->phy.ops.write_reg_page(hw, BM_RAR_L(i), in e1000_copy_rx_addrs_to_phy_ich8lan()
2761 hw->phy.ops.write_reg_page(hw, BM_RAR_M(i), in e1000_copy_rx_addrs_to_phy_ich8lan()
2765 hw->phy.ops.write_reg_page(hw, BM_RAR_H(i), in e1000_copy_rx_addrs_to_phy_ich8lan()
2767 hw->phy.ops.write_reg_page(hw, BM_RAR_CTRL(i), in e1000_copy_rx_addrs_to_phy_ich8lan()
2775 hw->phy.ops.release(hw); in e1000_copy_rx_addrs_to_phy_ich8lan()
2815 hw->phy.ops.read_reg(hw, PHY_REG(769, 20), &phy_reg); in e1000_lv_jumbo_workaround_ich8lan()
2816 ret_val = hw->phy.ops.write_reg(hw, PHY_REG(769, 20), in e1000_lv_jumbo_workaround_ich8lan()
2881 hw->phy.ops.read_reg(hw, PHY_REG(769, 23), &data); in e1000_lv_jumbo_workaround_ich8lan()
2884 ret_val = hw->phy.ops.write_reg(hw, PHY_REG(769, 23), data); in e1000_lv_jumbo_workaround_ich8lan()
2887 hw->phy.ops.read_reg(hw, PHY_REG(769, 16), &data); in e1000_lv_jumbo_workaround_ich8lan()
2889 ret_val = hw->phy.ops.write_reg(hw, PHY_REG(769, 16), data); in e1000_lv_jumbo_workaround_ich8lan()
2892 hw->phy.ops.read_reg(hw, PHY_REG(776, 20), &data); in e1000_lv_jumbo_workaround_ich8lan()
2895 ret_val = hw->phy.ops.write_reg(hw, PHY_REG(776, 20), data); in e1000_lv_jumbo_workaround_ich8lan()
2898 ret_val = hw->phy.ops.write_reg(hw, PHY_REG(776, 23), 0xF100); in e1000_lv_jumbo_workaround_ich8lan()
2901 hw->phy.ops.read_reg(hw, HV_PM_CTRL, &data); in e1000_lv_jumbo_workaround_ich8lan()
2902 ret_val = hw->phy.ops.write_reg(hw, HV_PM_CTRL, data | in e1000_lv_jumbo_workaround_ich8lan()
2940 hw->phy.ops.read_reg(hw, PHY_REG(769, 23), &data); in e1000_lv_jumbo_workaround_ich8lan()
2942 ret_val = hw->phy.ops.write_reg(hw, PHY_REG(769, 23), data); in e1000_lv_jumbo_workaround_ich8lan()
2945 hw->phy.ops.read_reg(hw, PHY_REG(769, 16), &data); in e1000_lv_jumbo_workaround_ich8lan()
2947 ret_val = hw->phy.ops.write_reg(hw, PHY_REG(769, 16), data); in e1000_lv_jumbo_workaround_ich8lan()
2950 hw->phy.ops.read_reg(hw, PHY_REG(776, 20), &data); in e1000_lv_jumbo_workaround_ich8lan()
2953 ret_val = hw->phy.ops.write_reg(hw, PHY_REG(776, 20), data); in e1000_lv_jumbo_workaround_ich8lan()
2956 ret_val = hw->phy.ops.write_reg(hw, PHY_REG(776, 23), 0x7E00); in e1000_lv_jumbo_workaround_ich8lan()
2959 hw->phy.ops.read_reg(hw, HV_PM_CTRL, &data); in e1000_lv_jumbo_workaround_ich8lan()
2960 ret_val = hw->phy.ops.write_reg(hw, HV_PM_CTRL, data & in e1000_lv_jumbo_workaround_ich8lan()
2967 return hw->phy.ops.write_reg(hw, PHY_REG(769, 20), phy_reg & in e1000_lv_jumbo_workaround_ich8lan()
2989 ret_val = hw->phy.ops.acquire(hw); in e1000_lv_phy_workarounds_ich8lan()
2999 hw->phy.ops.release(hw); in e1000_lv_phy_workarounds_ich8lan()
3022 ret_val = hw->phy.ops.read_reg(hw, HV_M_STATUS, &status_reg); in e1000_k1_workaround_lv()
3033 ret_val = hw->phy.ops.read_reg(hw, HV_PM_CTRL, in e1000_k1_workaround_lv()
3038 ret_val = hw->phy.ops.write_reg(hw, HV_PM_CTRL, in e1000_k1_workaround_lv()
3125 if (hw->phy.ops.check_reset_block(hw)) in e1000_post_phy_reset_ich8lan()
3149 hw->phy.ops.read_reg(hw, BM_PORT_GEN_CFG, ®); in e1000_post_phy_reset_ich8lan()
3151 hw->phy.ops.write_reg(hw, BM_PORT_GEN_CFG, reg); in e1000_post_phy_reset_ich8lan()
3171 ret_val = hw->phy.ops.acquire(hw); in e1000_post_phy_reset_ich8lan()
3177 hw->phy.ops.release(hw); in e1000_post_phy_reset_ich8lan()
3226 ret_val = hw->phy.ops.read_reg(hw, HV_OEM_BITS, &oem_reg); in e1000_set_lplu_state_pchlan()
3235 if (!hw->phy.ops.check_reset_block(hw)) in e1000_set_lplu_state_pchlan()
3238 return hw->phy.ops.write_reg(hw, HV_OEM_BITS, oem_reg); in e1000_set_lplu_state_pchlan()
3282 ret_val = phy->ops.read_reg(hw, in e1000_set_d0_lplu_state_ich8lan()
3288 ret_val = phy->ops.write_reg(hw, in e1000_set_d0_lplu_state_ich8lan()
3306 ret_val = phy->ops.read_reg(hw, in e1000_set_d0_lplu_state_ich8lan()
3313 ret_val = phy->ops.write_reg(hw, in e1000_set_d0_lplu_state_ich8lan()
3319 ret_val = phy->ops.read_reg(hw, in e1000_set_d0_lplu_state_ich8lan()
3326 ret_val = phy->ops.write_reg(hw, in e1000_set_d0_lplu_state_ich8lan()
3374 ret_val = phy->ops.read_reg(hw, in e1000_set_d3_lplu_state_ich8lan()
3381 ret_val = phy->ops.write_reg(hw, in e1000_set_d3_lplu_state_ich8lan()
3387 ret_val = phy->ops.read_reg(hw, in e1000_set_d3_lplu_state_ich8lan()
3394 ret_val = phy->ops.write_reg(hw, in e1000_set_d3_lplu_state_ich8lan()
3416 ret_val = phy->ops.read_reg(hw, in e1000_set_d3_lplu_state_ich8lan()
3423 ret_val = phy->ops.write_reg(hw, in e1000_set_d3_lplu_state_ich8lan()
3571 nvm->ops.acquire(hw); in e1000_read_nvm_spt()
3625 nvm->ops.release(hw); in e1000_read_nvm_spt()
3662 nvm->ops.acquire(hw); in e1000_read_nvm_ich8lan()
3687 nvm->ops.release(hw); in e1000_read_nvm_ich8lan()
4077 nvm->ops.acquire(hw); in e1000_write_nvm_ich8lan()
4084 nvm->ops.release(hw); in e1000_write_nvm_ich8lan()
4117 nvm->ops.acquire(hw); in e1000_update_nvm_checksum_spt()
4241 nvm->ops.release(hw); in e1000_update_nvm_checksum_spt()
4247 nvm->ops.reload(hw); in e1000_update_nvm_checksum_spt()
4286 nvm->ops.acquire(hw); in e1000_update_nvm_checksum_ich8lan()
4394 nvm->ops.release(hw); in e1000_update_nvm_checksum_ich8lan()
4400 nvm->ops.reload(hw); in e1000_update_nvm_checksum_ich8lan()
4454 ret_val = hw->nvm.ops.read(hw, word, 1, &data); in e1000_validate_nvm_checksum_ich8lan()
4460 ret_val = hw->nvm.ops.write(hw, word, 1, &data); in e1000_validate_nvm_checksum_ich8lan()
4463 ret_val = hw->nvm.ops.update(hw); in e1000_validate_nvm_checksum_ich8lan()
4882 ret_val = hw->nvm.ops.read(hw, NVM_ID_LED_SETTINGS, 1, data); in e1000_valid_led_default_ich8lan()
4918 ret_val = hw->nvm.ops.valid_led_default(hw, &data); in e1000_id_led_init_pchlan()
5053 if (!hw->phy.ops.check_reset_block(hw)) { in e1000_reset_hw_ich8lan()
5085 ret_val = hw->phy.ops.get_cfg_done(hw); in e1000_reset_hw_ich8lan()
5135 ret_val = mac->ops.id_led_init(hw); in e1000_init_hw_ich8lan()
5153 hw->phy.ops.read_reg(hw, BM_PORT_GEN_CFG, &i); in e1000_init_hw_ich8lan()
5155 hw->phy.ops.write_reg(hw, BM_PORT_GEN_CFG, i); in e1000_init_hw_ich8lan()
5162 ret_val = mac->ops.setup_link(hw); in e1000_init_hw_ich8lan()
5298 if (hw->phy.ops.check_reset_block(hw)) in e1000_setup_link_ich8lan()
5317 ret_val = hw->mac.ops.setup_physical_interface(hw); in e1000_setup_link_ich8lan()
5328 ret_val = hw->phy.ops.write_reg(hw, in e1000_setup_link_ich8lan()
5398 ret_val = hw->phy.ops.read_reg(hw, IFE_PHY_MDIX_CONTROL, in e1000_setup_copper_link_ich8lan()
5417 ret_val = hw->phy.ops.write_reg(hw, IFE_PHY_MDIX_CONTROL, in e1000_setup_copper_link_ich8lan()
5524 ret_val = hw->phy.ops.read_reg(hw, IGP3_KMRN_DIAG, &data); in e1000_kmrn_lock_loss_workaround_ich8lan()
5528 ret_val = hw->phy.ops.read_reg(hw, IGP3_KMRN_DIAG, &data); in e1000_kmrn_lock_loss_workaround_ich8lan()
5537 hw->phy.ops.reset(hw); in e1000_kmrn_lock_loss_workaround_ich8lan()
5616 hw->phy.ops.read_reg(hw, IGP3_VR_CTRL, &data); in e1000_igp3_phy_powerdown_workaround_ich8lan()
5618 hw->phy.ops.write_reg(hw, IGP3_VR_CTRL, in e1000_igp3_phy_powerdown_workaround_ich8lan()
5622 hw->phy.ops.read_reg(hw, IGP3_VR_CTRL, &data); in e1000_igp3_phy_powerdown_workaround_ich8lan()
5709 ret_val = hw->phy.ops.acquire(hw); in e1000_suspend_workarounds_ich8lan()
5736 hw->phy.ops.read_reg_locked(hw, in e1000_suspend_workarounds_ich8lan()
5740 hw->phy.ops.write_reg_locked(hw, in e1000_suspend_workarounds_ich8lan()
5756 hw->phy.ops.read_reg_locked(hw, I217_PROXY_CTRL, in e1000_suspend_workarounds_ich8lan()
5759 hw->phy.ops.write_reg_locked(hw, I217_PROXY_CTRL, in e1000_suspend_workarounds_ich8lan()
5765 hw->phy.ops.read_reg_locked(hw, I217_SxCTRL, &phy_reg); in e1000_suspend_workarounds_ich8lan()
5767 hw->phy.ops.write_reg_locked(hw, I217_SxCTRL, phy_reg); in e1000_suspend_workarounds_ich8lan()
5770 hw->phy.ops.read_reg_locked(hw, I217_MEMPWR, &phy_reg); in e1000_suspend_workarounds_ich8lan()
5772 hw->phy.ops.write_reg_locked(hw, I217_MEMPWR, phy_reg); in e1000_suspend_workarounds_ich8lan()
5778 hw->phy.ops.read_reg_locked(hw, I217_CGFREG, &phy_reg); in e1000_suspend_workarounds_ich8lan()
5780 hw->phy.ops.write_reg_locked(hw, I217_CGFREG, phy_reg); in e1000_suspend_workarounds_ich8lan()
5783 hw->phy.ops.release(hw); in e1000_suspend_workarounds_ich8lan()
5798 ret_val = hw->phy.ops.acquire(hw); in e1000_suspend_workarounds_ich8lan()
5802 hw->phy.ops.release(hw); in e1000_suspend_workarounds_ich8lan()
5840 ret_val = hw->phy.ops.acquire(hw); in e1000_resume_workarounds_pchlan()
5847 hw->phy.ops.read_reg_locked(hw, I217_LPI_GPIO_CTRL, &phy_reg); in e1000_resume_workarounds_pchlan()
5849 hw->phy.ops.write_reg_locked(hw, I217_LPI_GPIO_CTRL, phy_reg); in e1000_resume_workarounds_pchlan()
5856 ret_val = hw->phy.ops.read_reg_locked(hw, I217_MEMPWR, in e1000_resume_workarounds_pchlan()
5861 hw->phy.ops.write_reg_locked(hw, I217_MEMPWR, phy_reg); in e1000_resume_workarounds_pchlan()
5864 hw->phy.ops.write_reg_locked(hw, I217_PROXY_CTRL, 0); in e1000_resume_workarounds_pchlan()
5867 ret_val = hw->phy.ops.read_reg_locked(hw, I217_CGFREG, in e1000_resume_workarounds_pchlan()
5872 hw->phy.ops.write_reg_locked(hw, I217_CGFREG, phy_reg); in e1000_resume_workarounds_pchlan()
5876 hw->phy.ops.release(hw); in e1000_resume_workarounds_pchlan()
5893 return hw->phy.ops.write_reg(hw, IFE_PHY_SPECIAL_CONTROL_LED, in e1000_cleanup_led_ich8lan()
5911 return hw->phy.ops.write_reg(hw, IFE_PHY_SPECIAL_CONTROL_LED, in e1000_led_on_ich8lan()
5929 return hw->phy.ops.write_reg(hw, IFE_PHY_SPECIAL_CONTROL_LED, in e1000_led_off_ich8lan()
5946 return hw->phy.ops.write_reg(hw, HV_LED_CONFIG, in e1000_setup_led_pchlan()
5960 return hw->phy.ops.write_reg(hw, HV_LED_CONFIG, in e1000_cleanup_led_pchlan()
5993 return hw->phy.ops.write_reg(hw, HV_LED_CONFIG, data); in e1000_led_on_pchlan()
6025 return hw->phy.ops.write_reg(hw, HV_LED_CONFIG, data); in e1000_led_off_pchlan()
6099 if (!(hw->mac.ops.check_mng_mode(hw) || in e1000_power_down_phy_copper_ich8lan()
6100 hw->phy.ops.check_reset_block(hw))) in e1000_power_down_phy_copper_ich8lan()
6141 ret_val = hw->phy.ops.acquire(hw); in e1000_clear_hw_cntrs_ich8lan()
6144 ret_val = hw->phy.ops.set_page(hw, in e1000_clear_hw_cntrs_ich8lan()
6148 hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data); in e1000_clear_hw_cntrs_ich8lan()
6149 hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data); in e1000_clear_hw_cntrs_ich8lan()
6150 hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data); in e1000_clear_hw_cntrs_ich8lan()
6151 hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data); in e1000_clear_hw_cntrs_ich8lan()
6152 hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data); in e1000_clear_hw_cntrs_ich8lan()
6153 hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data); in e1000_clear_hw_cntrs_ich8lan()
6154 hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data); in e1000_clear_hw_cntrs_ich8lan()
6155 hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data); in e1000_clear_hw_cntrs_ich8lan()
6156 hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data); in e1000_clear_hw_cntrs_ich8lan()
6157 hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data); in e1000_clear_hw_cntrs_ich8lan()
6158 hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data); in e1000_clear_hw_cntrs_ich8lan()
6159 hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data); in e1000_clear_hw_cntrs_ich8lan()
6160 hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data); in e1000_clear_hw_cntrs_ich8lan()
6161 hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data); in e1000_clear_hw_cntrs_ich8lan()
6163 hw->phy.ops.release(hw); in e1000_clear_hw_cntrs_ich8lan()