Lines Matching refs:ret_val
167 s32 ret_val = E1000_SUCCESS; in e1000_init_phy_params_82575() local
228 ret_val = e1000_get_phy_id_82575(hw); in e1000_init_phy_params_82575()
257 ret_val = phy->ops.write_reg(hw, in e1000_init_phy_params_82575()
260 if (ret_val) in e1000_init_phy_params_82575()
263 ret_val = phy->ops.read_reg(hw, in e1000_init_phy_params_82575()
266 if (ret_val) in e1000_init_phy_params_82575()
277 ret_val = e1000_initialize_M88E1512_phy(hw); in e1000_init_phy_params_82575()
278 if (ret_val) in e1000_init_phy_params_82575()
282 ret_val = e1000_initialize_M88E1543_phy(hw); in e1000_init_phy_params_82575()
283 if (ret_val) in e1000_init_phy_params_82575()
318 ret_val = -E1000_ERR_PHY; in e1000_init_phy_params_82575()
323 return ret_val; in e1000_init_phy_params_82575()
600 s32 ret_val = -E1000_ERR_PARAM; in e1000_read_phy_reg_sgmii_82575() local
609 ret_val = hw->phy.ops.acquire(hw); in e1000_read_phy_reg_sgmii_82575()
610 if (ret_val) in e1000_read_phy_reg_sgmii_82575()
613 ret_val = e1000_read_phy_reg_i2c(hw, offset, data); in e1000_read_phy_reg_sgmii_82575()
618 return ret_val; in e1000_read_phy_reg_sgmii_82575()
633 s32 ret_val = -E1000_ERR_PARAM; in e1000_write_phy_reg_sgmii_82575() local
642 ret_val = hw->phy.ops.acquire(hw); in e1000_write_phy_reg_sgmii_82575()
643 if (ret_val) in e1000_write_phy_reg_sgmii_82575()
646 ret_val = e1000_write_phy_reg_i2c(hw, offset, data); in e1000_write_phy_reg_sgmii_82575()
651 return ret_val; in e1000_write_phy_reg_sgmii_82575()
664 s32 ret_val = E1000_SUCCESS; in e1000_get_phy_id_82575() local
684 ret_val = e1000_get_phy_id(hw); in e1000_get_phy_id_82575()
706 ret_val = -E1000_ERR_PHY; in e1000_get_phy_id_82575()
710 ret_val = e1000_get_phy_id(hw); in e1000_get_phy_id_82575()
726 ret_val = e1000_read_phy_reg_sgmii_82575(hw, PHY_ID1, &phy_id); in e1000_get_phy_id_82575()
727 if (ret_val == E1000_SUCCESS) { in e1000_get_phy_id_82575()
745 ret_val = -E1000_ERR_PHY; in e1000_get_phy_id_82575()
747 ret_val = e1000_get_phy_id(hw); in e1000_get_phy_id_82575()
754 return ret_val; in e1000_get_phy_id_82575()
765 s32 ret_val = E1000_SUCCESS; in e1000_phy_hw_reset_sgmii_82575() local
784 ret_val = hw->phy.ops.write_reg(hw, 0x1B, 0x8084); in e1000_phy_hw_reset_sgmii_82575()
785 if (ret_val) in e1000_phy_hw_reset_sgmii_82575()
788 ret_val = hw->phy.ops.commit(hw); in e1000_phy_hw_reset_sgmii_82575()
789 if (ret_val) in e1000_phy_hw_reset_sgmii_82575()
793 ret_val = e1000_initialize_M88E1512_phy(hw); in e1000_phy_hw_reset_sgmii_82575()
795 return ret_val; in e1000_phy_hw_reset_sgmii_82575()
814 s32 ret_val = E1000_SUCCESS; in e1000_set_d0_lplu_state_82575() local
822 ret_val = phy->ops.read_reg(hw, IGP02E1000_PHY_POWER_MGMT, &data); in e1000_set_d0_lplu_state_82575()
823 if (ret_val) in e1000_set_d0_lplu_state_82575()
828 ret_val = phy->ops.write_reg(hw, IGP02E1000_PHY_POWER_MGMT, in e1000_set_d0_lplu_state_82575()
830 if (ret_val) in e1000_set_d0_lplu_state_82575()
834 ret_val = phy->ops.read_reg(hw, IGP01E1000_PHY_PORT_CONFIG, in e1000_set_d0_lplu_state_82575()
837 ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_PORT_CONFIG, in e1000_set_d0_lplu_state_82575()
839 if (ret_val) in e1000_set_d0_lplu_state_82575()
843 ret_val = phy->ops.write_reg(hw, IGP02E1000_PHY_POWER_MGMT, in e1000_set_d0_lplu_state_82575()
852 ret_val = phy->ops.read_reg(hw, in e1000_set_d0_lplu_state_82575()
855 if (ret_val) in e1000_set_d0_lplu_state_82575()
859 ret_val = phy->ops.write_reg(hw, in e1000_set_d0_lplu_state_82575()
862 if (ret_val) in e1000_set_d0_lplu_state_82575()
865 ret_val = phy->ops.read_reg(hw, in e1000_set_d0_lplu_state_82575()
868 if (ret_val) in e1000_set_d0_lplu_state_82575()
872 ret_val = phy->ops.write_reg(hw, in e1000_set_d0_lplu_state_82575()
875 if (ret_val) in e1000_set_d0_lplu_state_82575()
881 return ret_val; in e1000_set_d0_lplu_state_82575()
988 s32 ret_val = E1000_SUCCESS; in e1000_acquire_nvm_82575() local
992 ret_val = e1000_acquire_swfw_sync_82575(hw, E1000_SWFW_EEP_SM); in e1000_acquire_nvm_82575()
993 if (ret_val) in e1000_acquire_nvm_82575()
1021 ret_val = e1000_acquire_nvm_generic(hw); in e1000_acquire_nvm_82575()
1022 if (ret_val) in e1000_acquire_nvm_82575()
1026 return ret_val; in e1000_acquire_nvm_82575()
1058 s32 ret_val = E1000_SUCCESS; in e1000_acquire_swfw_sync_82575() local
1065 ret_val = -E1000_ERR_SWFW_SYNC; in e1000_acquire_swfw_sync_82575()
1084 ret_val = -E1000_ERR_SWFW_SYNC; in e1000_acquire_swfw_sync_82575()
1094 return ret_val; in e1000_acquire_swfw_sync_82575()
1174 s32 ret_val; in e1000_get_link_up_info_82575() local
1179 ret_val = e1000_get_pcs_speed_and_duplex_82575(hw, speed, in e1000_get_link_up_info_82575()
1182 ret_val = e1000_get_speed_and_duplex_copper_generic(hw, speed, in e1000_get_link_up_info_82575()
1185 return ret_val; in e1000_get_link_up_info_82575()
1197 s32 ret_val; in e1000_check_for_link_82575() local
1203 ret_val = e1000_get_pcs_speed_and_duplex_82575(hw, &speed, in e1000_check_for_link_82575()
1218 ret_val = e1000_config_fc_after_link_up_generic(hw); in e1000_check_for_link_82575()
1219 if (ret_val) in e1000_check_for_link_82575()
1222 ret_val = e1000_check_for_copper_link_generic(hw); in e1000_check_for_link_82575()
1225 return ret_val; in e1000_check_for_link_82575()
1237 s32 ret_val; in e1000_check_for_link_media_swap() local
1244 ret_val = phy->ops.write_reg(hw, E1000_M88E1112_PAGE_ADDR, 0); in e1000_check_for_link_media_swap()
1245 if (ret_val) in e1000_check_for_link_media_swap()
1246 return ret_val; in e1000_check_for_link_media_swap()
1248 ret_val = phy->ops.read_reg(hw, E1000_M88E1112_STATUS, &data); in e1000_check_for_link_media_swap()
1249 if (ret_val) in e1000_check_for_link_media_swap()
1250 return ret_val; in e1000_check_for_link_media_swap()
1256 ret_val = phy->ops.write_reg(hw, E1000_M88E1112_PAGE_ADDR, 1); in e1000_check_for_link_media_swap()
1257 if (ret_val) in e1000_check_for_link_media_swap()
1258 return ret_val; in e1000_check_for_link_media_swap()
1260 ret_val = phy->ops.read_reg(hw, E1000_M88E1112_STATUS, &data); in e1000_check_for_link_media_swap()
1261 if (ret_val) in e1000_check_for_link_media_swap()
1262 return ret_val; in e1000_check_for_link_media_swap()
1275 ret_val = phy->ops.write_reg(hw, E1000_M88E1112_PAGE_ADDR, 0); in e1000_check_for_link_media_swap()
1276 if (ret_val) in e1000_check_for_link_media_swap()
1277 return ret_val; in e1000_check_for_link_media_swap()
1282 ret_val = phy->ops.write_reg(hw, E1000_M88E1112_PAGE_ADDR, 0); in e1000_check_for_link_media_swap()
1283 if (ret_val) in e1000_check_for_link_media_swap()
1284 return ret_val; in e1000_check_for_link_media_swap()
1430 s32 ret_val; in e1000_reset_hw_82575() local
1438 ret_val = e1000_disable_pcie_master_generic(hw); in e1000_reset_hw_82575()
1439 if (ret_val) in e1000_reset_hw_82575()
1443 ret_val = e1000_set_pcie_completion_timeout(hw); in e1000_reset_hw_82575()
1444 if (ret_val) in e1000_reset_hw_82575()
1461 ret_val = e1000_get_auto_rd_done_generic(hw); in e1000_reset_hw_82575()
1462 if (ret_val) { in e1000_reset_hw_82575()
1480 ret_val = e1000_check_alt_mac_addr_generic(hw); in e1000_reset_hw_82575()
1482 return ret_val; in e1000_reset_hw_82575()
1494 s32 ret_val; in e1000_init_hw_82575() local
1500 ret_val = mac->ops.id_led_init(hw); in e1000_init_hw_82575()
1501 if (ret_val) { in e1000_init_hw_82575()
1524 ret_val = mac->ops.setup_link(hw); in e1000_init_hw_82575()
1537 return ret_val; in e1000_init_hw_82575()
1551 s32 ret_val; in e1000_setup_copper_link_82575() local
1575 ret_val = e1000_setup_serdes_link_82575(hw); in e1000_setup_copper_link_82575()
1576 if (ret_val) in e1000_setup_copper_link_82575()
1583 ret_val = hw->phy.ops.reset(hw); in e1000_setup_copper_link_82575()
1584 if (ret_val) { in e1000_setup_copper_link_82575()
1599 ret_val = e1000_copper_link_setup_m88_gen2(hw); in e1000_setup_copper_link_82575()
1602 ret_val = e1000_copper_link_setup_m88(hw); in e1000_setup_copper_link_82575()
1607 ret_val = e1000_copper_link_setup_igp(hw); in e1000_setup_copper_link_82575()
1610 ret_val = e1000_copper_link_setup_82577(hw); in e1000_setup_copper_link_82575()
1613 ret_val = -E1000_ERR_PHY; in e1000_setup_copper_link_82575()
1617 if (ret_val) in e1000_setup_copper_link_82575()
1620 ret_val = e1000_setup_copper_link_generic(hw); in e1000_setup_copper_link_82575()
1622 return ret_val; in e1000_setup_copper_link_82575()
1638 s32 ret_val = E1000_SUCCESS; in e1000_setup_serdes_link_82575() local
1645 return ret_val; in e1000_setup_serdes_link_82575()
1686 ret_val = hw->nvm.ops.read(hw, NVM_COMPAT, 1, &data); in e1000_setup_serdes_link_82575()
1687 if (ret_val) { in e1000_setup_serdes_link_82575()
1689 return ret_val; in e1000_setup_serdes_link_82575()
1763 return ret_val; in e1000_setup_serdes_link_82575()
1780 s32 ret_val = E1000_SUCCESS; in e1000_get_media_type_82575() local
1812 ret_val = e1000_set_sfp_media_type_82575(hw); in e1000_get_media_type_82575()
1813 if ((ret_val != E1000_SUCCESS) || in e1000_get_media_type_82575()
1846 return ret_val; in e1000_get_media_type_82575()
1858 s32 ret_val = E1000_ERR_CONFIG; in e1000_set_sfp_media_type_82575() local
1874 ret_val = e1000_read_sfp_data_byte(hw, in e1000_set_sfp_media_type_82575()
1877 if (ret_val == E1000_SUCCESS) in e1000_set_sfp_media_type_82575()
1882 if (ret_val != E1000_SUCCESS) in e1000_set_sfp_media_type_82575()
1885 ret_val = e1000_read_sfp_data_byte(hw, in e1000_set_sfp_media_type_82575()
1888 if (ret_val != E1000_SUCCESS) in e1000_set_sfp_media_type_82575()
1911 ret_val = E1000_SUCCESS; in e1000_set_sfp_media_type_82575()
1915 return ret_val; in e1000_set_sfp_media_type_82575()
1928 s32 ret_val; in e1000_valid_led_default_82575() local
1932 ret_val = hw->nvm.ops.read(hw, NVM_ID_LED_SETTINGS, 1, data); in e1000_valid_led_default_82575()
1933 if (ret_val) { in e1000_valid_led_default_82575()
1950 return ret_val; in e1000_valid_led_default_82575()
2011 s32 ret_val; in e1000_read_mac_addr_82575() local
2020 ret_val = e1000_check_alt_mac_addr_generic(hw); in e1000_read_mac_addr_82575()
2021 if (ret_val) in e1000_read_mac_addr_82575()
2024 ret_val = e1000_read_mac_addr_generic(hw); in e1000_read_mac_addr_82575()
2027 return ret_val; in e1000_read_mac_addr_82575()
2230 s32 ret_val = E1000_SUCCESS; in e1000_set_pcie_completion_timeout() local
2251 ret_val = e1000_read_pcie_cap_reg(hw, PCIE_DEVICE_CONTROL2, in e1000_set_pcie_completion_timeout()
2253 if (ret_val) in e1000_set_pcie_completion_timeout()
2258 ret_val = e1000_write_pcie_cap_reg(hw, PCIE_DEVICE_CONTROL2, in e1000_set_pcie_completion_timeout()
2265 return ret_val; in e1000_set_pcie_completion_timeout()
2374 s32 ret_val; in e1000_read_phy_reg_82580() local
2378 ret_val = hw->phy.ops.acquire(hw); in e1000_read_phy_reg_82580()
2379 if (ret_val) in e1000_read_phy_reg_82580()
2382 ret_val = e1000_read_phy_reg_mdic(hw, offset, data); in e1000_read_phy_reg_82580()
2387 return ret_val; in e1000_read_phy_reg_82580()
2400 s32 ret_val; in e1000_write_phy_reg_82580() local
2404 ret_val = hw->phy.ops.acquire(hw); in e1000_write_phy_reg_82580()
2405 if (ret_val) in e1000_write_phy_reg_82580()
2408 ret_val = e1000_write_phy_reg_mdic(hw, offset, data); in e1000_write_phy_reg_82580()
2413 return ret_val; in e1000_write_phy_reg_82580()
2426 s32 ret_val = E1000_SUCCESS; in e1000_reset_mdicnfg_82580() local
2437 ret_val = hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A + in e1000_reset_mdicnfg_82580()
2440 if (ret_val) { in e1000_reset_mdicnfg_82580()
2452 return ret_val; in e1000_reset_mdicnfg_82580()
2464 s32 ret_val = E1000_SUCCESS; in e1000_reset_hw_82580() local
2485 ret_val = e1000_disable_pcie_master_generic(hw); in e1000_reset_hw_82580()
2486 if (ret_val) in e1000_reset_hw_82580()
2521 ret_val = e1000_get_auto_rd_done_generic(hw); in e1000_reset_hw_82580()
2522 if (ret_val) { in e1000_reset_hw_82580()
2538 ret_val = e1000_reset_mdicnfg_82580(hw); in e1000_reset_hw_82580()
2539 if (ret_val) in e1000_reset_hw_82580()
2543 ret_val = e1000_check_alt_mac_addr_generic(hw); in e1000_reset_hw_82580()
2549 return ret_val; in e1000_reset_hw_82580()
2564 u16 ret_val = 0; in e1000_rxpbs_adjust_82580() local
2567 ret_val = e1000_82580_rxpbs_table[data]; in e1000_rxpbs_adjust_82580()
2569 return ret_val; in e1000_rxpbs_adjust_82580()
2583 s32 ret_val = E1000_SUCCESS; in e1000_validate_nvm_checksum_with_offset() local
2590 ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data); in e1000_validate_nvm_checksum_with_offset()
2591 if (ret_val) { in e1000_validate_nvm_checksum_with_offset()
2600 ret_val = -E1000_ERR_NVM; in e1000_validate_nvm_checksum_with_offset()
2605 return ret_val; in e1000_validate_nvm_checksum_with_offset()
2620 s32 ret_val; in e1000_update_nvm_checksum_with_offset() local
2627 ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data); in e1000_update_nvm_checksum_with_offset()
2628 if (ret_val) { in e1000_update_nvm_checksum_with_offset()
2635 ret_val = hw->nvm.ops.write(hw, (NVM_CHECKSUM_REG + offset), 1, in e1000_update_nvm_checksum_with_offset()
2637 if (ret_val) in e1000_update_nvm_checksum_with_offset()
2641 return ret_val; in e1000_update_nvm_checksum_with_offset()
2654 s32 ret_val; in e1000_validate_nvm_checksum_82580() local
2661 ret_val = hw->nvm.ops.read(hw, NVM_COMPATIBILITY_REG_3, 1, &nvm_data); in e1000_validate_nvm_checksum_82580()
2662 if (ret_val) { in e1000_validate_nvm_checksum_82580()
2675 ret_val = e1000_validate_nvm_checksum_with_offset(hw, in e1000_validate_nvm_checksum_82580()
2677 if (ret_val != E1000_SUCCESS) in e1000_validate_nvm_checksum_82580()
2682 return ret_val; in e1000_validate_nvm_checksum_82580()
2695 s32 ret_val; in e1000_update_nvm_checksum_82580() local
2701 ret_val = hw->nvm.ops.read(hw, NVM_COMPATIBILITY_REG_3, 1, &nvm_data); in e1000_update_nvm_checksum_82580()
2702 if (ret_val) { in e1000_update_nvm_checksum_82580()
2710 ret_val = hw->nvm.ops.write(hw, NVM_COMPATIBILITY_REG_3, 1, in e1000_update_nvm_checksum_82580()
2712 if (ret_val) { in e1000_update_nvm_checksum_82580()
2720 ret_val = e1000_update_nvm_checksum_with_offset(hw, nvm_offset); in e1000_update_nvm_checksum_82580()
2721 if (ret_val) in e1000_update_nvm_checksum_82580()
2726 return ret_val; in e1000_update_nvm_checksum_82580()
2739 s32 ret_val = E1000_SUCCESS; in e1000_validate_nvm_checksum_i350() local
2747 ret_val = e1000_validate_nvm_checksum_with_offset(hw, in e1000_validate_nvm_checksum_i350()
2749 if (ret_val != E1000_SUCCESS) in e1000_validate_nvm_checksum_i350()
2754 return ret_val; in e1000_validate_nvm_checksum_i350()
2767 s32 ret_val = E1000_SUCCESS; in e1000_update_nvm_checksum_i350() local
2775 ret_val = e1000_update_nvm_checksum_with_offset(hw, nvm_offset); in e1000_update_nvm_checksum_i350()
2776 if (ret_val != E1000_SUCCESS) in e1000_update_nvm_checksum_i350()
2781 return ret_val; in e1000_update_nvm_checksum_i350()
2794 s32 ret_val; in __e1000_access_emi_reg() local
2798 ret_val = hw->phy.ops.write_reg(hw, E1000_EMIADD, address); in __e1000_access_emi_reg()
2799 if (ret_val) in __e1000_access_emi_reg()
2800 return ret_val; in __e1000_access_emi_reg()
2803 ret_val = hw->phy.ops.read_reg(hw, E1000_EMIDATA, data); in __e1000_access_emi_reg()
2805 ret_val = hw->phy.ops.write_reg(hw, E1000_EMIDATA, *data); in __e1000_access_emi_reg()
2807 return ret_val; in __e1000_access_emi_reg()
2832 s32 ret_val = E1000_SUCCESS; in e1000_initialize_M88E1512_phy() local
2841 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0x00FF); in e1000_initialize_M88E1512_phy()
2842 if (ret_val) in e1000_initialize_M88E1512_phy()
2845 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_2, 0x214B); in e1000_initialize_M88E1512_phy()
2846 if (ret_val) in e1000_initialize_M88E1512_phy()
2849 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_1, 0x2144); in e1000_initialize_M88E1512_phy()
2850 if (ret_val) in e1000_initialize_M88E1512_phy()
2853 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_2, 0x0C28); in e1000_initialize_M88E1512_phy()
2854 if (ret_val) in e1000_initialize_M88E1512_phy()
2857 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_1, 0x2146); in e1000_initialize_M88E1512_phy()
2858 if (ret_val) in e1000_initialize_M88E1512_phy()
2861 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_2, 0xB233); in e1000_initialize_M88E1512_phy()
2862 if (ret_val) in e1000_initialize_M88E1512_phy()
2865 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_1, 0x214D); in e1000_initialize_M88E1512_phy()
2866 if (ret_val) in e1000_initialize_M88E1512_phy()
2869 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_2, 0xCC0C); in e1000_initialize_M88E1512_phy()
2870 if (ret_val) in e1000_initialize_M88E1512_phy()
2873 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_1, 0x2159); in e1000_initialize_M88E1512_phy()
2874 if (ret_val) in e1000_initialize_M88E1512_phy()
2878 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0x00FB); in e1000_initialize_M88E1512_phy()
2879 if (ret_val) in e1000_initialize_M88E1512_phy()
2882 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_3, 0x000D); in e1000_initialize_M88E1512_phy()
2883 if (ret_val) in e1000_initialize_M88E1512_phy()
2887 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0x12); in e1000_initialize_M88E1512_phy()
2888 if (ret_val) in e1000_initialize_M88E1512_phy()
2892 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_MODE, 0x8001); in e1000_initialize_M88E1512_phy()
2893 if (ret_val) in e1000_initialize_M88E1512_phy()
2897 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0); in e1000_initialize_M88E1512_phy()
2898 if (ret_val) in e1000_initialize_M88E1512_phy()
2901 ret_val = phy->ops.commit(hw); in e1000_initialize_M88E1512_phy()
2902 if (ret_val) { in e1000_initialize_M88E1512_phy()
2904 return ret_val; in e1000_initialize_M88E1512_phy()
2909 return ret_val; in e1000_initialize_M88E1512_phy()
2921 s32 ret_val = E1000_SUCCESS; in e1000_initialize_M88E1543_phy() local
2930 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0x00FF); in e1000_initialize_M88E1543_phy()
2931 if (ret_val) in e1000_initialize_M88E1543_phy()
2934 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_2, 0x214B); in e1000_initialize_M88E1543_phy()
2935 if (ret_val) in e1000_initialize_M88E1543_phy()
2938 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_1, 0x2144); in e1000_initialize_M88E1543_phy()
2939 if (ret_val) in e1000_initialize_M88E1543_phy()
2942 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_2, 0x0C28); in e1000_initialize_M88E1543_phy()
2943 if (ret_val) in e1000_initialize_M88E1543_phy()
2946 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_1, 0x2146); in e1000_initialize_M88E1543_phy()
2947 if (ret_val) in e1000_initialize_M88E1543_phy()
2950 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_2, 0xB233); in e1000_initialize_M88E1543_phy()
2951 if (ret_val) in e1000_initialize_M88E1543_phy()
2954 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_1, 0x214D); in e1000_initialize_M88E1543_phy()
2955 if (ret_val) in e1000_initialize_M88E1543_phy()
2958 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_2, 0xDC0C); in e1000_initialize_M88E1543_phy()
2959 if (ret_val) in e1000_initialize_M88E1543_phy()
2962 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_1, 0x2159); in e1000_initialize_M88E1543_phy()
2963 if (ret_val) in e1000_initialize_M88E1543_phy()
2967 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0x00FB); in e1000_initialize_M88E1543_phy()
2968 if (ret_val) in e1000_initialize_M88E1543_phy()
2971 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_CFG_REG_3, 0xC00D); in e1000_initialize_M88E1543_phy()
2972 if (ret_val) in e1000_initialize_M88E1543_phy()
2976 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0x12); in e1000_initialize_M88E1543_phy()
2977 if (ret_val) in e1000_initialize_M88E1543_phy()
2981 ret_val = phy->ops.write_reg(hw, E1000_M88E1512_MODE, 0x8001); in e1000_initialize_M88E1543_phy()
2982 if (ret_val) in e1000_initialize_M88E1543_phy()
2986 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0x1); in e1000_initialize_M88E1543_phy()
2987 if (ret_val) in e1000_initialize_M88E1543_phy()
2991 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_FIBER_CTRL, 0x9140); in e1000_initialize_M88E1543_phy()
2992 if (ret_val) in e1000_initialize_M88E1543_phy()
2996 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0); in e1000_initialize_M88E1543_phy()
2997 if (ret_val) in e1000_initialize_M88E1543_phy()
3000 ret_val = phy->ops.commit(hw); in e1000_initialize_M88E1543_phy()
3001 if (ret_val) { in e1000_initialize_M88E1543_phy()
3003 return ret_val; in e1000_initialize_M88E1543_phy()
3008 return ret_val; in e1000_initialize_M88E1543_phy()
3078 s32 ret_val = E1000_SUCCESS; in e1000_set_eee_i354() local
3090 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 18); in e1000_set_eee_i354()
3091 if (ret_val) in e1000_set_eee_i354()
3094 ret_val = phy->ops.read_reg(hw, E1000_M88E1543_EEE_CTRL_1, in e1000_set_eee_i354()
3096 if (ret_val) in e1000_set_eee_i354()
3100 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_EEE_CTRL_1, in e1000_set_eee_i354()
3102 if (ret_val) in e1000_set_eee_i354()
3106 ret_val = phy->ops.write_reg(hw, E1000_M88E1543_PAGE_ADDR, 0); in e1000_set_eee_i354()
3107 if (ret_val) in e1000_set_eee_i354()
3111 ret_val = e1000_read_xmdio_reg(hw, E1000_EEE_ADV_ADDR_I354, in e1000_set_eee_i354()
3114 if (ret_val) in e1000_set_eee_i354()
3127 ret_val = e1000_write_xmdio_reg(hw, E1000_EEE_ADV_ADDR_I354, in e1000_set_eee_i354()
3132 ret_val = e1000_read_xmdio_reg(hw, E1000_EEE_ADV_ADDR_I354, in e1000_set_eee_i354()
3135 if (ret_val) in e1000_set_eee_i354()
3140 ret_val = e1000_write_xmdio_reg(hw, E1000_EEE_ADV_ADDR_I354, in e1000_set_eee_i354()
3146 return ret_val; in e1000_set_eee_i354()
3160 s32 ret_val = E1000_SUCCESS; in e1000_get_eee_status_i354() local
3171 ret_val = e1000_read_xmdio_reg(hw, E1000_PCS_STATUS_ADDR_I354, in e1000_get_eee_status_i354()
3174 if (ret_val) in e1000_get_eee_status_i354()
3181 return ret_val; in e1000_get_eee_status_i354()
3242 s32 ret_val = E1000_SUCCESS; in e1000_set_i2c_bb() local
3259 return ret_val; in e1000_set_i2c_bb()