Lines Matching refs:value
271 u32 value; in read_sge_debug_data() local
276 value = t4_read_reg(padap, A_SGE_DEBUG_DATA_LOW); in read_sge_debug_data()
278 sge_dbg_reg[(i << 1) | 1] = HTONL_NIBBLE(value); in read_sge_debug_data()
279 value = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH); in read_sge_debug_data()
281 sge_dbg_reg[(i << 1)] = HTONL_NIBBLE(value); in read_sge_debug_data()
294 t4_tp_mib_read(padap, &tp_mib[i].value, 1, in read_tp_mib_data()
313 u32 value = 0; in t5_wtp_data() local
346 value = t4_read_reg(padap, A_PCIE_CMDR_REQ_CNT); in t5_wtp_data()
348 wtp->pcie_core_cmd_req.sop[0] = ((value >> 0) & 0xFF); /*bit 0:7*/ in t5_wtp_data()
349 wtp->pcie_core_cmd_req.sop[1] = ((value >> 8) & 0xFF); /*bit 8:15*/ in t5_wtp_data()
351 wtp->pcie_core_cmd_req.eop[0] = ((value >> 0) & 0xFF); /*bit 0:7*/ in t5_wtp_data()
352 wtp->pcie_core_cmd_req.eop[1] = ((value >> 8) & 0xFF); /*bit 8:15*/ in t5_wtp_data()
356 value = t4_read_reg(padap, A_PCIE_T5_DMA_STAT3 + (i * 0x10)); in t5_wtp_data()
357 wtp->pcie_t5_dma_stat3.sop[i] = value & 0xFF; in t5_wtp_data()
358 wtp->pcie_t5_dma_stat3.eop[i] = ((value >> 16) & 0xFF); in t5_wtp_data()
362 value = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH_INDEX_6); in t5_wtp_data()
363 wtp->sge_debug_data_high_index_6.sop[0] = ((value >> 4) & 0x0F); in t5_wtp_data()
364 wtp->sge_debug_data_high_index_6.eop[0] = ((value >> 0) & 0x0F); in t5_wtp_data()
365 wtp->sge_debug_data_high_index_6.sop[1] = ((value >> 12) & 0x0F); in t5_wtp_data()
366 wtp->sge_debug_data_high_index_6.eop[1] = ((value >> 8) & 0x0F); in t5_wtp_data()
367 wtp->sge_debug_data_high_index_6.sop[2] = ((value >> 20) & 0x0F); in t5_wtp_data()
368 wtp->sge_debug_data_high_index_6.eop[2] = ((value >> 16) & 0x0F); in t5_wtp_data()
369 wtp->sge_debug_data_high_index_6.sop[3] = ((value >> 28) & 0x0F); in t5_wtp_data()
370 wtp->sge_debug_data_high_index_6.eop[3] = ((value >> 24) & 0x0F); in t5_wtp_data()
373 value = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH_INDEX_3); in t5_wtp_data()
374 wtp->sge_debug_data_high_index_3.sop[0] = ((value >> 4) & 0x0F); in t5_wtp_data()
375 wtp->sge_debug_data_high_index_3.eop[0] = ((value >> 0) & 0x0F); in t5_wtp_data()
376 wtp->sge_debug_data_high_index_3.sop[1] = ((value >> 12) & 0x0F); in t5_wtp_data()
377 wtp->sge_debug_data_high_index_3.eop[1] = ((value >> 8) & 0x0F); in t5_wtp_data()
378 wtp->sge_debug_data_high_index_3.sop[2] = ((value >> 20) & 0x0F); in t5_wtp_data()
379 wtp->sge_debug_data_high_index_3.eop[2] = ((value >> 16) & 0x0F); in t5_wtp_data()
380 wtp->sge_debug_data_high_index_3.sop[3] = ((value >> 28) & 0x0F); in t5_wtp_data()
381 wtp->sge_debug_data_high_index_3.eop[3] = ((value >> 24) & 0x0F); in t5_wtp_data()
385 value = t4_read_reg(padap, A_ULP_TX_SE_CNT_CH0 + (i * 4)); in t5_wtp_data()
386 wtp->ulp_se_cnt_chx.sop[i] = ((value >> 28) & 0x0F); in t5_wtp_data()
387 wtp->ulp_se_cnt_chx.eop[i] = ((value >> 24) & 0x0F); in t5_wtp_data()
392 value = t4_read_reg(padap, 0x3081c + ((i * 4) << 12)); in t5_wtp_data()
393 wtp->mac_portx_pkt_count.sop[i] = ((value >> 24) & 0xFF); in t5_wtp_data()
394 wtp->mac_portx_pkt_count.eop[i] = ((value >> 16) & 0xFF); in t5_wtp_data()
395 wtp->mac_porrx_pkt_count.sop[i] = ((value >> 8) & 0xFF); in t5_wtp_data()
396 wtp->mac_porrx_pkt_count.eop[i] = ((value >> 0) & 0xFF); in t5_wtp_data()
401 value = t4_read_reg(padap, 0x30a80 + ((i * 4) << 12)); in t5_wtp_data()
402 wtp->mac_portx_aframestra_ok.sop[i] = (value & 0xFF); in t5_wtp_data()
403 wtp->mac_portx_aframestra_ok.eop[i] = (value & 0xFF); in t5_wtp_data()
407 value = t4_read_reg(padap, A_PCIE_CMDR_RSP_CNT); in t5_wtp_data()
409 wtp->core_pcie_cmd_rsp.sop[0] = ((value >> 0) & 0xFF); /*bit 0:7*/ in t5_wtp_data()
410 wtp->core_pcie_cmd_rsp.sop[1] = ((value >> 16) & 0xFF); /*bit 16:23*/ in t5_wtp_data()
412 wtp->core_pcie_cmd_rsp.eop[0] = ((value >> 8) & 0xFF); /*bit 8:15*/ in t5_wtp_data()
413 wtp->core_pcie_cmd_rsp.eop[1] = ((value >> 24) & 0xFF); /*bit 24:31*/ in t5_wtp_data()
452 value = t4_read_reg(padap, A_PCIE_DMAR_REQ_CNT); in t5_wtp_data()
454 wtp->pcie_core_dma_req.sop[0] = ((value >> 0) & 0xFF); /*bit 0:7*/ in t5_wtp_data()
455 wtp->pcie_core_dma_req.sop[1] = ((value >> 8) & 0xFF); /*bit 8:15*/ in t5_wtp_data()
456 wtp->pcie_core_dma_req.sop[2] = ((value >> 16) & 0xFF); /*bit 16:23*/ in t5_wtp_data()
457 wtp->pcie_core_dma_req.sop[3] = ((value >> 24) & 0xFF); /*bit 24:31*/ in t5_wtp_data()
459 wtp->pcie_core_dma_req.eop[0] = ((value >> 0) & 0xFF); /*bit 0:7*/ in t5_wtp_data()
460 wtp->pcie_core_dma_req.eop[1] = ((value >> 8) & 0xFF); /*bit 8:15*/ in t5_wtp_data()
461 wtp->pcie_core_dma_req.eop[2] = ((value >> 16) & 0xFF); /*bit 16:23*/ in t5_wtp_data()
462 wtp->pcie_core_dma_req.eop[3] = ((value >> 24) & 0xFF); /*bit 24:31*/ in t5_wtp_data()
465 value = t4_read_reg(padap, A_PCIE_DMAR_RSP_SOP_CNT); in t5_wtp_data()
467 wtp->core_pcie_dma_rsp.sop[0] = ((value >> 0) & 0xFF); /*bit 0:7*/ in t5_wtp_data()
468 wtp->core_pcie_dma_rsp.sop[1] = ((value >> 8) & 0xFF); /*bit 8:15*/ in t5_wtp_data()
469 wtp->core_pcie_dma_rsp.sop[2] = ((value >> 16) & 0xFF); /*bit 16:23*/ in t5_wtp_data()
470 wtp->core_pcie_dma_rsp.sop[3] = ((value >> 24) & 0xFF); /*bit 24:31*/ in t5_wtp_data()
472 value = t4_read_reg(padap, A_PCIE_DMAR_RSP_EOP_CNT); in t5_wtp_data()
474 wtp->core_pcie_dma_rsp.eop[0] = ((value >> 0) & 0xFF); /*bit 0:7*/ in t5_wtp_data()
475 wtp->core_pcie_dma_rsp.eop[1] = ((value >> 8) & 0xFF); /*bit 8:15*/ in t5_wtp_data()
476 wtp->core_pcie_dma_rsp.eop[2] = ((value >> 16) & 0xFF); /*bit 16:23*/ in t5_wtp_data()
477 wtp->core_pcie_dma_rsp.eop[3] = ((value >> 24) & 0xFF); /*bit 24:31*/ in t5_wtp_data()
503 value = t4_read_reg(padap, (A_ULP_TX_SE_CNT_CH0 + (i*4))); in t5_wtp_data()
505 wtp->utx_tp.sop[i] = ((value >> 28) & 0xF); /*bits 28:31*/ in t5_wtp_data()
506 wtp->utx_tp.eop[i] = ((value >> 24) & 0xF); /*bits 24:27*/ in t5_wtp_data()
511 t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_CSIDE_RX0 + i), in t5_wtp_data()
514 wtp->utx_tpcside.sop[i] = ((value >> 28) & 0xF);/*bits 28:31*/ in t5_wtp_data()
515 wtp->utx_tpcside.eop[i] = ((value >> 24) & 0xF);/*bits 24:27*/ in t5_wtp_data()
516 wtp->tpcside_rxpld.sop[i] = ((value >> 20) & 0xF);/*bits 20:23*/ in t5_wtp_data()
517 wtp->tpcside_rxpld.eop[i] = ((value >> 16) & 0xF);/*bits 16:19*/ in t5_wtp_data()
518 wtp->tpcside_rxarb.sop[i] = ((value >> 12) & 0xF);/*bits 12:15*/ in t5_wtp_data()
519 wtp->tpcside_rxarb.eop[i] = ((value >> 8) & 0xF); /*bits 8:11*/ in t5_wtp_data()
520 wtp->tpcside_rxcpl.sop[i] = ((value >> 4) & 0xF); /*bits 4:7*/ in t5_wtp_data()
521 wtp->tpcside_rxcpl.eop[i] = ((value >> 0) & 0xF); /*bits 0:3*/ in t5_wtp_data()
526 t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_ESIDE_PKT0 + i), in t5_wtp_data()
529 wtp->tpeside_mps.sop[i] = ((value >> 28) & 0xF); /*bits 28:31*/ in t5_wtp_data()
530 wtp->tpeside_mps.eop[i] = ((value >> 24) & 0xF); /*bits 24:27*/ in t5_wtp_data()
531 wtp->tpeside_pm.sop[i] = ((value >> 20) & 0xF); /*bits 20:23*/ in t5_wtp_data()
532 wtp->tpeside_pm.eop[i] = ((value >> 16) & 0xF); /*bits 16:19*/ in t5_wtp_data()
533 wtp->mps_tpeside.sop[i] = ((value >> 12) & 0xF); /*bits 12:15*/ in t5_wtp_data()
534 wtp->mps_tpeside.eop[i] = ((value >> 8) & 0xF); /*bits 8:11*/ in t5_wtp_data()
535 wtp->tpeside_pld.sop[i] = ((value >> 4) & 0xF); /*bits 4:7*/ in t5_wtp_data()
536 wtp->tpeside_pld.eop[i] = ((value >> 0) & 0xF); /*bits 0:3*/ in t5_wtp_data()
542 value = t4_read_reg(padap, 0x5988 + (i * 0x10)); in t5_wtp_data()
543 wtp->pcie_cmd_stat2.sop[i] = value & 0xFF; in t5_wtp_data()
544 wtp->pcie_cmd_stat2.eop[i] = value & 0xFF; in t5_wtp_data()
549 value = t4_read_reg(padap, 0x598c + (i * 0x10)); in t5_wtp_data()
550 wtp->pcie_cmd_stat3.sop[i] = value & 0xFF; in t5_wtp_data()
551 wtp->pcie_cmd_stat3.eop[i] = value & 0xFF; in t5_wtp_data()
556 value = t4_read_reg(padap, (A_ULP_RX_SE_CNT_CH0 + (i*4))); in t5_wtp_data()
558 wtp->pmrx_ulprx.sop[i] = ((value >> 4) & 0xF); /*bits 4:7*/ in t5_wtp_data()
559 wtp->pmrx_ulprx.eop[i] = ((value >> 0) & 0xF); /*bits 0:3*/ in t5_wtp_data()
560 wtp->ulprx_tpcside.sop[i] = ((value >> 28) & 0xF);/*bits 28:31*/ in t5_wtp_data()
561 wtp->ulprx_tpcside.eop[i] = ((value >> 24) & 0xF);/*bits 24:27*/ in t5_wtp_data()
567 value = t4_read_reg(padap, (A_MPS_TX_SE_CNT_TP01 + (i << 2))); in t5_wtp_data()
568 wtp->tp_mps.sop[(i*2)] = ((value >> 8) & 0xFF); /*bit 8:15*/ in t5_wtp_data()
569 wtp->tp_mps.eop[(i*2)] = ((value >> 0) & 0xFF); /*bit 0:7*/ in t5_wtp_data()
570 wtp->tp_mps.sop[(i*2) + 1] = ((value >> 24) & 0xFF);/*bit 24:31 in t5_wtp_data()
572 wtp->tp_mps.eop[(i*2) + 1] = ((value >> 16) & 0xFF);/*bit 16:23 in t5_wtp_data()
575 drop = ptp_mib->TP_MIB_OFD_ARP_DROP.value; in t5_wtp_data()
576 drop += ptp_mib->TP_MIB_OFD_DFR_DROP.value; in t5_wtp_data()
578 drop += ptp_mib->TP_MIB_TNL_DROP_0.value; in t5_wtp_data()
579 drop += ptp_mib->TP_MIB_TNL_DROP_1.value; in t5_wtp_data()
580 drop += ptp_mib->TP_MIB_TNL_DROP_2.value; in t5_wtp_data()
581 drop += ptp_mib->TP_MIB_TNL_DROP_3.value; in t5_wtp_data()
588 value = t4_read_reg(padap, (A_MPS_TX_SE_CNT_MAC01 + (i << 2))); in t5_wtp_data()
589 wtp->mps_xgm.sop[(i*2)] = ((value >> 8) & 0xFF);/*bit 8:15*/ in t5_wtp_data()
590 wtp->mps_xgm.eop[(i*2)] = ((value >> 0) & 0xFF);/*bit 0:7*/ in t5_wtp_data()
591 wtp->mps_xgm.sop[(i*2) + 1] = ((value >> 24) & 0xFF);/*bit 24:31 in t5_wtp_data()
593 wtp->mps_xgm.eop[(i*2) + 1] = ((value >> 16) & 0xFF);/*bit 16:23 in t5_wtp_data()
597 value = t4_read_reg(padap, in t5_wtp_data()
600 drop += value; in t5_wtp_data()
610 value = t4_read_reg(padap, in t5_wtp_data()
614 wtp->tx_xgm_xgm.sop[i] = ((value >> 24) & 0xFF); /*bit 24:31*/ in t5_wtp_data()
615 wtp->tx_xgm_xgm.eop[i] = ((value >> 16) & 0xFF); /*bit 16:23*/ in t5_wtp_data()
616 wtp->rx_xgm_xgm.sop[i] = ((value >> 8) & 0xFF); /*bit 8:15*/ in t5_wtp_data()
617 wtp->rx_xgm_xgm.eop[i] = ((value >> 0) & 0xFF); /*bit 0:7*/ in t5_wtp_data()
623 value = t4_read_reg(padap, in t5_wtp_data()
626 wtp->xgm_wire.sop[i] = (value); in t5_wtp_data()
627 wtp->xgm_wire.eop[i] = (value); /* No EOP for XGMAC, so fake in t5_wtp_data()
638 value = t4_read_reg(padap, in t5_wtp_data()
642 wtp->wire_xgm.sop[i] = (value); in t5_wtp_data()
643 wtp->wire_xgm.eop[i] = (value); /* No EOP for XGMAC, so fake in t5_wtp_data()
652 value = t4_read_reg(padap, (A_MPS_RX_SE_CNT_IN0 + (i << 2))); in t5_wtp_data()
654 wtp->xgm_mps.sop[i] = ((value >> 8) & 0xFF); /*bits 8:15*/ in t5_wtp_data()
655 wtp->xgm_mps.eop[i] = ((value >> 0) & 0xFF); /*bits 0:7*/ in t5_wtp_data()
658 value = t4_read_reg(padap, (A_MPS_RX_CLS_DROP_CNT0 + (i << 2))); in t5_wtp_data()
660 drop += (value & 0xFFFF) + ((value >> 16) & 0xFFFF); in t5_wtp_data()
667 value = t4_read_reg(padap, in t5_wtp_data()
670 drop += value; in t5_wtp_data()
671 value = t4_read_reg(padap, in t5_wtp_data()
674 value = t4_read_reg(padap, in t5_wtp_data()
677 drop += value; in t5_wtp_data()
678 value = t4_read_reg(padap, in t5_wtp_data()
682 value = t4_read_reg(padap, in t5_wtp_data()
685 drop += value; in t5_wtp_data()
686 value = t4_read_reg(padap, in t5_wtp_data()
689 value = t4_read_reg(padap, in t5_wtp_data()
692 drop += value; in t5_wtp_data()
693 value = t4_read_reg(padap, in t5_wtp_data()
697 value = t4_read_reg(padap, in t5_wtp_data()
700 drop += value; in t5_wtp_data()
708 value = t4_read_reg(padap, in t5_wtp_data()
711 err += value; in t5_wtp_data()
712 value = t4_read_reg(padap, in t5_wtp_data()
716 value = t4_read_reg(padap, in t5_wtp_data()
719 err += value; in t5_wtp_data()
720 value = t4_read_reg(padap, in t5_wtp_data()
724 value = t4_read_reg(padap, in t5_wtp_data()
727 err += value; in t5_wtp_data()
728 value = t4_read_reg(padap, in t5_wtp_data()
732 value = t4_read_reg(padap, in t5_wtp_data()
735 err += value; in t5_wtp_data()
736 value = t4_read_reg(padap, in t5_wtp_data()
740 value = t4_read_reg(padap, in t5_wtp_data()
743 err += value; in t5_wtp_data()
744 value = t4_read_reg(padap, in t5_wtp_data()
748 value = t4_read_reg(padap, in t5_wtp_data()
751 err += value; in t5_wtp_data()
752 value = t4_read_reg(padap, in t5_wtp_data()
760 value = t4_read_reg(padap, (A_MPS_RX_SE_CNT_OUT01 + (i << 2))); in t5_wtp_data()
762 wtp->mps_tp.sop[(i*2)] = ((value >> 8) & 0xFF); /*bit 8:15*/ in t5_wtp_data()
763 wtp->mps_tp.eop[(i*2)] = ((value >> 0) & 0xFF); /*bit 0:7*/ in t5_wtp_data()
764 wtp->mps_tp.sop[(i*2) + 1] = ((value >> 24) & 0xFF);/*bit 24:31 in t5_wtp_data()
766 wtp->mps_tp.eop[(i*2) + 1] = ((value >> 16) & 0xFF);/*bit 16:23 in t5_wtp_data()
769 drop = ptp_mib->TP_MIB_TNL_CNG_DROP_0.value; in t5_wtp_data()
770 drop += ptp_mib->TP_MIB_TNL_CNG_DROP_1.value; in t5_wtp_data()
771 drop += ptp_mib->TP_MIB_TNL_CNG_DROP_2.value; in t5_wtp_data()
772 drop += ptp_mib->TP_MIB_TNL_CNG_DROP_3.value; in t5_wtp_data()
773 drop += ptp_mib->TP_MIB_OFD_CHN_DROP_0.value; in t5_wtp_data()
774 drop += ptp_mib->TP_MIB_OFD_CHN_DROP_1.value; in t5_wtp_data()
775 drop += ptp_mib->TP_MIB_OFD_CHN_DROP_2.value; in t5_wtp_data()
776 drop += ptp_mib->TP_MIB_OFD_CHN_DROP_3.value; in t5_wtp_data()
777 drop += ptp_mib->TP_MIB_FCOE_DROP_0.value; in t5_wtp_data()
778 drop += ptp_mib->TP_MIB_FCOE_DROP_1.value; in t5_wtp_data()
779 drop += ptp_mib->TP_MIB_FCOE_DROP_2.value; in t5_wtp_data()
780 drop += ptp_mib->TP_MIB_FCOE_DROP_3.value; in t5_wtp_data()
781 drop += ptp_mib->TP_MIB_OFD_VLN_DROP_0.value; in t5_wtp_data()
782 drop += ptp_mib->TP_MIB_OFD_VLN_DROP_1.value; in t5_wtp_data()
783 drop += ptp_mib->TP_MIB_OFD_VLN_DROP_2.value; in t5_wtp_data()
784 drop += ptp_mib->TP_MIB_OFD_VLN_DROP_3.value; in t5_wtp_data()
785 drop += ptp_mib->TP_MIB_USM_DROP.value; in t5_wtp_data()
791 t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_CSIDE_RX0 + i), in t5_wtp_data()
794 wtp->tpcside_csw.sop[i] = ((value >> 28) & 0xF);/*bits 28:31*/ in t5_wtp_data()
795 wtp->tpcside_csw.eop[i] = ((value >> 24) & 0xF);/*bits 24:27*/ in t5_wtp_data()
796 wtp->tpcside_pm.sop[i] = ((value >> 20) & 0xF);/*bits 20:23*/ in t5_wtp_data()
797 wtp->tpcside_pm.eop[i] = ((value >> 16) & 0xF);/*bits 16:19*/ in t5_wtp_data()
798 wtp->tpcside_uturn.sop[i] = ((value >> 12) & 0xF);/*bits 12:15*/ in t5_wtp_data()
799 wtp->tpcside_uturn.eop[i] = ((value >> 8) & 0xF); /*bits 8:11*/ in t5_wtp_data()
800 wtp->tpcside_txcpl.sop[i] = ((value >> 4) & 0xF); /*bits 4:7*/ in t5_wtp_data()
801 wtp->tpcside_txcpl.eop[i] = ((value >> 0) & 0xF); /*bits 0:3*/ in t5_wtp_data()
840 value = t4_read_reg(padap, A_PCIE_T5_DMA_STAT2 + (i * 0x10)); in t5_wtp_data()
841 wtp->pcie_dma1_stat2.sop[i] = ((value >> 8) & 0x0F); in t5_wtp_data()
842 wtp->pcie_dma1_stat2.eop[i] = ((value >> 8) & 0x0F); in t5_wtp_data()
843 wtp->pcie_dma1_stat2_core.sop[i] += value & 0x0F; in t5_wtp_data()
844 wtp->pcie_dma1_stat2_core.eop[i] += value & 0x0F; in t5_wtp_data()
849 value = t4_read_reg(padap, 0x30a88 + ((i * 4) << 12)); in t5_wtp_data()
850 wtp->mac_porrx_aframestra_ok.sop[i] = (value & 0xFF); in t5_wtp_data()
851 wtp->mac_porrx_aframestra_ok.eop[i] = (value & 0xFF); in t5_wtp_data()
855 value = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH_INDEX_7); in t5_wtp_data()
856 wtp->sge_debug_data_high_indx7.sop[0] = ((value >> 4) & 0x0F); in t5_wtp_data()
857 wtp->sge_debug_data_high_indx7.eop[0] = ((value >> 0) & 0x0F); in t5_wtp_data()
858 wtp->sge_debug_data_high_indx7.sop[1] = ((value >> 12) & 0x0F); in t5_wtp_data()
859 wtp->sge_debug_data_high_indx7.eop[1] = ((value >> 8) & 0x0F); in t5_wtp_data()
860 wtp->sge_debug_data_high_indx7.sop[2] = ((value >> 20) & 0x0F); in t5_wtp_data()
861 wtp->sge_debug_data_high_indx7.eop[2] = ((value >> 16) & 0x0F); in t5_wtp_data()
862 wtp->sge_debug_data_high_indx7.sop[3] = ((value >> 28) & 0x0F); in t5_wtp_data()
863 wtp->sge_debug_data_high_indx7.eop[3] = ((value >> 24) & 0x0F); in t5_wtp_data()
866 value = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH_INDEX_1); in t5_wtp_data()
867 wtp->sge_debug_data_high_indx1.sop[0] = ((value >> 20) & 0x0F); in t5_wtp_data()
868 wtp->sge_debug_data_high_indx1.eop[0] = ((value >> 16) & 0x0F); in t5_wtp_data()
869 wtp->sge_debug_data_high_indx1.sop[1] = ((value >> 28) & 0x0F); in t5_wtp_data()
870 wtp->sge_debug_data_high_indx1.eop[1] = ((value >> 24) & 0x0F); in t5_wtp_data()
874 t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_CSIDE_TX0 + i), in t5_wtp_data()
877 wtp->utx_tpcside_tx.sop[i] = ((value >> 28) & 0xF);/*bits 28:31 in t5_wtp_data()
879 wtp->utx_tpcside_tx.eop[i] = ((value >> 24) & 0xF); in t5_wtp_data()
883 value = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH_INDEX_9); in t5_wtp_data()
884 wtp->sge_debug_data_high_indx9.sop[0] = ((value >> 20) & 0x0F); in t5_wtp_data()
885 wtp->sge_debug_data_high_indx9.sop[1] = ((value >> 28) & 0x0F); in t5_wtp_data()
886 wtp->sge_debug_data_high_indx9.eop[0] = ((value >> 16) & 0x0F); in t5_wtp_data()
887 wtp->sge_debug_data_high_indx9.eop[1] = ((value >> 24) & 0x0F); in t5_wtp_data()
888 wtp->sge_work_req_pkt.sop[0] = ((value >> 4) & 0x0F); in t5_wtp_data()
889 wtp->sge_work_req_pkt.sop[1] = ((value >> 12) & 0x0F); in t5_wtp_data()
892 value = t4_read_reg(padap, A_LE_DB_REQ_RSP_CNT); in t5_wtp_data()
893 wtp->le_db_rsp_cnt.sop = value & 0xF; in t5_wtp_data()
894 wtp->le_db_rsp_cnt.eop = (value >> 16) & 0xF; in t5_wtp_data()
898 t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_ESIDE_PKT0 + i), in t5_wtp_data()
901 wtp->tp_dbg_eside_pktx.sop[i] = ((value >> 12) & 0xF); in t5_wtp_data()
902 wtp->tp_dbg_eside_pktx.eop[i] = ((value >> 8) & 0xF); in t5_wtp_data()
906 value = t4_read_reg(padap, A_PCIE_DMAW_SOP_CNT); in t5_wtp_data()
908 wtp->pcie_core_dmaw.sop[0] = ((value >> 0) & 0xFF); /*bit 0:7*/ in t5_wtp_data()
909 wtp->pcie_core_dmaw.sop[1] = ((value >> 8) & 0xFF); /*bit 8:15*/ in t5_wtp_data()
910 wtp->pcie_core_dmaw.sop[2] = ((value >> 16) & 0xFF); /*bit 16:23*/ in t5_wtp_data()
911 wtp->pcie_core_dmaw.sop[3] = ((value >> 24) & 0xFF); /*bit 24:31*/ in t5_wtp_data()
913 value = t4_read_reg(padap, A_PCIE_DMAW_EOP_CNT); in t5_wtp_data()
915 wtp->pcie_core_dmaw.eop[0] = ((value >> 0) & 0xFF); /*bit 0:7*/ in t5_wtp_data()
916 wtp->pcie_core_dmaw.eop[1] = ((value >> 8) & 0xFF); /*bit 8:15*/ in t5_wtp_data()
917 wtp->pcie_core_dmaw.eop[2] = ((value >> 16) & 0xFF); /*bit 16:23*/ in t5_wtp_data()
918 wtp->pcie_core_dmaw.eop[3] = ((value >> 24) & 0xFF); /*bit 24:31*/ in t5_wtp_data()
920 value = t4_read_reg(padap, A_PCIE_DMAI_CNT); in t5_wtp_data()
922 wtp->pcie_core_dmai.sop[0] = ((value >> 0) & 0xFF); /*bit 0:7*/ in t5_wtp_data()
923 wtp->pcie_core_dmai.sop[1] = ((value >> 8) & 0xFF); /*bit 8:15*/ in t5_wtp_data()
924 wtp->pcie_core_dmai.sop[2] = ((value >> 16) & 0xFF); /*bit 16:23*/ in t5_wtp_data()
925 wtp->pcie_core_dmai.sop[3] = ((value >> 24) & 0xFF); /*bit 24:31*/ in t5_wtp_data()
927 wtp->pcie_core_dmai.eop[0] = ((value >> 0) & 0xFF); /*bit 0:7*/ in t5_wtp_data()
928 wtp->pcie_core_dmai.eop[1] = ((value >> 8) & 0xFF); /*bit 8:15*/ in t5_wtp_data()
929 wtp->pcie_core_dmai.eop[2] = ((value >> 16) & 0xFF); /*bit 16:23*/ in t5_wtp_data()
930 wtp->pcie_core_dmai.eop[3] = ((value >> 24) & 0xFF); /*bit 24:31*/ in t5_wtp_data()
956 u32 value = 0; in t6_wtp_data() local
979 value = t4_read_reg(padap, A_PCIE_T5_CMD_STAT2); in t6_wtp_data()
980 wtp->pcie_cmd_stat2.sop[0] = value & 0xFF; in t6_wtp_data()
981 wtp->pcie_cmd_stat2.eop[0] = value & 0xFF; in t6_wtp_data()
983 value = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH_INDEX_7); in t6_wtp_data()
984 wtp->sge_pcie_cmd_req.sop[0] = ((value >> 20) & 0x0F); in t6_wtp_data()
985 wtp->sge_pcie_cmd_req.eop[0] = ((value >> 16) & 0x0F); in t6_wtp_data()
986 wtp->sge_pcie_cmd_req.sop[1] = ((value >> 28) & 0x0F); in t6_wtp_data()
987 wtp->sge_pcie_cmd_req.eop[1] = ((value >> 24) & 0x0F); in t6_wtp_data()
989 value = t4_read_reg(padap, A_PCIE_T5_CMD_STAT3); in t6_wtp_data()
990 wtp->pcie_cmd_stat3.sop[0] = value & 0xFF; in t6_wtp_data()
991 wtp->pcie_cmd_stat3.eop[0] = value & 0xFF; in t6_wtp_data()
1007 value = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH_INDEX_9); in t6_wtp_data()
1008 wtp->sge_work_req_pkt.sop[0] = ((value >> 4) & 0x0F); in t6_wtp_data()
1009 wtp->sge_work_req_pkt.eop[0] = ((value >> 0) & 0x0F); in t6_wtp_data()
1012 value = t4_read_reg(padap, A_PCIE_T5_DMA_STAT2 + (i * 0x10)); in t6_wtp_data()
1013 wtp->pcie_dma1_stat2.sop[i] = ((value >> 8) & 0x0F); in t6_wtp_data()
1014 wtp->pcie_dma1_stat2.eop[i] = ((value >> 8) & 0x0F); in t6_wtp_data()
1015 wtp->pcie_dma1_stat2_core.sop[i] = value & 0x0F; in t6_wtp_data()
1016 wtp->pcie_dma1_stat2_core.eop[i] = value & 0x0F; in t6_wtp_data()
1021 value = t4_read_reg(padap, A_PCIE_T5_DMA_STAT3 + (i * 0x10)); in t6_wtp_data()
1022 wtp->pcie_t5_dma_stat3.sop[i] = value & 0xFF; in t6_wtp_data()
1023 wtp->pcie_t5_dma_stat3.eop[i] = ((value >> 16) & 0xFF); in t6_wtp_data()
1028 value = t4_read_reg(padap, A_ULP_TX_SE_CNT_CH0 + (i * 4)); in t6_wtp_data()
1029 wtp->ulp_se_cnt_chx.sop[i] = ((value >> 28) & 0x0F); in t6_wtp_data()
1030 wtp->ulp_se_cnt_chx.eop[i] = ((value >> 24) & 0x0F); in t6_wtp_data()
1035 t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_CSIDE_RX0 + i), in t6_wtp_data()
1038 wtp->utx_tpcside.sop[i] = ((value >> 28) & 0xF);/*bits 28:31*/ in t6_wtp_data()
1039 wtp->utx_tpcside.eop[i] = ((value >> 24) & 0xF);/*bits 24:27*/ in t6_wtp_data()
1040 wtp->tpcside_rxarb.sop[i] = ((value >> 12) & 0xF);/*bits 12:15*/ in t6_wtp_data()
1041 wtp->tpcside_rxarb.eop[i] = ((value >> 8) & 0xF); /*bits 8:11*/ in t6_wtp_data()
1045 t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_ESIDE_PKT0 + i), in t6_wtp_data()
1049 wtp->tpeside_mps.sop[i] = ((value >> 28) & 0xF); /*bits 28:31*/ in t6_wtp_data()
1050 wtp->tpeside_mps.eop[i] = ((value >> 24) & 0xF); /*bits 24:27*/ in t6_wtp_data()
1054 value = t4_read_reg(padap, (A_MPS_TX_SE_CNT_TP01 + (i << 2))); in t6_wtp_data()
1055 wtp->tp_mps.sop[(i*2)] = ((value >> 8) & 0xFF); /*bit 8:15*/ in t6_wtp_data()
1056 wtp->tp_mps.eop[(i*2)] = ((value >> 0) & 0xFF); /*bit 0:7*/ in t6_wtp_data()
1057 wtp->tp_mps.sop[(i*2) + 1] = ((value >> 24) & 0xFF);/*bit 24:31 in t6_wtp_data()
1059 wtp->tp_mps.eop[(i*2) + 1] = ((value >> 16) & 0xFF);/*bit 16:23 in t6_wtp_data()
1064 value = t4_read_reg(padap, (A_MPS_TX_SE_CNT_MAC01 + (i << 2))); in t6_wtp_data()
1065 wtp->mps_xgm.sop[(i*2)] = ((value >> 8) & 0xFF);/*bit 8:15*/ in t6_wtp_data()
1066 wtp->mps_xgm.eop[(i*2)] = ((value >> 0) & 0xFF); /*bit 0:7*/ in t6_wtp_data()
1067 wtp->mps_xgm.sop[(i*2) + 1] = ((value >> 24) & 0xFF);/*bit 24:31 in t6_wtp_data()
1069 wtp->mps_xgm.eop[(i*2) + 1] = ((value >> 16) & 0xFF);/*bit 16:23 in t6_wtp_data()
1075 value = t4_read_reg(padap, 0x3081c + ((i * 4) << 12)); in t6_wtp_data()
1076 wtp->mac_portx_pkt_count.sop[i] = ((value >> 24) & 0xFF); in t6_wtp_data()
1077 wtp->mac_portx_pkt_count.eop[i] = ((value >> 16) & 0xFF); in t6_wtp_data()
1078 wtp->mac_porrx_pkt_count.sop[i] = ((value >> 8) & 0xFF); in t6_wtp_data()
1079 wtp->mac_porrx_pkt_count.eop[i] = ((value >> 0) & 0xFF); in t6_wtp_data()
1083 value = t4_read_reg(padap, 0x30f20 + ((i * 4) << 12)); in t6_wtp_data()
1084 wtp->mac_portx_aframestra_ok.sop[i] = value & 0xff; in t6_wtp_data()
1085 wtp->mac_portx_aframestra_ok.eop[i] = value & 0xff; in t6_wtp_data()
1091 value = t4_read_reg(padap, 0x30f60 + ((i * 4) << 12)); in t6_wtp_data()
1092 wtp->mac_portx_etherstatspkts.sop[i] = value & 0xff; in t6_wtp_data()
1093 wtp->mac_portx_etherstatspkts.eop[i] = value & 0xff; in t6_wtp_data()
1098 value = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH_INDEX_7); in t6_wtp_data()
1099 wtp->sge_debug_data_high_indx7.sop[0] = ((value >> 4) & 0x0F); in t6_wtp_data()
1100 wtp->sge_debug_data_high_indx7.eop[0] = ((value >> 0) & 0x0F); in t6_wtp_data()
1101 wtp->sge_debug_data_high_indx7.sop[1] = ((value >> 12) & 0x0F); in t6_wtp_data()
1102 wtp->sge_debug_data_high_indx7.eop[1] = ((value >> 8) & 0x0F); in t6_wtp_data()
1105 value = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH_INDEX_1); in t6_wtp_data()
1106 wtp->sge_debug_data_high_indx1.sop[0] = ((value >> 20) & 0x0F); in t6_wtp_data()
1107 wtp->sge_debug_data_high_indx1.eop[0] = ((value >> 16) & 0x0F); in t6_wtp_data()
1108 wtp->sge_debug_data_high_indx1.sop[1] = ((value >> 28) & 0x0F); in t6_wtp_data()
1109 wtp->sge_debug_data_high_indx1.eop[1] = ((value >> 24) & 0x0F); in t6_wtp_data()
1111 value = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH_INDEX_9); in t6_wtp_data()
1112 wtp->sge_debug_data_high_indx9.sop[0] = ((value >> 20) & 0x0F); in t6_wtp_data()
1113 wtp->sge_debug_data_high_indx9.sop[1] = ((value >> 28) & 0x0F); in t6_wtp_data()
1115 wtp->sge_debug_data_high_indx9.eop[0] = ((value >> 16) & 0x0F); in t6_wtp_data()
1116 wtp->sge_debug_data_high_indx9.eop[1] = ((value >> 24) & 0x0F); in t6_wtp_data()
1119 t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_CSIDE_TX0 + i), in t6_wtp_data()
1122 wtp->utx_tpcside_tx.sop[i] = ((value >> 28) & 0xF);/*bits 28:31 in t6_wtp_data()
1124 wtp->utx_tpcside_tx.eop[i] = ((value >> 24) & 0xF); in t6_wtp_data()
1129 value = t4_read_reg(padap, (A_ULP_RX_SE_CNT_CH0 + (i*4))); in t6_wtp_data()
1131 wtp->pmrx_ulprx.sop[i] = ((value >> 4) & 0xF); /*bits 4:7*/ in t6_wtp_data()
1132 wtp->pmrx_ulprx.eop[i] = ((value >> 0) & 0xF); /*bits 0:3*/ in t6_wtp_data()
1133 wtp->ulprx_tpcside.sop[i] = ((value >> 28) & 0xF);/*bits 28:31*/ in t6_wtp_data()
1134 wtp->ulprx_tpcside.eop[i] = ((value >> 24) & 0xF);/*bits 24:27*/ in t6_wtp_data()
1138 value = t4_read_reg(padap, A_LE_DB_REQ_RSP_CNT); in t6_wtp_data()
1139 wtp->le_db_rsp_cnt.sop = value & 0xF; in t6_wtp_data()
1140 wtp->le_db_rsp_cnt.eop = (value >> 16) & 0xF; in t6_wtp_data()
1144 t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_ESIDE_PKT0 + i), in t6_wtp_data()
1147 wtp->tp_dbg_eside_pktx.sop[i] = ((value >> 12) & 0xF); in t6_wtp_data()
1148 wtp->tp_dbg_eside_pktx.eop[i] = ((value >> 8) & 0xF); in t6_wtp_data()
1153 value = t4_read_reg(padap, (A_MPS_RX_SE_CNT_OUT01 + (i << 2))); in t6_wtp_data()
1154 wtp->mps_tp.sop[0] = ((value >> 8) & 0xFF); /*bit 8:15*/ in t6_wtp_data()
1155 wtp->mps_tp.eop[0] = ((value >> 0) & 0xFF); /*bit 0:7*/ in t6_wtp_data()
1156 wtp->mps_tp.sop[1] = ((value >> 24) & 0xFF); /*bit 24:31*/ in t6_wtp_data()
1157 wtp->mps_tp.eop[1] = ((value >> 16) & 0xFF); /*bit 16:23*/ in t6_wtp_data()
1159 drop = ptp_mib->TP_MIB_TNL_CNG_DROP_0.value; in t6_wtp_data()
1160 drop += ptp_mib->TP_MIB_TNL_CNG_DROP_1.value; in t6_wtp_data()
1161 drop += ptp_mib->TP_MIB_OFD_CHN_DROP_0.value; in t6_wtp_data()
1162 drop += ptp_mib->TP_MIB_OFD_CHN_DROP_1.value; in t6_wtp_data()
1163 drop += ptp_mib->TP_MIB_FCOE_DROP_0.value; in t6_wtp_data()
1164 drop += ptp_mib->TP_MIB_FCOE_DROP_1.value; in t6_wtp_data()
1165 drop += ptp_mib->TP_MIB_OFD_VLN_DROP_0.value; in t6_wtp_data()
1166 drop += ptp_mib->TP_MIB_OFD_VLN_DROP_1.value; in t6_wtp_data()
1167 drop += ptp_mib->TP_MIB_USM_DROP.value; in t6_wtp_data()
1173 value = t4_read_reg(padap, (A_MPS_RX_SE_CNT_IN0 + (i << 2))); in t6_wtp_data()
1175 wtp->xgm_mps.sop[i] = ((value >> 8) & 0xFF); /*bits 8:15*/ in t6_wtp_data()
1176 wtp->xgm_mps.eop[i] = ((value >> 0) & 0xFF); /*bits 0:7*/ in t6_wtp_data()
1179 value = t4_read_reg(padap, (A_MPS_RX_CLS_DROP_CNT0 + (i << 2))); in t6_wtp_data()
1180 drop += (value & 0xFFFF) + ((value >> 16) & 0xFFFF); in t6_wtp_data()
1185 value = t4_read_reg(padap, 0x30e20 + ((i * 4) << 12)); in t6_wtp_data()
1186 wtp->mac_porrx_aframestra_ok.sop[i] = value & 0xff; in t6_wtp_data()
1187 wtp->mac_porrx_aframestra_ok.eop[i] = value & 0xff; in t6_wtp_data()
1192 value = t4_read_reg(padap, 0x30e60 + ((i * 4) << 12)); in t6_wtp_data()
1193 wtp->mac_porrx_etherstatspkts.sop[i] = value & 0xff; in t6_wtp_data()
1194 wtp->mac_porrx_etherstatspkts.eop[i] = value & 0xff; in t6_wtp_data()
1205 value = t4_read_reg(padap, in t6_wtp_data()
1208 drop += value; in t6_wtp_data()
1209 value = t4_read_reg(padap, in t6_wtp_data()
1212 value = t4_read_reg(padap, in t6_wtp_data()
1215 drop += value; in t6_wtp_data()
1216 value = t4_read_reg(padap, in t6_wtp_data()
1220 value = t4_read_reg(padap, in t6_wtp_data()
1223 drop += value; in t6_wtp_data()
1224 value = t4_read_reg(padap, in t6_wtp_data()
1227 value = t4_read_reg(padap, in t6_wtp_data()
1230 drop += value; in t6_wtp_data()
1231 value = t4_read_reg(padap, in t6_wtp_data()
1235 value = t4_read_reg(padap, in t6_wtp_data()
1238 drop += value; in t6_wtp_data()
1246 value = t4_read_reg(padap, in t6_wtp_data()
1249 err += value; in t6_wtp_data()
1250 value = t4_read_reg(padap, in t6_wtp_data()
1254 value = t4_read_reg(padap, in t6_wtp_data()
1257 err += value; in t6_wtp_data()
1258 value = t4_read_reg(padap, in t6_wtp_data()
1262 value = t4_read_reg(padap, in t6_wtp_data()
1265 err += value; in t6_wtp_data()
1266 value = t4_read_reg(padap, in t6_wtp_data()
1270 value = t4_read_reg(padap, in t6_wtp_data()
1273 err += value; in t6_wtp_data()
1274 value = t4_read_reg(padap, in t6_wtp_data()
1278 value = t4_read_reg(padap, in t6_wtp_data()
1281 err += value; in t6_wtp_data()
1282 value = t4_read_reg(padap, in t6_wtp_data()
1286 value = t4_read_reg(padap, in t6_wtp_data()
1289 err += value; in t6_wtp_data()
1290 value = t4_read_reg(padap, in t6_wtp_data()