Lines Matching refs:i
272 int i = 0; in read_sge_debug_data() local
274 for (i = 0; i <= 15; i++) { in read_sge_debug_data()
275 t4_write_reg(padap, A_SGE_DEBUG_INDEX, (u32)i); in read_sge_debug_data()
278 sge_dbg_reg[(i << 1) | 1] = HTONL_NIBBLE(value); in read_sge_debug_data()
281 sge_dbg_reg[(i << 1)] = HTONL_NIBBLE(value); in read_sge_debug_data()
291 u32 i = 0; in read_tp_mib_data() local
293 for (i = 0; i < TP_MIB_SIZE; i++) { in read_tp_mib_data()
294 t4_tp_mib_read(padap, &tp_mib[i].value, 1, in read_tp_mib_data()
295 (u32)tp_mib[i].addr, true); in read_tp_mib_data()
314 u32 i = 0; in t5_wtp_data() local
355 for (i = 0; i < 4; i++) { in t5_wtp_data()
356 value = t4_read_reg(padap, A_PCIE_T5_DMA_STAT3 + (i * 0x10)); in t5_wtp_data()
357 wtp->pcie_t5_dma_stat3.sop[i] = value & 0xFF; in t5_wtp_data()
358 wtp->pcie_t5_dma_stat3.eop[i] = ((value >> 16) & 0xFF); in t5_wtp_data()
384 for (i = 0; i < 4; i++) { in t5_wtp_data()
385 value = t4_read_reg(padap, A_ULP_TX_SE_CNT_CH0 + (i * 4)); in t5_wtp_data()
386 wtp->ulp_se_cnt_chx.sop[i] = ((value >> 28) & 0x0F); in t5_wtp_data()
387 wtp->ulp_se_cnt_chx.eop[i] = ((value >> 24) & 0x0F); in t5_wtp_data()
391 for (i = 0; i < 4; i++) { in t5_wtp_data()
392 value = t4_read_reg(padap, 0x3081c + ((i * 4) << 12)); in t5_wtp_data()
393 wtp->mac_portx_pkt_count.sop[i] = ((value >> 24) & 0xFF); in t5_wtp_data()
394 wtp->mac_portx_pkt_count.eop[i] = ((value >> 16) & 0xFF); in t5_wtp_data()
395 wtp->mac_porrx_pkt_count.sop[i] = ((value >> 8) & 0xFF); in t5_wtp_data()
396 wtp->mac_porrx_pkt_count.eop[i] = ((value >> 0) & 0xFF); in t5_wtp_data()
400 for (i = 0; i < 4; i++) { in t5_wtp_data()
401 value = t4_read_reg(padap, 0x30a80 + ((i * 4) << 12)); in t5_wtp_data()
402 wtp->mac_portx_aframestra_ok.sop[i] = (value & 0xFF); in t5_wtp_data()
403 wtp->mac_portx_aframestra_ok.eop[i] = (value & 0xFF); in t5_wtp_data()
502 for (i = 0; i < 4; i++) { in t5_wtp_data()
503 value = t4_read_reg(padap, (A_ULP_TX_SE_CNT_CH0 + (i*4))); in t5_wtp_data()
505 wtp->utx_tp.sop[i] = ((value >> 28) & 0xF); /*bits 28:31*/ in t5_wtp_data()
506 wtp->utx_tp.eop[i] = ((value >> 24) & 0xF); /*bits 24:27*/ in t5_wtp_data()
510 for (i = 0; i < 4; i++) { in t5_wtp_data()
511 t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_CSIDE_RX0 + i), in t5_wtp_data()
514 wtp->utx_tpcside.sop[i] = ((value >> 28) & 0xF);/*bits 28:31*/ in t5_wtp_data()
515 wtp->utx_tpcside.eop[i] = ((value >> 24) & 0xF);/*bits 24:27*/ in t5_wtp_data()
516 wtp->tpcside_rxpld.sop[i] = ((value >> 20) & 0xF);/*bits 20:23*/ in t5_wtp_data()
517 wtp->tpcside_rxpld.eop[i] = ((value >> 16) & 0xF);/*bits 16:19*/ in t5_wtp_data()
518 wtp->tpcside_rxarb.sop[i] = ((value >> 12) & 0xF);/*bits 12:15*/ in t5_wtp_data()
519 wtp->tpcside_rxarb.eop[i] = ((value >> 8) & 0xF); /*bits 8:11*/ in t5_wtp_data()
520 wtp->tpcside_rxcpl.sop[i] = ((value >> 4) & 0xF); /*bits 4:7*/ in t5_wtp_data()
521 wtp->tpcside_rxcpl.eop[i] = ((value >> 0) & 0xF); /*bits 0:3*/ in t5_wtp_data()
525 for (i = 0; i < 4; i++) { in t5_wtp_data()
526 t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_ESIDE_PKT0 + i), in t5_wtp_data()
529 wtp->tpeside_mps.sop[i] = ((value >> 28) & 0xF); /*bits 28:31*/ in t5_wtp_data()
530 wtp->tpeside_mps.eop[i] = ((value >> 24) & 0xF); /*bits 24:27*/ in t5_wtp_data()
531 wtp->tpeside_pm.sop[i] = ((value >> 20) & 0xF); /*bits 20:23*/ in t5_wtp_data()
532 wtp->tpeside_pm.eop[i] = ((value >> 16) & 0xF); /*bits 16:19*/ in t5_wtp_data()
533 wtp->mps_tpeside.sop[i] = ((value >> 12) & 0xF); /*bits 12:15*/ in t5_wtp_data()
534 wtp->mps_tpeside.eop[i] = ((value >> 8) & 0xF); /*bits 8:11*/ in t5_wtp_data()
535 wtp->tpeside_pld.sop[i] = ((value >> 4) & 0xF); /*bits 4:7*/ in t5_wtp_data()
536 wtp->tpeside_pld.eop[i] = ((value >> 0) & 0xF); /*bits 0:3*/ in t5_wtp_data()
541 for (i = 0; i < 3; i++) { in t5_wtp_data()
542 value = t4_read_reg(padap, 0x5988 + (i * 0x10)); in t5_wtp_data()
543 wtp->pcie_cmd_stat2.sop[i] = value & 0xFF; in t5_wtp_data()
544 wtp->pcie_cmd_stat2.eop[i] = value & 0xFF; in t5_wtp_data()
548 for (i = 0; i < 3; i++) { in t5_wtp_data()
549 value = t4_read_reg(padap, 0x598c + (i * 0x10)); in t5_wtp_data()
550 wtp->pcie_cmd_stat3.sop[i] = value & 0xFF; in t5_wtp_data()
551 wtp->pcie_cmd_stat3.eop[i] = value & 0xFF; in t5_wtp_data()
555 for (i = 0; i < 2; i++) { in t5_wtp_data()
556 value = t4_read_reg(padap, (A_ULP_RX_SE_CNT_CH0 + (i*4))); in t5_wtp_data()
558 wtp->pmrx_ulprx.sop[i] = ((value >> 4) & 0xF); /*bits 4:7*/ in t5_wtp_data()
559 wtp->pmrx_ulprx.eop[i] = ((value >> 0) & 0xF); /*bits 0:3*/ in t5_wtp_data()
560 wtp->ulprx_tpcside.sop[i] = ((value >> 28) & 0xF);/*bits 28:31*/ in t5_wtp_data()
561 wtp->ulprx_tpcside.eop[i] = ((value >> 24) & 0xF);/*bits 24:27*/ in t5_wtp_data()
566 for (i = 0; i < 2; i++) { in t5_wtp_data()
567 value = t4_read_reg(padap, (A_MPS_TX_SE_CNT_TP01 + (i << 2))); in t5_wtp_data()
568 wtp->tp_mps.sop[(i*2)] = ((value >> 8) & 0xFF); /*bit 8:15*/ in t5_wtp_data()
569 wtp->tp_mps.eop[(i*2)] = ((value >> 0) & 0xFF); /*bit 0:7*/ in t5_wtp_data()
570 wtp->tp_mps.sop[(i*2) + 1] = ((value >> 24) & 0xFF);/*bit 24:31 in t5_wtp_data()
572 wtp->tp_mps.eop[(i*2) + 1] = ((value >> 16) & 0xFF);/*bit 16:23 in t5_wtp_data()
587 for (i = 0; i < 2; i++) { in t5_wtp_data()
588 value = t4_read_reg(padap, (A_MPS_TX_SE_CNT_MAC01 + (i << 2))); in t5_wtp_data()
589 wtp->mps_xgm.sop[(i*2)] = ((value >> 8) & 0xFF);/*bit 8:15*/ in t5_wtp_data()
590 wtp->mps_xgm.eop[(i*2)] = ((value >> 0) & 0xFF);/*bit 0:7*/ in t5_wtp_data()
591 wtp->mps_xgm.sop[(i*2) + 1] = ((value >> 24) & 0xFF);/*bit 24:31 in t5_wtp_data()
593 wtp->mps_xgm.eop[(i*2) + 1] = ((value >> 16) & 0xFF);/*bit 16:23 in t5_wtp_data()
596 for (i = 0; i < 4; i++) { in t5_wtp_data()
599 (i * T5_PORT_STRIDE))); in t5_wtp_data()
609 for (i = 0; i < 4; i++) { in t5_wtp_data()
612 (i * T5_PORT_STRIDE))); in t5_wtp_data()
614 wtp->tx_xgm_xgm.sop[i] = ((value >> 24) & 0xFF); /*bit 24:31*/ in t5_wtp_data()
615 wtp->tx_xgm_xgm.eop[i] = ((value >> 16) & 0xFF); /*bit 16:23*/ in t5_wtp_data()
616 wtp->rx_xgm_xgm.sop[i] = ((value >> 8) & 0xFF); /*bit 8:15*/ in t5_wtp_data()
617 wtp->rx_xgm_xgm.eop[i] = ((value >> 0) & 0xFF); /*bit 0:7*/ in t5_wtp_data()
622 for (i = 0; i < 4; i++) { in t5_wtp_data()
625 (i * T5_PORT_STRIDE))); in t5_wtp_data()
626 wtp->xgm_wire.sop[i] = (value); in t5_wtp_data()
627 wtp->xgm_wire.eop[i] = (value); /* No EOP for XGMAC, so fake in t5_wtp_data()
637 for (i = 0; i < 4; i++) { in t5_wtp_data()
640 (i * T5_PORT_STRIDE))); in t5_wtp_data()
642 wtp->wire_xgm.sop[i] = (value); in t5_wtp_data()
643 wtp->wire_xgm.eop[i] = (value); /* No EOP for XGMAC, so fake in t5_wtp_data()
651 for (i = 0; i < 8; i++) { in t5_wtp_data()
652 value = t4_read_reg(padap, (A_MPS_RX_SE_CNT_IN0 + (i << 2))); in t5_wtp_data()
654 wtp->xgm_mps.sop[i] = ((value >> 8) & 0xFF); /*bits 8:15*/ in t5_wtp_data()
655 wtp->xgm_mps.eop[i] = ((value >> 0) & 0xFF); /*bits 0:7*/ in t5_wtp_data()
657 for (i = 0; i < 4; i++) { in t5_wtp_data()
658 value = t4_read_reg(padap, (A_MPS_RX_CLS_DROP_CNT0 + (i << 2))); in t5_wtp_data()
666 for (i = 0; i < 4; i++) { in t5_wtp_data()
669 (i << 3))); in t5_wtp_data()
673 (i << 2))); in t5_wtp_data()
676 (i << 3))); in t5_wtp_data()
680 (i << 2))); in t5_wtp_data()
684 (i << 3))); in t5_wtp_data()
688 (i << 3))); in t5_wtp_data()
691 (i << 3))); in t5_wtp_data()
695 (i << 3))); in t5_wtp_data()
699 (i * T5_PORT_STRIDE)); in t5_wtp_data()
706 for (i = 0; i < 4; i++) { in t5_wtp_data()
710 (i * T5_PORT_STRIDE))); in t5_wtp_data()
714 (i * T5_PORT_STRIDE) + 4)); in t5_wtp_data()
718 (i * T5_PORT_STRIDE))); in t5_wtp_data()
722 (i * T5_PORT_STRIDE) + 4)); in t5_wtp_data()
726 (i * T5_PORT_STRIDE))); in t5_wtp_data()
730 (i * T5_PORT_STRIDE) + 4)); in t5_wtp_data()
734 (i * T5_PORT_STRIDE))); in t5_wtp_data()
738 (i * T5_PORT_STRIDE) + 4)); in t5_wtp_data()
742 (i * T5_PORT_STRIDE))); in t5_wtp_data()
746 (i * T5_PORT_STRIDE) + 4)); in t5_wtp_data()
750 (i * T5_PORT_STRIDE))); in t5_wtp_data()
754 (i * T5_PORT_STRIDE) + 4))); in t5_wtp_data()
759 for (i = 0; i < 2; i++) { in t5_wtp_data()
760 value = t4_read_reg(padap, (A_MPS_RX_SE_CNT_OUT01 + (i << 2))); in t5_wtp_data()
762 wtp->mps_tp.sop[(i*2)] = ((value >> 8) & 0xFF); /*bit 8:15*/ in t5_wtp_data()
763 wtp->mps_tp.eop[(i*2)] = ((value >> 0) & 0xFF); /*bit 0:7*/ in t5_wtp_data()
764 wtp->mps_tp.sop[(i*2) + 1] = ((value >> 24) & 0xFF);/*bit 24:31 in t5_wtp_data()
766 wtp->mps_tp.eop[(i*2) + 1] = ((value >> 16) & 0xFF);/*bit 16:23 in t5_wtp_data()
790 for (i = 0; i < 4; i++) { in t5_wtp_data()
791 t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_CSIDE_RX0 + i), in t5_wtp_data()
794 wtp->tpcside_csw.sop[i] = ((value >> 28) & 0xF);/*bits 28:31*/ in t5_wtp_data()
795 wtp->tpcside_csw.eop[i] = ((value >> 24) & 0xF);/*bits 24:27*/ in t5_wtp_data()
796 wtp->tpcside_pm.sop[i] = ((value >> 20) & 0xF);/*bits 20:23*/ in t5_wtp_data()
797 wtp->tpcside_pm.eop[i] = ((value >> 16) & 0xF);/*bits 16:19*/ in t5_wtp_data()
798 wtp->tpcside_uturn.sop[i] = ((value >> 12) & 0xF);/*bits 12:15*/ in t5_wtp_data()
799 wtp->tpcside_uturn.eop[i] = ((value >> 8) & 0xF); /*bits 8:11*/ in t5_wtp_data()
800 wtp->tpcside_txcpl.sop[i] = ((value >> 4) & 0xF); /*bits 4:7*/ in t5_wtp_data()
801 wtp->tpcside_txcpl.eop[i] = ((value >> 0) & 0xF); /*bits 0:3*/ in t5_wtp_data()
839 for (i = 0; i < 4; i++) { in t5_wtp_data()
840 value = t4_read_reg(padap, A_PCIE_T5_DMA_STAT2 + (i * 0x10)); in t5_wtp_data()
841 wtp->pcie_dma1_stat2.sop[i] = ((value >> 8) & 0x0F); in t5_wtp_data()
842 wtp->pcie_dma1_stat2.eop[i] = ((value >> 8) & 0x0F); in t5_wtp_data()
843 wtp->pcie_dma1_stat2_core.sop[i] += value & 0x0F; in t5_wtp_data()
844 wtp->pcie_dma1_stat2_core.eop[i] += value & 0x0F; in t5_wtp_data()
848 for (i = 0; i < 4; i++) { in t5_wtp_data()
849 value = t4_read_reg(padap, 0x30a88 + ((i * 4) << 12)); in t5_wtp_data()
850 wtp->mac_porrx_aframestra_ok.sop[i] = (value & 0xFF); in t5_wtp_data()
851 wtp->mac_porrx_aframestra_ok.eop[i] = (value & 0xFF); in t5_wtp_data()
873 for (i = 0; i < 2; i++) { in t5_wtp_data()
874 t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_CSIDE_TX0 + i), in t5_wtp_data()
877 wtp->utx_tpcside_tx.sop[i] = ((value >> 28) & 0xF);/*bits 28:31 in t5_wtp_data()
879 wtp->utx_tpcside_tx.eop[i] = ((value >> 24) & 0xF); in t5_wtp_data()
897 for (i = 0; i < 4; i++) { in t5_wtp_data()
898 t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_ESIDE_PKT0 + i), in t5_wtp_data()
901 wtp->tp_dbg_eside_pktx.sop[i] = ((value >> 12) & 0xF); in t5_wtp_data()
902 wtp->tp_dbg_eside_pktx.eop[i] = ((value >> 8) & 0xF); in t5_wtp_data()
957 u32 i = 0; in t6_wtp_data() local
1011 for (i = 0; i < 2; i++) { in t6_wtp_data()
1012 value = t4_read_reg(padap, A_PCIE_T5_DMA_STAT2 + (i * 0x10)); in t6_wtp_data()
1013 wtp->pcie_dma1_stat2.sop[i] = ((value >> 8) & 0x0F); in t6_wtp_data()
1014 wtp->pcie_dma1_stat2.eop[i] = ((value >> 8) & 0x0F); in t6_wtp_data()
1015 wtp->pcie_dma1_stat2_core.sop[i] = value & 0x0F; in t6_wtp_data()
1016 wtp->pcie_dma1_stat2_core.eop[i] = value & 0x0F; in t6_wtp_data()
1020 for (i = 0; i < 2; i++) { in t6_wtp_data()
1021 value = t4_read_reg(padap, A_PCIE_T5_DMA_STAT3 + (i * 0x10)); in t6_wtp_data()
1022 wtp->pcie_t5_dma_stat3.sop[i] = value & 0xFF; in t6_wtp_data()
1023 wtp->pcie_t5_dma_stat3.eop[i] = ((value >> 16) & 0xFF); in t6_wtp_data()
1027 for (i = 0; i < 4; i++) { in t6_wtp_data()
1028 value = t4_read_reg(padap, A_ULP_TX_SE_CNT_CH0 + (i * 4)); in t6_wtp_data()
1029 wtp->ulp_se_cnt_chx.sop[i] = ((value >> 28) & 0x0F); in t6_wtp_data()
1030 wtp->ulp_se_cnt_chx.eop[i] = ((value >> 24) & 0x0F); in t6_wtp_data()
1034 for (i = 0; i < 4; i++) { in t6_wtp_data()
1035 t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_CSIDE_RX0 + i), in t6_wtp_data()
1038 wtp->utx_tpcside.sop[i] = ((value >> 28) & 0xF);/*bits 28:31*/ in t6_wtp_data()
1039 wtp->utx_tpcside.eop[i] = ((value >> 24) & 0xF);/*bits 24:27*/ in t6_wtp_data()
1040 wtp->tpcside_rxarb.sop[i] = ((value >> 12) & 0xF);/*bits 12:15*/ in t6_wtp_data()
1041 wtp->tpcside_rxarb.eop[i] = ((value >> 8) & 0xF); /*bits 8:11*/ in t6_wtp_data()
1044 for (i = 0; i < 4; i++) { in t6_wtp_data()
1045 t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_ESIDE_PKT0 + i), in t6_wtp_data()
1049 wtp->tpeside_mps.sop[i] = ((value >> 28) & 0xF); /*bits 28:31*/ in t6_wtp_data()
1050 wtp->tpeside_mps.eop[i] = ((value >> 24) & 0xF); /*bits 24:27*/ in t6_wtp_data()
1053 for (i = 0; i < 2; i++) { in t6_wtp_data()
1054 value = t4_read_reg(padap, (A_MPS_TX_SE_CNT_TP01 + (i << 2))); in t6_wtp_data()
1055 wtp->tp_mps.sop[(i*2)] = ((value >> 8) & 0xFF); /*bit 8:15*/ in t6_wtp_data()
1056 wtp->tp_mps.eop[(i*2)] = ((value >> 0) & 0xFF); /*bit 0:7*/ in t6_wtp_data()
1057 wtp->tp_mps.sop[(i*2) + 1] = ((value >> 24) & 0xFF);/*bit 24:31 in t6_wtp_data()
1059 wtp->tp_mps.eop[(i*2) + 1] = ((value >> 16) & 0xFF);/*bit 16:23 in t6_wtp_data()
1063 for (i = 0; i < 2; i++) { in t6_wtp_data()
1064 value = t4_read_reg(padap, (A_MPS_TX_SE_CNT_MAC01 + (i << 2))); in t6_wtp_data()
1065 wtp->mps_xgm.sop[(i*2)] = ((value >> 8) & 0xFF);/*bit 8:15*/ in t6_wtp_data()
1066 wtp->mps_xgm.eop[(i*2)] = ((value >> 0) & 0xFF); /*bit 0:7*/ in t6_wtp_data()
1067 wtp->mps_xgm.sop[(i*2) + 1] = ((value >> 24) & 0xFF);/*bit 24:31 in t6_wtp_data()
1069 wtp->mps_xgm.eop[(i*2) + 1] = ((value >> 16) & 0xFF);/*bit 16:23 in t6_wtp_data()
1074 for (i = 0; i < 2; i++) { in t6_wtp_data()
1075 value = t4_read_reg(padap, 0x3081c + ((i * 4) << 12)); in t6_wtp_data()
1076 wtp->mac_portx_pkt_count.sop[i] = ((value >> 24) & 0xFF); in t6_wtp_data()
1077 wtp->mac_portx_pkt_count.eop[i] = ((value >> 16) & 0xFF); in t6_wtp_data()
1078 wtp->mac_porrx_pkt_count.sop[i] = ((value >> 8) & 0xFF); in t6_wtp_data()
1079 wtp->mac_porrx_pkt_count.eop[i] = ((value >> 0) & 0xFF); in t6_wtp_data()
1082 for (i = 0; i < 2; i++) { in t6_wtp_data()
1083 value = t4_read_reg(padap, 0x30f20 + ((i * 4) << 12)); in t6_wtp_data()
1084 wtp->mac_portx_aframestra_ok.sop[i] = value & 0xff; in t6_wtp_data()
1085 wtp->mac_portx_aframestra_ok.eop[i] = value & 0xff; in t6_wtp_data()
1090 for (i = 0; i < 2; i++) { in t6_wtp_data()
1091 value = t4_read_reg(padap, 0x30f60 + ((i * 4) << 12)); in t6_wtp_data()
1092 wtp->mac_portx_etherstatspkts.sop[i] = value & 0xff; in t6_wtp_data()
1093 wtp->mac_portx_etherstatspkts.eop[i] = value & 0xff; in t6_wtp_data()
1118 for (i = 0; i < 2; i++) { in t6_wtp_data()
1119 t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_CSIDE_TX0 + i), in t6_wtp_data()
1122 wtp->utx_tpcside_tx.sop[i] = ((value >> 28) & 0xF);/*bits 28:31 in t6_wtp_data()
1124 wtp->utx_tpcside_tx.eop[i] = ((value >> 24) & 0xF); in t6_wtp_data()
1128 for (i = 0; i < 2; i++) { in t6_wtp_data()
1129 value = t4_read_reg(padap, (A_ULP_RX_SE_CNT_CH0 + (i*4))); in t6_wtp_data()
1131 wtp->pmrx_ulprx.sop[i] = ((value >> 4) & 0xF); /*bits 4:7*/ in t6_wtp_data()
1132 wtp->pmrx_ulprx.eop[i] = ((value >> 0) & 0xF); /*bits 0:3*/ in t6_wtp_data()
1133 wtp->ulprx_tpcside.sop[i] = ((value >> 28) & 0xF);/*bits 28:31*/ in t6_wtp_data()
1134 wtp->ulprx_tpcside.eop[i] = ((value >> 24) & 0xF);/*bits 24:27*/ in t6_wtp_data()
1143 for (i = 0; i < 4; i++) { in t6_wtp_data()
1144 t4_tp_pio_read(padap, &value, 1, (u32)(A_TP_DBG_ESIDE_PKT0 + i), in t6_wtp_data()
1147 wtp->tp_dbg_eside_pktx.sop[i] = ((value >> 12) & 0xF); in t6_wtp_data()
1148 wtp->tp_dbg_eside_pktx.eop[i] = ((value >> 8) & 0xF); in t6_wtp_data()
1153 value = t4_read_reg(padap, (A_MPS_RX_SE_CNT_OUT01 + (i << 2))); in t6_wtp_data()
1172 for (i = 0; i < 8; i++) { in t6_wtp_data()
1173 value = t4_read_reg(padap, (A_MPS_RX_SE_CNT_IN0 + (i << 2))); in t6_wtp_data()
1175 wtp->xgm_mps.sop[i] = ((value >> 8) & 0xFF); /*bits 8:15*/ in t6_wtp_data()
1176 wtp->xgm_mps.eop[i] = ((value >> 0) & 0xFF); /*bits 0:7*/ in t6_wtp_data()
1178 for (i = 0; i < 2; i++) { in t6_wtp_data()
1179 value = t4_read_reg(padap, (A_MPS_RX_CLS_DROP_CNT0 + (i << 2))); in t6_wtp_data()
1184 for (i = 0; i < 2; i++) { in t6_wtp_data()
1185 value = t4_read_reg(padap, 0x30e20 + ((i * 4) << 12)); in t6_wtp_data()
1186 wtp->mac_porrx_aframestra_ok.sop[i] = value & 0xff; in t6_wtp_data()
1187 wtp->mac_porrx_aframestra_ok.eop[i] = value & 0xff; in t6_wtp_data()
1191 for (i = 0; i < 2; i++) { in t6_wtp_data()
1192 value = t4_read_reg(padap, 0x30e60 + ((i * 4) << 12)); in t6_wtp_data()
1193 wtp->mac_porrx_etherstatspkts.sop[i] = value & 0xff; in t6_wtp_data()
1194 wtp->mac_porrx_etherstatspkts.eop[i] = value & 0xff; in t6_wtp_data()
1204 for (i = 0; i < 2; i++) { in t6_wtp_data()
1207 (i << 3))); in t6_wtp_data()
1211 (i << 2))); in t6_wtp_data()
1214 (i << 3))); in t6_wtp_data()
1218 (i << 2))); in t6_wtp_data()
1222 (i << 3))); in t6_wtp_data()
1226 (i << 3))); in t6_wtp_data()
1229 (i << 3))); in t6_wtp_data()
1233 (i << 3))); in t6_wtp_data()
1237 (i * T5_PORT_STRIDE))); in t6_wtp_data()
1244 for (i = 0; i < 2; i++) { in t6_wtp_data()
1248 (i * T5_PORT_STRIDE))); in t6_wtp_data()
1252 (i * T5_PORT_STRIDE) + 4)); in t6_wtp_data()
1256 (i * T5_PORT_STRIDE))); in t6_wtp_data()
1260 (i * T5_PORT_STRIDE) + 4)); in t6_wtp_data()
1264 (i * T5_PORT_STRIDE))); in t6_wtp_data()
1268 (i * T5_PORT_STRIDE) + 4)); in t6_wtp_data()
1272 (i * T5_PORT_STRIDE))); in t6_wtp_data()
1276 (i * T5_PORT_STRIDE) + 4)); in t6_wtp_data()
1280 (i * T5_PORT_STRIDE))); in t6_wtp_data()
1284 (i * T5_PORT_STRIDE) + 4)); in t6_wtp_data()
1288 (i * T5_PORT_STRIDE))); in t6_wtp_data()
1292 (i * T5_PORT_STRIDE) + 4)); in t6_wtp_data()