Lines Matching refs:adapter

33 	adapter_t *adapter;  member
44 #define is_MC4A(adapter) (!t1_is_T1B(adapter)) argument
47 static unsigned int __devinit mc4_calc_size(adapter_t *adapter) in mc4_calc_size() argument
49 u32 mc4_cfg = t1_read_reg_4(adapter, A_MC4_CFG); in mc4_calc_size()
50 unsigned int width = is_MC4A(adapter) ? G_MC4A_WIDTH(mc4_cfg) : in mc4_calc_size()
62 static int wrreg_wait(adapter_t *adapter, unsigned int addr, u32 val) in wrreg_wait() argument
66 t1_write_reg_4(adapter, addr, val); in wrreg_wait()
67 val = t1_read_reg_4(adapter, addr); /* flush */ in wrreg_wait()
69 if (!(t1_read_reg_4(adapter, addr) & F_BUSY)) in wrreg_wait()
75 adapter_name(adapter), addr); in wrreg_wait()
86 adapter_t *adapter = mc4->adapter; in t1_mc4_init() local
89 val = t1_read_reg_4(adapter, A_MC4_CFG); in t1_mc4_init()
90 t1_write_reg_4(adapter, A_MC4_CFG, val | F_POWER_UP); in t1_mc4_init()
91 val = t1_read_reg_4(adapter, A_MC4_CFG); /* flush */ in t1_mc4_init()
93 if (is_MC4A(adapter)) { in t1_mc4_init()
100 val = t1_read_reg_4(adapter, A_MC4_STROBE); in t1_mc4_init()
101 t1_write_reg_4(adapter, A_MC4_STROBE, in t1_mc4_init()
112 if (t1_is_asic(adapter) && !slow_mode) { in t1_mc4_init()
113 val = t1_read_reg_4(adapter, A_MC4_STROBE); in t1_mc4_init()
114 t1_write_reg_4(adapter, A_MC4_STROBE, in t1_mc4_init()
121 val = t1_read_reg_4(adapter, A_MC4_STROBE); in t1_mc4_init()
125 adapter_name(adapter)); in t1_mc4_init()
134 ext_mode = t1_is_asic(adapter) && !slow_mode ? 0 : 1; in t1_mc4_init()
135 if (wrreg_wait(adapter, A_MC4_EXT_MODE, ext_mode)) in t1_mc4_init()
139 if (wrreg_wait(adapter, A_MC4_MODE, 0x32)) in t1_mc4_init()
143 val = t1_read_reg_4(adapter, A_MC4_REFRESH); in t1_mc4_init()
144 if (wrreg_wait(adapter, A_MC4_REFRESH, val & ~F_REFRESH_ENABLE)) in t1_mc4_init()
148 if (wrreg_wait(adapter, A_MC4_REFRESH, val & ~F_REFRESH_ENABLE)) in t1_mc4_init()
157 t1_write_reg_4(adapter, A_MC4_REFRESH, in t1_mc4_init()
159 (void) t1_read_reg_4(adapter, A_MC4_REFRESH); /* flush */ in t1_mc4_init()
161 t1_write_reg_4(adapter, A_MC4_ECC_CNTL, in t1_mc4_init()
165 t1_write_reg_4(adapter, A_MC4_BIST_ADDR_BEG, 0); in t1_mc4_init()
166 t1_write_reg_4(adapter, A_MC4_BIST_ADDR_END, (mc4->size << width) - 1); in t1_mc4_init()
167 t1_write_reg_4(adapter, A_MC4_BIST_DATA, 0); in t1_mc4_init()
168 t1_write_reg_4(adapter, A_MC4_BIST_OP, V_OP(1) | 0x1f0); in t1_mc4_init()
169 (void) t1_read_reg_4(adapter, A_MC4_BIST_OP); /* flush */ in t1_mc4_init()
174 val = t1_read_reg_4(adapter, A_MC4_BIST_OP); in t1_mc4_init()
177 CH_ERR("%s: MC4 BIST timed out\n", adapter_name(adapter)); in t1_mc4_init()
182 val = t1_read_reg_4(adapter, A_MC4_CFG); in t1_mc4_init()
183 t1_write_reg_4(adapter, A_MC4_CFG, val | F_READY); in t1_mc4_init()
184 val = t1_read_reg_4(adapter, A_MC4_CFG); /* flush */ in t1_mc4_init()
191 struct pemc4 * __devinit t1_mc4_create(adapter_t *adapter) in t1_mc4_create() argument
196 mc4->adapter = adapter; in t1_mc4_create()
197 mc4->size = mc4_calc_size(adapter); in t1_mc4_create()
214 if (t1_is_asic(mc4->adapter)) { in t1_mc4_intr_enable()
215 t1_write_reg_4(mc4->adapter, A_MC4_INT_ENABLE, MC4_INT_MASK); in t1_mc4_intr_enable()
217 pl_intr = t1_read_reg_4(mc4->adapter, A_PL_ENABLE); in t1_mc4_intr_enable()
218 t1_write_reg_4(mc4->adapter, A_PL_ENABLE, in t1_mc4_intr_enable()
227 if (t1_is_asic(mc4->adapter)) { in t1_mc4_intr_disable()
228 t1_write_reg_4(mc4->adapter, A_MC4_INT_ENABLE, 0); in t1_mc4_intr_disable()
230 pl_intr = t1_read_reg_4(mc4->adapter, A_PL_ENABLE); in t1_mc4_intr_disable()
231 t1_write_reg_4(mc4->adapter, A_PL_ENABLE, in t1_mc4_intr_disable()
238 if (t1_is_asic(mc4->adapter)) { in t1_mc4_intr_clear()
239 t1_write_reg_4(mc4->adapter, A_MC4_INT_CAUSE, 0xffffffff); in t1_mc4_intr_clear()
240 t1_write_reg_4(mc4->adapter, A_PL_CAUSE, F_PL_INTR_MC4); in t1_mc4_intr_clear()
246 adapter_t *adapter = mc4->adapter; in t1_mc4_intr_handler() local
247 u32 cause = t1_read_reg_4(adapter, A_MC4_INT_CAUSE); in t1_mc4_intr_handler()
253 adapter_name(adapter), in t1_mc4_intr_handler()
254 G_MC4_CE_ADDR(t1_read_reg_4(adapter, A_MC4_CE_ADDR)), in t1_mc4_intr_handler()
255 t1_read_reg_4(adapter, A_MC4_CE_DATA0), in t1_mc4_intr_handler()
256 t1_read_reg_4(adapter, A_MC4_CE_DATA1), in t1_mc4_intr_handler()
257 t1_read_reg_4(adapter, A_MC4_CE_DATA2), in t1_mc4_intr_handler()
258 t1_read_reg_4(adapter, A_MC4_CE_DATA3), in t1_mc4_intr_handler()
259 t1_read_reg_4(adapter, A_MC4_CE_DATA4)); in t1_mc4_intr_handler()
266 adapter_name(adapter), in t1_mc4_intr_handler()
267 G_MC4_UE_ADDR(t1_read_reg_4(adapter, A_MC4_UE_ADDR)), in t1_mc4_intr_handler()
268 t1_read_reg_4(adapter, A_MC4_UE_DATA0), in t1_mc4_intr_handler()
269 t1_read_reg_4(adapter, A_MC4_UE_DATA1), in t1_mc4_intr_handler()
270 t1_read_reg_4(adapter, A_MC4_UE_DATA2), in t1_mc4_intr_handler()
271 t1_read_reg_4(adapter, A_MC4_UE_DATA3), in t1_mc4_intr_handler()
272 t1_read_reg_4(adapter, A_MC4_UE_DATA4)); in t1_mc4_intr_handler()
277 CH_ALERT("%s: MC4 address error\n", adapter_name(adapter)); in t1_mc4_intr_handler()
281 t1_fatal_err(adapter); in t1_mc4_intr_handler()
283 t1_write_reg_4(mc4->adapter, A_MC4_INT_CAUSE, cause); in t1_mc4_intr_handler()
299 adapter_t *adap = mc4->adapter; in t1_mc4_bd_read()