Lines Matching refs:val
40 u32_t val) in lm_mwrite() argument
60 val | in lm_mwrite()
116 u32_t val; in lm_mread() local
123 REG_RD(pdev, emac.emac_mdio_mode, &val); in lm_mread()
124 val &= ~EMAC_MDIO_MODE_AUTO_POLL; in lm_mread()
126 REG_WR(pdev, emac.emac_mdio_mode, val); in lm_mread()
131 val = (phy_addr << 21) | in lm_mread()
137 REG_WR(pdev, emac.emac_mdio_comm, val); in lm_mread()
143 REG_RD(pdev, emac.emac_mdio_comm, &val); in lm_mread()
144 if(!(val & EMAC_MDIO_COMM_START_BUSY)) in lm_mread()
148 REG_RD(pdev, emac.emac_mdio_comm, &val); in lm_mread()
150 REG_RD(pdev, emac.emac_mdio_comm, &val); in lm_mread()
151 val &= EMAC_MDIO_COMM_DATA; in lm_mread()
157 if(val & EMAC_MDIO_COMM_START_BUSY) in lm_mread()
161 val = 0; in lm_mread()
170 *ret_val = val; in lm_mread()
174 REG_RD(pdev, emac.emac_mdio_mode, &val); in lm_mread()
175 val |= EMAC_MDIO_MODE_AUTO_POLL; in lm_mread()
177 REG_WR(pdev, emac.emac_mdio_mode, val); in lm_mread()
196 u32_t val; in phy_ad_settings() local
198 val = 0; in phy_ad_settings()
209 val |= PHY_AN_AD_1000X_PAUSE_CAPABLE | in phy_ad_settings()
214 val |= MII_ADVERT_PAUSE; in phy_ad_settings()
219 val |= PHY_AN_AD_PAUSE_CAPABLE | PHY_AN_AD_ASYM_PAUSE; in phy_ad_settings()
228 val |= PHY_AN_AD_1000X_ASYM_PAUSE; in phy_ad_settings()
232 val |= MII_ADVERT_ASYM_PAUSE; in phy_ad_settings()
237 val |= PHY_AN_AD_ASYM_PAUSE; in phy_ad_settings()
246 val |= PHY_AN_AD_1000X_PAUSE_CAPABLE | in phy_ad_settings()
251 val |= MII_ADVERT_PAUSE; in phy_ad_settings()
256 val |= PHY_AN_AD_PAUSE_CAPABLE | PHY_AN_AD_ASYM_PAUSE; in phy_ad_settings()
260 return val; in phy_ad_settings()
283 u32_t val; in init_utp() local
301 (void) lm_mread(pdev, pdev->params.phy_addr, PHY_CTRL_REG, &val); in init_utp()
303 if(!(val & PHY_CTRL_PHY_RESET)) in init_utp()
311 DbgBreakIf(val & PHY_CTRL_PHY_RESET); in init_utp()
314 (void) lm_mread(pdev, pdev->params.phy_addr, PHY_ID1_REG, &val); in init_utp()
315 pdev->hw_info.phy_id = val << 16; in init_utp()
316 DbgMessage1(pdev, INFORM, "Phy Id1 0x%x\n", val); in init_utp()
318 (void) lm_mread(pdev, pdev->params.phy_addr, PHY_ID2_REG, &val); in init_utp()
319 pdev->hw_info.phy_id |= val & 0xffff; in init_utp()
320 DbgMessage1(pdev, INFORM, "Phy Id2 0x%x\n", val); in init_utp()
353 (void) lm_mread(pdev, pdev->params.phy_addr, 0x18, &val); in init_utp()
355 val &= 0x0ff8; in init_utp()
359 val |= 0x10; in init_utp()
363 val &= ~0x10; in init_utp()
365 (void) lm_mwrite(pdev, pdev->params.phy_addr, 0x18, val | 0x8000 | 0x7); in init_utp()
372 (void) lm_mread(pdev, pdev->params.phy_addr, 0x18, &val); in init_utp()
373 val |= BIT_9; /*auto mdix*/ in init_utp()
374 (void) lm_mwrite(pdev, pdev->params.phy_addr, BCM5401_AUX_CTRL, val | 0x8000 | 0x7); in init_utp()
393 (void) lm_mread(pdev, pdev->params.phy_addr, 0x15, &val); in init_utp()
394 val &= ~0x100; in init_utp()
395 (void) lm_mwrite(pdev, pdev->params.phy_addr, 0x15, val); in init_utp()
421 val = PHY_AN_AD_PROTOCOL_802_3_CSMA_CD; in init_utp()
422 val |= phy_ad_settings(pdev, req_medium, flow_ctrl); in init_utp()
426 val |= PHY_AN_AD_10BASET_FULL; in init_utp()
430 val |= PHY_AN_AD_10BASET_HALF; in init_utp()
435 val |= PHY_AN_AD_10BASET_HALF; in init_utp()
438 (void) lm_mwrite(pdev, pdev->params.phy_addr, PHY_AN_AD_REG, val); in init_utp()
482 val = PHY_AN_AD_PROTOCOL_802_3_CSMA_CD; in init_utp()
483 val |= phy_ad_settings(pdev, req_medium, flow_ctrl); in init_utp()
487 val |= PHY_AN_AD_10BASET_HALF | PHY_AN_AD_10BASET_FULL; in init_utp()
492 val |= PHY_AN_AD_100BASETX_FULL; in init_utp()
496 val |= PHY_AN_AD_100BASETX_HALF; in init_utp()
501 val |= PHY_AN_AD_100BASETX_HALF; in init_utp()
504 (void) lm_mwrite(pdev, pdev->params.phy_addr, PHY_AN_AD_REG, val); in init_utp()
544 val = PHY_AN_AD_PROTOCOL_802_3_CSMA_CD; in init_utp()
545 val |= phy_ad_settings(pdev, req_medium, flow_ctrl); in init_utp()
549 val |= PHY_AN_AD_10BASET_HALF | PHY_AN_AD_10BASET_FULL; in init_utp()
550 val |= PHY_AN_AD_100BASETX_HALF | PHY_AN_AD_100BASETX_FULL; in init_utp()
553 (void) lm_mwrite(pdev, pdev->params.phy_addr, PHY_AN_AD_REG, val); in init_utp()
559 val |= PHY_AN_AD_1000BASET_FULL; in init_utp()
563 val |= PHY_AN_AD_1000BASET_HALF; in init_utp()
568 val |= PHY_AN_AD_1000BASET_HALF; in init_utp()
592 (void) lm_mread(pdev, pdev->params.phy_addr, BCM5401_AUX_CTRL, &val); in init_utp()
593 val |= BCM5401_SHDW_NORMAL_EXTERNAL_LOOPBACK; in init_utp()
594 (void) lm_mwrite(pdev, pdev->params.phy_addr, BCM5401_AUX_CTRL, val); in init_utp()
596 val = PHY_CONFIG_AS_MASTER | PHY_ENABLE_CONFIG_AS_MASTER; in init_utp()
599 (void) lm_mwrite(pdev, pdev->params.phy_addr, PHY_1000BASET_CTRL_REG, val); in init_utp()
603 val = PHY_AN_AD_PROTOCOL_802_3_CSMA_CD | in init_utp()
608 val |= phy_ad_settings(pdev, req_medium, flow_ctrl); in init_utp()
611 (void) lm_mwrite(pdev, pdev->params.phy_addr, PHY_AN_AD_REG, val); in init_utp()
630 REG_RD(pdev, emac.emac_mode, &val); in init_utp()
631 val &= ~(EMAC_MODE_MAC_LOOP | EMAC_MODE_FORCE_LINK); in init_utp()
632 REG_WR(pdev, emac.emac_mode, val); in init_utp()
654 (void) lm_mread(pdev, pdev->params.phy_addr, PHY_STATUS_REG, &val); in init_utp()
660 (void) lm_mread(pdev, pdev->params.phy_addr, 0x1c, &val); in init_utp()
661 if(val & 0x20) in init_utp()
665 (void) lm_mread(pdev, pdev->params.phy_addr, PHY_STATUS_REG, &val); in init_utp()
666 if(val & PHY_STATUS_LINK_PASS) in init_utp()
686 (void) lm_mread(pdev, pdev->params.phy_addr, PHY_STATUS_REG, &val); in init_utp()
687 if(val & PHY_STATUS_LINK_PASS) in init_utp()
714 u32_t val; in mii_get_serdes_link_status() local
721 REG_RD(pdev, emac.emac_status, &val); in mii_get_serdes_link_status()
722 if(val & EMAC_STATUS_LINK) in mii_get_serdes_link_status()
724 val = PHY_STATUS_LINK_PASS; in mii_get_serdes_link_status()
728 val = 0; in mii_get_serdes_link_status()
734 (void) lm_mread(pdev, pdev->params.phy_addr, PHY_STATUS_REG, &val); in mii_get_serdes_link_status()
735 (void) lm_mread(pdev, pdev->params.phy_addr, PHY_STATUS_REG, &val); in mii_get_serdes_link_status()
738 return val; in mii_get_serdes_link_status()
754 u32_t val; in set_5708_serdes_pre_emphasis() local
785 &val); in set_5708_serdes_pre_emphasis()
792 val = (val & 0x0fff) | pre_emphasis; in set_5708_serdes_pre_emphasis()
798 val); in set_5708_serdes_pre_emphasis()
857 u32_t val; in init_5708_serdes() local
873 &val); in init_5708_serdes()
875 switch(val & PORT_HW_CFG_DEFAULT_LINK_MASK) in init_5708_serdes()
906 &val); in init_5708_serdes()
908 if(!(val & MII_CTRL_RESET)) in init_5708_serdes()
916 DbgBreakIf(val & MII_CTRL_RESET); in init_5708_serdes()
936 &val); in init_5708_serdes()
938 val &= ~ MII_TXACTL1_DRIVER_VCM; in init_5708_serdes()
944 val); in init_5708_serdes()
961 &val); in init_5708_serdes()
962 pdev->hw_info.phy_id = val << 16; in init_5708_serdes()
963 DbgMessage1(pdev, INFORM, "Phy Id1 0x%x\n", val); in init_5708_serdes()
969 &val); in init_5708_serdes()
970 pdev->hw_info.phy_id |= val & 0xffff; in init_5708_serdes()
971 DbgMessage1(pdev, INFORM, "Phy Id2 0x%x\n", val); in init_5708_serdes()
1000 &val); in init_5708_serdes()
1002 val |= MII_1000X_CTL1_FIBER_MODE | MII_1000X_CTL1_AUTODET_EN; in init_5708_serdes()
1008 val &= ~MII_1000X_CTL1_SIG_DET_EN; in init_5708_serdes()
1012 val |= MII_1000X_CTL1_SIG_DET_EN; in init_5708_serdes()
1019 val); in init_5708_serdes()
1026 &val); in init_5708_serdes()
1028 val |= MII_1000X_CTL2_PAR_DET_EN; in init_5708_serdes()
1034 val); in init_5708_serdes()
1041 &val); in init_5708_serdes()
1043 val &= ~MII_ANEG_NXT_PG_XMIT1_2G5; in init_5708_serdes()
1049 val |= MII_ANEG_NXT_PG_XMIT1_2G5; in init_5708_serdes()
1056 val |= MII_ANEG_NXT_PG_XMIT1_2G5; in init_5708_serdes()
1061 val |= MII_ANEG_NXT_PG_XMIT1_2G5; in init_5708_serdes()
1068 val); in init_5708_serdes()
1070 val = 0; in init_5708_serdes()
1074 val |= phy_ad_settings(pdev, req_medium, flow_ctrl); in init_5708_serdes()
1079 val |= MII_ABILITY_HALF | MII_ABILITY_FULL; in init_5708_serdes()
1086 val); in init_5708_serdes()
1103 val |= MII_CTRL_DUPLEX_MODE; in init_5708_serdes()
1110 val); in init_5708_serdes()
1116 &val); in init_5708_serdes()
1121 val & ~(MII_1000X_CTL1_FIBER_MODE | MII_1000X_CTL1_AUTODET_EN)); in init_5708_serdes()
1127 val |= MII_CTRL_DUPLEX_MODE; in init_5708_serdes()
1130 val |= MII_CTRL_MANUAL_SPD0; in init_5708_serdes()
1136 val); in init_5708_serdes()
1142 &val); in init_5708_serdes()
1147 val & ~(MII_1000X_CTL1_FIBER_MODE | MII_1000X_CTL1_AUTODET_EN)); in init_5708_serdes()
1153 val |= MII_CTRL_DUPLEX_MODE; in init_5708_serdes()
1156 val |= MII_CTRL_MANUAL_SPD1; in init_5708_serdes()
1162 val); in init_5708_serdes()
1168 val |= MII_CTRL_DUPLEX_MODE; in init_5708_serdes()
1171 val |= MII_CTRL_MANUAL_FORCE_2500; in init_5708_serdes()
1177 val); in init_5708_serdes()
1185 REG_RD(pdev, emac.emac_mode, &val); in init_5708_serdes()
1186 val &= ~(EMAC_MODE_MAC_LOOP | EMAC_MODE_FORCE_LINK); in init_5708_serdes()
1187 REG_WR(pdev, emac.emac_mode, val); in init_5708_serdes()
1219 &val); in init_5708_serdes()
1227 &val); in init_5708_serdes()
1228 if(val & MII_STAT_LINK_STATUS) in init_5708_serdes()
1248 &val); in init_5708_serdes()
1249 if(val & MII_STAT_LINK_STATUS) in init_5708_serdes()
1278 u32_t val; in force_5709_serdes_link() local
1284 (void) lm_mread(pdev, pdev->params.phy_addr, 0x10, &val); in force_5709_serdes_link()
1285 val &= ~0x10; in force_5709_serdes_link()
1288 val &= ~1; in force_5709_serdes_link()
1291 val |= 1; in force_5709_serdes_link()
1294 (void) lm_mwrite(pdev, pdev->params.phy_addr, 0x10, val); in force_5709_serdes_link()
1300 (void) lm_mread(pdev, pdev->params.phy_addr, 0x10, &val); in force_5709_serdes_link()
1302 val &= ~0x1000; /* autoneg. */ in force_5709_serdes_link()
1303 val &= ~0x100; /* duplex. */ in force_5709_serdes_link()
1304 val &= ~0x2060; /* speed. */ in force_5709_serdes_link()
1308 val |= 0x100; in force_5709_serdes_link()
1318 val |= 0x2000; in force_5709_serdes_link()
1322 val |= 0x2040; in force_5709_serdes_link()
1326 val |= 0x20; in force_5709_serdes_link()
1333 (void) lm_mwrite(pdev, pdev->params.phy_addr, 0x10, val); in force_5709_serdes_link()
1342 (void) lm_mread(pdev, pdev->params.phy_addr, 0x18, &val); in force_5709_serdes_link()
1343 val &= 0xfff0; in force_5709_serdes_link()
1344 val |= 0x10; in force_5709_serdes_link()
1345 (void) lm_mwrite(pdev, pdev->params.phy_addr, 0x18, val); in force_5709_serdes_link()
1363 u32_t val; in init_5709_serdes_for_autoneg() local
1376 (void) lm_mread(pdev, pdev->params.phy_addr, 0x19, &val); in init_5709_serdes_for_autoneg()
1377 val &= ~1; in init_5709_serdes_for_autoneg()
1378 (void) lm_mwrite(pdev, pdev->params.phy_addr, 0x19, val); in init_5709_serdes_for_autoneg()
1385 (void) lm_mread(pdev, pdev->params.phy_addr, 0x10, &val); in init_5709_serdes_for_autoneg()
1386 val |= 0x10; in init_5709_serdes_for_autoneg()
1387 (void) lm_mwrite(pdev, pdev->params.phy_addr, 0x10, val); in init_5709_serdes_for_autoneg()
1392 (void) lm_mread(pdev, pdev->params.phy_addr, 0x11, &val); in init_5709_serdes_for_autoneg()
1393 val &= ~0x1; in init_5709_serdes_for_autoneg()
1394 (void) lm_mwrite(pdev, pdev->params.phy_addr, 0x11, val); in init_5709_serdes_for_autoneg()
1401 (void) lm_mread(pdev, pdev->params.phy_addr, 0x10, &val); in init_5709_serdes_for_autoneg()
1402 val &= ~3; in init_5709_serdes_for_autoneg()
1403 val |= 1; /* set bam mode. */ in init_5709_serdes_for_autoneg()
1404 val |= 2; /* enable t2 mode. */ in init_5709_serdes_for_autoneg()
1405 (void) lm_mwrite(pdev, pdev->params.phy_addr, 0x10, val); in init_5709_serdes_for_autoneg()
1417 (void) lm_mread(pdev, pdev->params.phy_addr, 0x1, &val); in init_5709_serdes_for_autoneg()
1418 val |= 0x20; in init_5709_serdes_for_autoneg()
1419 (void) lm_mwrite(pdev, pdev->params.phy_addr, 0x1, val); in init_5709_serdes_for_autoneg()
1425 (void) lm_mread(pdev, pdev->params.phy_addr, 0x0, &val); in init_5709_serdes_for_autoneg()
1426 val |= 0x1200; in init_5709_serdes_for_autoneg()
1427 (void) lm_mwrite(pdev, pdev->params.phy_addr, 0x0, val); in init_5709_serdes_for_autoneg()
1433 val = phy_ad_settings(pdev, req_medium, flow_ctrl); in init_5709_serdes_for_autoneg()
1437 val &= ~0x60; in init_5709_serdes_for_autoneg()
1441 val |= 0x60; /* half/full duplex. */ in init_5709_serdes_for_autoneg()
1443 (void) lm_mwrite(pdev, pdev->params.phy_addr, 0x14, val); in init_5709_serdes_for_autoneg()
1446 (void) lm_mread(pdev, pdev->params.phy_addr, 0x10, &val); in init_5709_serdes_for_autoneg()
1447 val |= 0x1200; in init_5709_serdes_for_autoneg()
1448 (void) lm_mwrite(pdev, pdev->params.phy_addr, 0x10, val); in init_5709_serdes_for_autoneg()
1469 u32_t val; in init_5709_serdes() local
1481 &val); in init_5709_serdes()
1483 switch(val & PORT_HW_CFG_DEFAULT_LINK_MASK) in init_5709_serdes()
1516 (void) lm_mread(pdev, pdev->params.phy_addr, 0x10, &val); in init_5709_serdes()
1517 if(!(val & MII_CTRL_RESET)) in init_5709_serdes()
1523 DbgBreakIf(val & MII_CTRL_RESET); in init_5709_serdes()
1526 (void) lm_mread(pdev, pdev->params.phy_addr, 0x12, &val); in init_5709_serdes()
1527 pdev->hw_info.phy_id = val << 16; in init_5709_serdes()
1528 (void) lm_mread(pdev, pdev->params.phy_addr, 0x13, &val); in init_5709_serdes()
1529 pdev->hw_info.phy_id |= val & 0xffff; in init_5709_serdes()
1553 REG_RD(pdev, emac.emac_mode, &val); in init_5709_serdes()
1554 val &= ~(EMAC_MODE_MAC_LOOP | EMAC_MODE_FORCE_LINK); in init_5709_serdes()
1555 REG_WR(pdev, emac.emac_mode, val); in init_5709_serdes()
1567 (void) lm_mread(pdev, pdev->params.phy_addr, 0x11, &val); in init_5709_serdes()
1571 (void) lm_mread(pdev, pdev->params.phy_addr, 0x11, &val); in init_5709_serdes()
1572 if(val & 0x4) in init_5709_serdes()
1588 (void) lm_mread(pdev, pdev->params.phy_addr, 0x11, &val); in init_5709_serdes()
1590 if(val & MII_STAT_LINK_STATUS) in init_5709_serdes()
1619 u32_t val; in init_5706_serdes() local
1631 &val); in init_5706_serdes()
1632 switch(val & PORT_HW_CFG_DEFAULT_LINK_MASK) in init_5706_serdes()
1660 (void) lm_mread(pdev, pdev->params.phy_addr, PHY_CTRL_REG, &val); in init_5706_serdes()
1662 if(!(val & PHY_CTRL_PHY_RESET)) in init_5706_serdes()
1670 DbgBreakIf(val & PHY_CTRL_PHY_RESET); in init_5706_serdes()
1673 (void) lm_mread(pdev, pdev->params.phy_addr, PHY_ID1_REG, &val); in init_5706_serdes()
1674 pdev->hw_info.phy_id = val << 16; in init_5706_serdes()
1675 DbgMessage1(pdev, INFORM, "Phy Id1 0x%x\n", val); in init_5706_serdes()
1677 (void) lm_mread(pdev, pdev->params.phy_addr, PHY_ID2_REG, &val); in init_5706_serdes()
1678 pdev->hw_info.phy_id |= val & 0xffff; in init_5706_serdes()
1679 DbgMessage1(pdev, INFORM, "Phy Id2 0x%x\n", val); in init_5706_serdes()
1698 val = PHY_AN_AD_1000X_HALF_DUPLEX; in init_5706_serdes()
1701 val |= PHY_AN_AD_1000X_FULL_DUPLEX; in init_5706_serdes()
1703 val |= phy_ad_settings(pdev, req_medium, flow_ctrl); in init_5706_serdes()
1705 (void) lm_mwrite(pdev, pdev->params.phy_addr, PHY_AN_AD_REG, val); in init_5706_serdes()
1748 val = PHY_CTRL_SPEED_SELECT_1000MBPS; in init_5706_serdes()
1751 val |= PHY_CTRL_FULL_DUPLEX_MODE; in init_5706_serdes()
1754 (void) lm_mwrite(pdev, pdev->params.phy_addr, PHY_CTRL_REG, val); in init_5706_serdes()
1758 val = PHY_CTRL_AUTO_NEG_ENABLE | PHY_CTRL_RESTART_AUTO_NEG; in init_5706_serdes()
1760 (void) lm_mwrite(pdev, pdev->params.phy_addr, PHY_CTRL_REG, val); in init_5706_serdes()
1768 REG_RD(pdev, emac.emac_mode, &val); in init_5706_serdes()
1769 val &= ~(EMAC_MODE_MAC_LOOP | EMAC_MODE_FORCE_LINK); in init_5706_serdes()
1770 REG_WR(pdev, emac.emac_mode, val); in init_5706_serdes()
1792 val = mii_get_serdes_link_status(pdev); in init_5706_serdes()
1796 (void) lm_mread(pdev, pdev->params.phy_addr, 0x1c, &val); in init_5706_serdes()
1797 if(val & 0x10) in init_5706_serdes()
1801 val = mii_get_serdes_link_status(pdev); in init_5706_serdes()
1803 if(val & PHY_STATUS_LINK_PASS) in init_5706_serdes()
1822 val = mii_get_serdes_link_status(pdev); in init_5706_serdes()
1824 if(val & PHY_STATUS_LINK_PASS) in init_5706_serdes()
1850 u32_t val; in init_serdes_or_phy_loopback() local
1861 (void) lm_mread(pdev, pdev->params.phy_addr, PHY_CTRL_REG, &val); in init_serdes_or_phy_loopback()
1863 if(!(val & PHY_CTRL_PHY_RESET)) in init_serdes_or_phy_loopback()
1870 DbgBreakIf(val & PHY_CTRL_PHY_RESET); in init_serdes_or_phy_loopback()
1873 (void) lm_mread(pdev, pdev->params.phy_addr, PHY_ID1_REG, &val); in init_serdes_or_phy_loopback()
1874 pdev->hw_info.phy_id = val << 16; in init_serdes_or_phy_loopback()
1875 DbgMessage1(pdev, INFORM, "Phy Id1 0x%x\n", val); in init_serdes_or_phy_loopback()
1877 (void) lm_mread(pdev, pdev->params.phy_addr, PHY_ID2_REG, &val); in init_serdes_or_phy_loopback()
1878 pdev->hw_info.phy_id |= val & 0xffff; in init_serdes_or_phy_loopback()
1879 DbgMessage1(pdev, INFORM, "Phy Id2 0x%x\n", val); in init_serdes_or_phy_loopback()
1907 u32_t val; in init_5709_serdes_loopback() local
1923 (void) lm_mread(pdev, pdev->params.phy_addr, 0x10, &val); in init_5709_serdes_loopback()
1924 if(!(val & MII_CTRL_RESET)) in init_5709_serdes_loopback()
1930 DbgBreakIf(val & MII_CTRL_RESET); in init_5709_serdes_loopback()
1940 (void) lm_mread(pdev, pdev->params.phy_addr, 0x12, &val); in init_5709_serdes_loopback()
1941 pdev->hw_info.phy_id = val << 16; in init_5709_serdes_loopback()
1942 (void) lm_mread(pdev, pdev->params.phy_addr, 0x13, &val); in init_5709_serdes_loopback()
1943 pdev->hw_info.phy_id |= val & 0xffff; in init_5709_serdes_loopback()
1968 u32_t val; in init_loopback_mac_link() local
1986 REG_RD(pdev, emac.emac_mode, &val); in init_loopback_mac_link()
1987 val &= ~(EMAC_MODE_MAC_LOOP | EMAC_MODE_PORT); in init_loopback_mac_link()
1988 val |= EMAC_MODE_FORCE_LINK | EMAC_MODE_PORT_GMII; in init_loopback_mac_link()
1989 REG_WR(pdev, emac.emac_mode, val); in init_loopback_mac_link()
2006 REG_RD(pdev, emac.emac_mode, &val); in init_loopback_mac_link()
2007 val &= ~(EMAC_MODE_PORT | EMAC_MODE_HALF_DUPLEX); in init_loopback_mac_link()
2008 val |= EMAC_MODE_MAC_LOOP | EMAC_MODE_FORCE_LINK; in init_loopback_mac_link()
2013 val |= EMAC_MODE_PORT_GMII; in init_loopback_mac_link()
2016 REG_WR(pdev, emac.emac_mode, val); in init_loopback_mac_link()
2040 REG_RD(pdev, hc.hc_attn_bits_enable, &val); in init_loopback_mac_link()
2041 val |= STATUS_ATTN_BITS_LINK_STATE; in init_loopback_mac_link()
2042 REG_WR(pdev, hc.hc_attn_bits_enable, val); in init_loopback_mac_link()
2255 u32_t val; in lm_init_remote_phy() local
2278 &val); in lm_init_remote_phy()
2279 if(val & NETLINK_GET_LINK_STATUS_SERDES_LINK) in lm_init_remote_phy()
2444 u32_t val; in get_serdes_phy_ad() local
2451 (void) lm_mread(pdev, pdev->params.phy_addr, PHY_AN_AD_REG, &val); in get_serdes_phy_ad()
2453 if(val & PHY_AN_AD_1000X_PAUSE_CAPABLE) in get_serdes_phy_ad()
2458 if(val & PHY_AN_AD_1000X_ASYM_PAUSE) in get_serdes_phy_ad()
2463 (void) lm_mread(pdev,pdev->params.phy_addr,PHY_LINK_PARTNER_ABILITY_REG,&val); in get_serdes_phy_ad()
2465 if(val & PHY_AN_AD_1000X_PAUSE_CAPABLE) in get_serdes_phy_ad()
2470 if(val & PHY_AN_AD_1000X_ASYM_PAUSE) in get_serdes_phy_ad()
2481 (void) lm_mread(pdev, pdev->params.phy_addr, 0x14, &val); in get_serdes_phy_ad()
2483 if(val & 0x80) in get_serdes_phy_ad()
2488 if(val & 0x100) in get_serdes_phy_ad()
2494 (void) lm_mread(pdev, pdev->params.phy_addr, 0x15, &val); in get_serdes_phy_ad()
2496 if(val & 0x80) in get_serdes_phy_ad()
2501 if(val & 0x100) in get_serdes_phy_ad()
2525 u32_t val; in set_mac_flow_control() local
2681 REG_RD(pdev, emac.emac_rx_mode, &val); in set_mac_flow_control()
2682 val &= ~EMAC_RX_MODE_FLOW_EN; in set_mac_flow_control()
2686 val |= EMAC_RX_MODE_FLOW_EN; in set_mac_flow_control()
2689 REG_WR(pdev, emac.emac_rx_mode, val); in set_mac_flow_control()
2692 REG_RD(pdev, emac.emac_tx_mode, &val); in set_mac_flow_control()
2693 val &= ~EMAC_TX_MODE_FLOW_EN; in set_mac_flow_control()
2697 val |= EMAC_TX_MODE_FLOW_EN; in set_mac_flow_control()
2700 REG_WR(pdev, emac.emac_tx_mode, val); in set_mac_flow_control()
2705 val = CTX_RD( in set_mac_flow_control()
2713 val |= 0xFF; in set_mac_flow_control()
2718 val &= ~0xFF; in set_mac_flow_control()
2724 val); in set_mac_flow_control()
2749 u32_t val; in get_copper_phy_link() local
2770 (void) lm_mread(pdev, pdev->params.phy_addr, 0x1c, &val); in get_copper_phy_link()
2771 if(val & 0x20) in get_copper_phy_link()
2814 val = local_adv & (remote_adv >> 2); in get_copper_phy_link()
2815 if(val & PHY_AN_AD_1000BASET_FULL) in get_copper_phy_link()
2822 else if(val & PHY_AN_AD_1000BASET_HALF) in get_copper_phy_link()
2844 val = local_adv & remote_adv; in get_copper_phy_link()
2845 if(val & PHY_AN_AD_100BASETX_FULL) in get_copper_phy_link()
2852 else if(val & PHY_AN_AD_100BASETX_HALF) in get_copper_phy_link()
2859 else if(val & PHY_AN_AD_10BASET_FULL) in get_copper_phy_link()
2866 else if(val & PHY_AN_AD_10BASET_HALF) in get_copper_phy_link()
2938 u32_t val; in init_mac_link() local
2954 REG_RD(pdev, emac.emac_mode, &val); in init_mac_link()
2956 val &= ~(EMAC_MODE_PORT | EMAC_MODE_FORCE_LINK); in init_mac_link()
2964 val |= EMAC_MODE_PORT_MII; in init_mac_link()
2969 val |= EMAC_MODE_PORT_MII_10M; in init_mac_link()
2974 val |= EMAC_MODE_PORT_MII; in init_mac_link()
2978 val |= EMAC_MODE_PORT_GMII; in init_mac_link()
2983 val |= EMAC_MODE_25G_MODE; in init_mac_link()
2990 val &= ~EMAC_MODE_PORT; in init_mac_link()
2991 val |= EMAC_MODE_PORT_GMII; in init_mac_link()
2996 val |= EMAC_MODE_PORT_GMII; in init_mac_link()
3001 val |= EMAC_MODE_FORCE_LINK; in init_mac_link()
3005 val &= ~EMAC_MODE_HALF_DUPLEX; in init_mac_link()
3008 val |= EMAC_MODE_HALF_DUPLEX; in init_mac_link()
3010 REG_WR(pdev, emac.emac_mode, val); in init_mac_link()
3026 REG_RD(pdev, hc.hc_attn_bits_enable, &val); in init_mac_link()
3027 val &= ~STATUS_ATTN_BITS_LINK_STATE; in init_mac_link()
3030 val |= STATUS_ATTN_BITS_LINK_STATE; in init_mac_link()
3032 REG_WR(pdev, hc.hc_attn_bits_enable, val); in init_mac_link()
3054 u32_t val; in serdes_fallback() local
3066 (void) lm_mread(pdev, pdev->params.phy_addr, 0x1c, &val); in serdes_fallback()
3070 if(!(val & 0x10)) /* SIG_DETECT */ in serdes_fallback()
3161 u32_t val; in get_5708_serdes_link() local
3176 &val); in get_5708_serdes_link()
3181 &val); in get_5708_serdes_link()
3186 for(idx = 0; idx < 10 && val == 0; idx++) in get_5708_serdes_link()
3194 &val); in get_5708_serdes_link()
3197 if((val & MII_STAT_LINK_STATUS) == 0) in get_5708_serdes_link()
3214 &val); in get_5708_serdes_link()
3215 if(val & MII_CTRL_ANEG_ENA) in get_5708_serdes_link()
3229 &val); in get_5708_serdes_link()
3230 switch(val & MII_1000X_STAT1_SPEED) in get_5708_serdes_link()
3256 if(val & MII_1000X_STAT1_DUPLEX) in get_5708_serdes_link()
3266 &val); in get_5708_serdes_link()
3267 if(val & MII_STAT_ANEG_CMPL) in get_5708_serdes_link()
3296 if(val & MII_CTRL_MANUAL_FORCE_2500) in get_5708_serdes_link()
3301 else if(val & MII_CTRL_MANUAL_SPD1) in get_5708_serdes_link()
3306 else if(val & MII_CTRL_MANUAL_SPD0) in get_5708_serdes_link()
3317 if(val & MII_CTRL_DUPLEX_MODE) in get_5708_serdes_link()
3350 u32_t val; in get_5709_serdes_link() local
3362 (void) lm_mread(pdev, pdev->params.phy_addr, 0x1b, &val); in get_5709_serdes_link()
3363 (void) lm_mread(pdev, pdev->params.phy_addr, 0x1b, &val); /* is this needed? */ in get_5709_serdes_link()
3371 if((val & 0x4) == 0 && (mac_status & EMAC_STATUS_LINK) == 0) in get_5709_serdes_link()
3383 (void) lm_mread(pdev, pdev->params.phy_addr, 0x10, &val); in get_5709_serdes_link()
3385 if(val & 0x1000) in get_5709_serdes_link()
3391 (void) lm_mread(pdev, pdev->params.phy_addr, 0x1b, &val); in get_5709_serdes_link()
3394 if(val & 0x8) in get_5709_serdes_link()
3404 val = (val >> 8) & 0x3f; in get_5709_serdes_link()
3405 if(val == 0) in get_5709_serdes_link()
3409 else if(val == 1) in get_5709_serdes_link()
3413 else if(val == 2 || val == 13) in get_5709_serdes_link()
3417 else if(val == 3) in get_5709_serdes_link()
3429 if(val & 0x100) in get_5709_serdes_link()
3439 if(val & 0x20) in get_5709_serdes_link()
3443 else if((val & 0x2040) == 0) in get_5709_serdes_link()
3447 else if((val & 0x2040) == 0x2000) in get_5709_serdes_link()
3451 else if((val & 0x2040) == 0x40) in get_5709_serdes_link()
3483 u32_t val; in get_5706_serdes_link() local
3512 val = local_adv & remote_adv; in get_5706_serdes_link()
3513 if(val & PHY_AN_AD_1000X_FULL_DUPLEX) in get_5706_serdes_link()
3576 (void) lm_mread(pdev, pdev->params.phy_addr, 0x1c, &val); in get_5706_serdes_link()
3577 if(!(val & 0x10)) in get_5706_serdes_link()
3704 u32_t val, phy_ctrl, phy_status; in lm_init_mac_link() local
3772 val = 0; in lm_init_mac_link()
3776 val |= NETLINK_GET_LINK_STATUS_LINK_UP; in lm_init_mac_link()
3780 val |= NETLINK_GET_LINK_STATUS_SERDES_LINK; in lm_init_mac_link()
3789 val |= NETLINK_GET_LINK_STATUS_10FULL; in lm_init_mac_link()
3793 val |= NETLINK_GET_LINK_STATUS_10HALF; in lm_init_mac_link()
3800 val |= NETLINK_GET_LINK_STATUS_100FULL; in lm_init_mac_link()
3804 val |= NETLINK_GET_LINK_STATUS_100HALF; in lm_init_mac_link()
3811 val |= NETLINK_GET_LINK_STATUS_1000FULL; in lm_init_mac_link()
3815 val |= NETLINK_GET_LINK_STATUS_1000HALF; in lm_init_mac_link()
3822 val |= NETLINK_GET_LINK_STATUS_2500FULL; in lm_init_mac_link()
3826 val |= NETLINK_GET_LINK_STATUS_2500HALF; in lm_init_mac_link()
3836 val |= NETLINK_GET_LINK_STATUS_AN_ENABLED; in lm_init_mac_link()
3840 val |= NETLINK_GET_LINK_STATUS_AN_COMPLETE; in lm_init_mac_link()
3842 if ((val & NETLINK_GET_LINK_STATUS_SERDES_LINK) == 0) in lm_init_mac_link()
3852 val |= NETLINK_GET_LINK_STATUS_PARTNER_AD_1000FULL; in lm_init_mac_link()
3854 val |= NETLINK_GET_LINK_STATUS_PARTNER_AD_1000HALF; in lm_init_mac_link()
3862 val |= NETLINK_GET_LINK_STATUS_PARTNER_AD_10HALF; in lm_init_mac_link()
3864 val |= NETLINK_GET_LINK_STATUS_PARTNER_AD_10FULL; in lm_init_mac_link()
3866 val |= NETLINK_GET_LINK_STATUS_PARTNER_AD_100HALF; in lm_init_mac_link()
3868 val |= NETLINK_GET_LINK_STATUS_PARTNER_AD_100FULL; in lm_init_mac_link()
3870 val |= NETLINK_GET_LINK_STATUS_PARTNER_SYM_PAUSE_CAP; in lm_init_mac_link()
3872 val |= NETLINK_GET_LINK_STATUS_PARTNER_ASYM_PAUSE_CAP; in lm_init_mac_link()
3883 val |= NETLINK_GET_LINK_STATUS_PARALLEL_DET; in lm_init_mac_link()
3889 val |= NETLINK_GET_LINK_STATUS_TX_FC_ENABLED; in lm_init_mac_link()
3893 val |= NETLINK_GET_LINK_STATUS_RX_FC_ENABLED; in lm_init_mac_link()
3903 val); in lm_init_mac_link()
3923 u32_t val; in lm_service_phy_int() local
3929 REG_RD(pdev, emac.emac_status, &val); in lm_service_phy_int()
3932 if(val & EMAC_STATUS_MI_INT) in lm_service_phy_int()
3937 else if(val & EMAC_STATUS_LINK_CHANGE) in lm_service_phy_int()
3991 u32_t val; in lm_get_medium() local
4015 REG_RD(pdev, misc.misc_dual_media_ctrl, &val); in lm_get_medium()
4017 if((val & MISC_DUAL_MEDIA_CTRL_BOND_ID) == in lm_get_medium()
4023 if((val & MISC_DUAL_MEDIA_CTRL_BOND_ID) == in lm_get_medium()
4045 if(val & MISC_DUAL_MEDIA_CTRL_STRAP_OVERRIDE) in lm_get_medium()
4047 decode = (val & MISC_DUAL_MEDIA_CTRL_PHY_CTRL) >> 21; in lm_get_medium()
4049 if(val & MISC_DUAL_MEDIA_CTRL_PORT_SWAP) in lm_get_medium()
4056 decode = (val & MISC_DUAL_MEDIA_CTRL_PHY_CTRL_STRAP) >> 8; in lm_get_medium()
4058 if(val & MISC_DUAL_MEDIA_CTRL_PORT_SWAP_PIN) in lm_get_medium()