Lines Matching refs:uvp
55 static int hci1394_ixl_update_prepare(hci1394_ixl_update_vars_t *uvp);
56 static int hci1394_ixl_update_prep_jump(hci1394_ixl_update_vars_t *uvp);
57 static int hci1394_ixl_update_prep_set_skipmode(hci1394_ixl_update_vars_t *uvp);
58 static int hci1394_ixl_update_prep_set_tagsync(hci1394_ixl_update_vars_t *uvp);
59 static int hci1394_ixl_update_prep_recv_pkt(hci1394_ixl_update_vars_t *uvp);
60 static int hci1394_ixl_update_prep_recv_buf(hci1394_ixl_update_vars_t *uvp);
61 static int hci1394_ixl_update_prep_send_pkt(hci1394_ixl_update_vars_t *uvp);
62 static int hci1394_ixl_update_prep_send_buf(hci1394_ixl_update_vars_t *uvp);
63 static int hci1394_ixl_update_perform(hci1394_ixl_update_vars_t *uvp);
64 static int hci1394_ixl_update_evaluate(hci1394_ixl_update_vars_t *uvp);
65 static int hci1394_ixl_update_analysis(hci1394_ixl_update_vars_t *uvp);
66 static void hci1394_ixl_update_set_locn_info(hci1394_ixl_update_vars_t *uvp);
67 static int hci1394_ixl_update_enable(hci1394_ixl_update_vars_t *uvp);
68 static int hci1394_ixl_update_endup(hci1394_ixl_update_vars_t *uvp);
248 hci1394_ixl_update_enable(hci1394_ixl_update_vars_t *uvp) in hci1394_ixl_update_enable() argument
263 ASSERT(MUTEX_NOT_HELD(&uvp->ctxtp->intrprocmutex)); in hci1394_ixl_update_enable()
264 mutex_enter(&uvp->ctxtp->intrprocmutex); in hci1394_ixl_update_enable()
271 if (uvp->ctxtp->intr_flags & HCI1394_ISO_CTXT_INUPDATE) { in hci1394_ixl_update_enable()
272 uvp->upd_status = IXL1394_EUPDATE_DISALLOWED; in hci1394_ixl_update_enable()
274 } else if (uvp->ctxtp->intr_flags & HCI1394_ISO_CTXT_ININTR) { in hci1394_ixl_update_enable()
283 uvp->upd_status = IXL1394_EUPDATE_DISALLOWED; in hci1394_ixl_update_enable()
292 mutex_exit(&uvp->ctxtp->intrprocmutex); in hci1394_ixl_update_enable()
294 mutex_enter(&uvp->ctxtp->intrprocmutex); in hci1394_ixl_update_enable()
297 } else if (uvp->ctxtp->intr_flags & HCI1394_ISO_CTXT_INCALL) { in hci1394_ixl_update_enable()
298 uvp->upd_status = IXL1394_EINTERNAL_ERROR; in hci1394_ixl_update_enable()
305 uvp->ctxtp->intr_flags |= HCI1394_ISO_CTXT_INUPDATE; in hci1394_ixl_update_enable()
308 ASSERT(MUTEX_HELD(&uvp->ctxtp->intrprocmutex)); in hci1394_ixl_update_enable()
309 mutex_exit(&uvp->ctxtp->intrprocmutex); in hci1394_ixl_update_enable()
321 hci1394_ixl_update_endup(hci1394_ixl_update_vars_t *uvp) in hci1394_ixl_update_endup() argument
327 ctxtp = uvp->ctxtp; in hci1394_ixl_update_endup()
346 status = hci1394_ixl_dma_sync(uvp->soft_statep, ctxtp); in hci1394_ixl_update_endup()
354 mutex_enter(&uvp->ctxtp->intrprocmutex); in hci1394_ixl_update_endup()
356 mutex_exit(&uvp->ctxtp->intrprocmutex); in hci1394_ixl_update_endup()
361 ASSERT(MUTEX_NOT_HELD(&uvp->ctxtp->intrprocmutex)); in hci1394_ixl_update_endup()
362 mutex_enter(&uvp->ctxtp->intrprocmutex); in hci1394_ixl_update_endup()
366 mutex_exit(&uvp->ctxtp->intrprocmutex); in hci1394_ixl_update_endup()
371 hci1394_do_stop(uvp->soft_statep, ctxtp, B_TRUE, ID1394_DONE); in hci1394_ixl_update_endup()
373 hci1394_do_stop(uvp->soft_statep, ctxtp, B_TRUE, ID1394_FAIL); in hci1394_ixl_update_endup()
384 hci1394_ixl_update_prepare(hci1394_ixl_update_vars_t *uvp) in hci1394_ixl_update_prepare() argument
389 if (uvp->ixlnewp->ixl_opcode != uvp->ixloldp->ixl_opcode) { in hci1394_ixl_update_prepare()
391 uvp->upd_status = IXL1394_EOPCODE_MISMATCH; in hci1394_ixl_update_prepare()
400 switch (uvp->ixl_opcode) { in hci1394_ixl_update_prepare()
406 old_callback_ixlp = (ixl1394_callback_t *)uvp->ixloldp; in hci1394_ixl_update_prepare()
407 new_callback_ixlp = (ixl1394_callback_t *)uvp->ixlnewp; in hci1394_ixl_update_prepare()
419 ret = hci1394_ixl_update_prep_jump(uvp); in hci1394_ixl_update_prepare()
424 ret = hci1394_ixl_update_prep_set_skipmode(uvp); in hci1394_ixl_update_prepare()
429 ret = hci1394_ixl_update_prep_set_tagsync(uvp); in hci1394_ixl_update_prepare()
435 ret = hci1394_ixl_update_prep_recv_pkt(uvp); in hci1394_ixl_update_prepare()
440 ret = hci1394_ixl_update_prep_recv_buf(uvp); in hci1394_ixl_update_prepare()
447 ret = hci1394_ixl_update_prep_send_pkt(uvp); in hci1394_ixl_update_prepare()
452 ret = hci1394_ixl_update_prep_send_buf(uvp); in hci1394_ixl_update_prepare()
458 uvp->upd_status = IXL1394_EOPCODE_DISALLOWED; in hci1394_ixl_update_prepare()
469 hci1394_ixl_update_prep_jump(hci1394_ixl_update_vars_t *uvp) in hci1394_ixl_update_prep_jump() argument
482 old_jump_ixlp = (ixl1394_jump_t *)uvp->ixloldp; in hci1394_ixl_update_prep_jump()
483 new_jump_ixlp = (ixl1394_jump_t *)uvp->ixlnewp; in hci1394_ixl_update_prep_jump()
497 uvp->upd_status = IXL1394_EJUMP_NOT_TO_LABEL; in hci1394_ixl_update_prep_jump()
515 uvp->jumpaddr = ((hci1394_xfer_ctl_t *) in hci1394_ixl_update_prep_jump()
523 if ((uvp->ixlxferp = (ixl1394_command_t *) in hci1394_ixl_update_prep_jump()
527 uvp->upd_status = IXL1394_EORIG_IXL_CORRUPTED; in hci1394_ixl_update_prep_jump()
537 xferctlp = (hci1394_xfer_ctl_t *)uvp->ixlxferp->compiler_privatep; in hci1394_ixl_update_prep_jump()
546 uvp->upd_status = IXL1394_EINTERNAL_ERROR; in hci1394_ixl_update_prep_jump()
552 uvp->hcihdr = desc_hdr & ~DESC_INTR_ENBL; in hci1394_ixl_update_prep_jump()
555 uvp->ixldepth = xferctlp->cnt - 1; in hci1394_ixl_update_prep_jump()
556 uvp->ixlcount = 1; in hci1394_ixl_update_prep_jump()
566 uvp->hcihdr |= DESC_INTR_ENBL; in hci1394_ixl_update_prep_jump()
571 uvp->hcihdr |= DESC_INTR_ENBL; in hci1394_ixl_update_prep_jump()
584 uvp->skipmode = IXL1394_SKIP_TO_STOP; in hci1394_ixl_update_prep_jump()
585 if ((uvp->ixlxferp->ixl_opcode & IXL1394_OPF_ONXMIT) != 0) { in hci1394_ixl_update_prep_jump()
589 (uvp->ctxtp->default_skipmode == IXL1394_OPF_ONXMIT)) { in hci1394_ixl_update_prep_jump()
591 uvp->skipmode = IXL1394_SKIP_TO_NEXT; in hci1394_ixl_update_prep_jump()
592 uvp->skipaddr = uvp->jumpaddr; in hci1394_ixl_update_prep_jump()
600 if (uvp->ixlxferp->ixl_opcode == in hci1394_ixl_update_prep_jump()
606 uvp->hci_offset -= 2; in hci1394_ixl_update_prep_jump()
612 uvp->hci_offset -= 1; in hci1394_ixl_update_prep_jump()
624 hci1394_ixl_update_prep_set_skipmode(hci1394_ixl_update_vars_t *uvp) in hci1394_ixl_update_prep_set_skipmode() argument
631 old_set_skipmode_ixlp = (ixl1394_set_skipmode_t *)uvp->ixloldp; in hci1394_ixl_update_prep_set_skipmode()
632 new_set_skipmode_ixlp = (ixl1394_set_skipmode_t *)uvp->ixlnewp; in hci1394_ixl_update_prep_set_skipmode()
648 uvp->ixlxferp = uvp->ixloldp->next_ixlp; in hci1394_ixl_update_prep_set_skipmode()
649 while ((uvp->ixlxferp != NULL) && (((uvp->ixlxferp->ixl_opcode & in hci1394_ixl_update_prep_set_skipmode()
651 ((uvp->ixlxferp->ixl_opcode & IXL1394_OPTY_MASK) != 0))) { in hci1394_ixl_update_prep_set_skipmode()
653 uvp->ixlxferp = uvp->ixlxferp->next_ixlp; in hci1394_ixl_update_prep_set_skipmode()
657 if (uvp->ixlxferp == NULL) { in hci1394_ixl_update_prep_set_skipmode()
659 uvp->upd_status = IXL1394_EORIG_IXL_CORRUPTED; in hci1394_ixl_update_prep_set_skipmode()
669 uvp->ixlxferp->compiler_privatep) == NULL) { in hci1394_ixl_update_prep_set_skipmode()
671 uvp->upd_status = IXL1394_EORIG_IXL_CORRUPTED; in hci1394_ixl_update_prep_set_skipmode()
675 uvp->hci_offset = xferctlp->dma[0].dma_bound & DESC_Z_MASK; in hci1394_ixl_update_prep_set_skipmode()
682 if (uvp->ixlxferp->ixl_opcode == IXL1394_OP_SEND_HDR_ONLY) { in hci1394_ixl_update_prep_set_skipmode()
687 uvp->hci_offset -= 2; in hci1394_ixl_update_prep_set_skipmode()
693 uvp->hci_offset -= 1; in hci1394_ixl_update_prep_set_skipmode()
697 uvp->ixldepth = 0; in hci1394_ixl_update_prep_set_skipmode()
698 uvp->ixlcount = xferctlp->cnt; in hci1394_ixl_update_prep_set_skipmode()
701 uvp->skipmode = new_set_skipmode_ixlp->skipmode; in hci1394_ixl_update_prep_set_skipmode()
703 if ((uvp->skipmode != IXL1394_SKIP_TO_NEXT) && in hci1394_ixl_update_prep_set_skipmode()
704 (uvp->skipmode != IXL1394_SKIP_TO_SELF) && in hci1394_ixl_update_prep_set_skipmode()
705 (uvp->skipmode != IXL1394_SKIP_TO_STOP) && in hci1394_ixl_update_prep_set_skipmode()
706 (uvp->skipmode != IXL1394_SKIP_TO_LABEL)) { in hci1394_ixl_update_prep_set_skipmode()
709 uvp->upd_status = IXL1394_EBAD_SKIPMODE; in hci1394_ixl_update_prep_set_skipmode()
715 if (uvp->skipmode == IXL1394_SKIP_TO_LABEL) { in hci1394_ixl_update_prep_set_skipmode()
723 uvp->upd_status = IXL1394_EBAD_SKIP_LABEL; in hci1394_ixl_update_prep_set_skipmode()
739 if ((uvp->skipxferp = ixlp) != NULL) { in hci1394_ixl_update_prep_set_skipmode()
746 uvp->skipaddr = xferctlp->dma[0].dma_bound; in hci1394_ixl_update_prep_set_skipmode()
753 if (uvp->skipmode == IXL1394_SKIP_TO_NEXT) { in hci1394_ixl_update_prep_set_skipmode()
755 (void) hci1394_ixl_find_next_exec_xfer(uvp->ixlxferp->next_ixlp, in hci1394_ixl_update_prep_set_skipmode()
769 uvp->skipaddr = xferctlp->dma[0].dma_bound; in hci1394_ixl_update_prep_set_skipmode()
780 hci1394_ixl_update_prep_set_tagsync(hci1394_ixl_update_vars_t *uvp) in hci1394_ixl_update_prep_set_tagsync() argument
786 old_set_tagsync_ixlp = (ixl1394_set_tagsync_t *)uvp->ixloldp; in hci1394_ixl_update_prep_set_tagsync()
787 new_set_tagsync_ixlp = (ixl1394_set_tagsync_t *)uvp->ixlnewp; in hci1394_ixl_update_prep_set_tagsync()
798 uvp->ixlxferp = uvp->ixloldp->next_ixlp; in hci1394_ixl_update_prep_set_tagsync()
799 while ((uvp->ixlxferp != NULL) && (((uvp->ixlxferp->ixl_opcode & in hci1394_ixl_update_prep_set_tagsync()
801 ((uvp->ixlxferp->ixl_opcode & IXL1394_OPTY_MASK) != 0))) { in hci1394_ixl_update_prep_set_tagsync()
803 uvp->ixlxferp = uvp->ixlxferp->next_ixlp; in hci1394_ixl_update_prep_set_tagsync()
807 if (uvp->ixlxferp == NULL) { in hci1394_ixl_update_prep_set_tagsync()
809 uvp->upd_status = IXL1394_EORIG_IXL_CORRUPTED; in hci1394_ixl_update_prep_set_tagsync()
815 if (uvp->ixlxferp->ixl_opcode == IXL1394_OP_SEND_NO_PKT) { in hci1394_ixl_update_prep_set_tagsync()
821 uvp->pkthdr1 = (uvp->ctxtp->isospd << DESC_PKT_SPD_SHIFT) | in hci1394_ixl_update_prep_set_tagsync()
823 (uvp->ctxtp->isochan << DESC_PKT_CHAN_SHIFT) | in hci1394_ixl_update_prep_set_tagsync()
831 uvp->ixlxferp->compiler_privatep) == NULL) { in hci1394_ixl_update_prep_set_tagsync()
833 uvp->upd_status = IXL1394_EORIG_IXL_CORRUPTED; in hci1394_ixl_update_prep_set_tagsync()
837 uvp->hdr_offset = xferctlp->dma[0].dma_bound & DESC_Z_MASK; in hci1394_ixl_update_prep_set_tagsync()
844 if (uvp->ixlxferp->ixl_opcode == IXL1394_OP_SEND_HDR_ONLY) { in hci1394_ixl_update_prep_set_tagsync()
849 uvp->hdr_offset = 0; in hci1394_ixl_update_prep_set_tagsync()
855 uvp->hdr_offset -= 1; in hci1394_ixl_update_prep_set_tagsync()
859 uvp->ixldepth = 0; in hci1394_ixl_update_prep_set_tagsync()
860 uvp->ixlcount = xferctlp->cnt; in hci1394_ixl_update_prep_set_tagsync()
871 hci1394_ixl_update_prep_recv_pkt(hci1394_ixl_update_vars_t *uvp) in hci1394_ixl_update_prep_recv_pkt() argument
882 old_xfer_pkt_ixlp = (ixl1394_xfer_pkt_t *)uvp->ixloldp; in hci1394_ixl_update_prep_recv_pkt()
883 new_xfer_pkt_ixlp = (ixl1394_xfer_pkt_t *)uvp->ixlnewp; in hci1394_ixl_update_prep_recv_pkt()
898 uvp->upd_status = IXL1394_EXFER_BUF_MISSING; in hci1394_ixl_update_prep_recv_pkt()
904 if (uvp->ixl_opcode == IXL1394_OP_RECV_PKT_U) { in hci1394_ixl_update_prep_recv_pkt()
909 uvp->ixlxferp = (ixl1394_command_t *) in hci1394_ixl_update_prep_recv_pkt()
910 uvp->ixloldp->compiler_privatep; in hci1394_ixl_update_prep_recv_pkt()
912 if (uvp->ixlxferp == NULL) { in hci1394_ixl_update_prep_recv_pkt()
914 uvp->upd_status = IXL1394_EORIG_IXL_CORRUPTED; in hci1394_ixl_update_prep_recv_pkt()
919 uvp->ixlxferp = uvp->ixloldp; in hci1394_ixl_update_prep_recv_pkt()
924 uvp->ixlxferp->compiler_privatep) == NULL) { in hci1394_ixl_update_prep_recv_pkt()
926 uvp->upd_status = IXL1394_EORIG_IXL_CORRUPTED; in hci1394_ixl_update_prep_recv_pkt()
931 uvp->ixldepth = 0; in hci1394_ixl_update_prep_recv_pkt()
932 uvp->ixlcount = 1; in hci1394_ixl_update_prep_recv_pkt()
938 uvp->hci_offset = xferctlp->dma[0].dma_bound & DESC_Z_MASK; in hci1394_ixl_update_prep_recv_pkt()
944 uvp->hci_offset -= (1 + uvp->ixloldp->compiler_resv); in hci1394_ixl_update_prep_recv_pkt()
950 uvp->bufsize = ((ixl1394_xfer_pkt_t *)uvp->ixlnewp)->size; in hci1394_ixl_update_prep_recv_pkt()
951 uvp->bufaddr = ((ixl1394_xfer_pkt_t *) in hci1394_ixl_update_prep_recv_pkt()
952 uvp->ixlnewp)->ixl_buf.ixldmac_addr; in hci1394_ixl_update_prep_recv_pkt()
959 uvp->hci_offset; in hci1394_ixl_update_prep_recv_pkt()
967 uvp->upd_status = IXL1394_EINTERNAL_ERROR; in hci1394_ixl_update_prep_recv_pkt()
972 uvp->hcihdr = desc_hdr; in hci1394_ixl_update_prep_recv_pkt()
973 uvp->hcihdr &= ~DESC_HDR_REQCOUNT_MASK; in hci1394_ixl_update_prep_recv_pkt()
974 uvp->hcihdr |= (uvp->bufsize << DESC_HDR_REQCOUNT_SHIFT) & in hci1394_ixl_update_prep_recv_pkt()
976 uvp->hcistatus = (uvp->bufsize << DESC_ST_RESCOUNT_SHIFT) & in hci1394_ixl_update_prep_recv_pkt()
987 hci1394_ixl_update_prep_recv_buf(hci1394_ixl_update_vars_t *uvp) in hci1394_ixl_update_prep_recv_buf() argument
993 old_xfer_buf_ixlp = (ixl1394_xfer_buf_t *)uvp->ixloldp; in hci1394_ixl_update_prep_recv_buf()
994 new_xfer_buf_ixlp = (ixl1394_xfer_buf_t *)uvp->ixlnewp; in hci1394_ixl_update_prep_recv_buf()
1002 if (((uvp->ctxtp->ctxt_flags & HCI1394_ISO_CTXT_BFFILL) != 0) || in hci1394_ixl_update_prep_recv_buf()
1013 uvp->upd_status = IXL1394_EXFER_BUF_MISSING; in hci1394_ixl_update_prep_recv_buf()
1022 if ((uvp->ctxtp->ctxt_flags & HCI1394_ISO_CTXT_BFFILL) == 0) { in hci1394_ixl_update_prep_recv_buf()
1027 uvp->upd_status = IXL1394_EXFER_BUF_CNT_DIFF; in hci1394_ixl_update_prep_recv_buf()
1033 uvp->ixlxferp = uvp->ixloldp; in hci1394_ixl_update_prep_recv_buf()
1036 if ((xferctlp = (hci1394_xfer_ctl_t *)uvp->ixlxferp->compiler_privatep) in hci1394_ixl_update_prep_recv_buf()
1039 uvp->upd_status = IXL1394_EORIG_IXL_CORRUPTED; in hci1394_ixl_update_prep_recv_buf()
1044 uvp->ixldepth = 0; in hci1394_ixl_update_prep_recv_buf()
1045 uvp->ixlcount = xferctlp->cnt; in hci1394_ixl_update_prep_recv_buf()
1048 if ((uvp->ctxtp->ctxt_flags & HCI1394_ISO_CTXT_BFFILL) == 0) { in hci1394_ixl_update_prep_recv_buf()
1049 uvp->bufsize = new_xfer_buf_ixlp->pkt_size; in hci1394_ixl_update_prep_recv_buf()
1051 uvp->bufsize = new_xfer_buf_ixlp->size; in hci1394_ixl_update_prep_recv_buf()
1055 uvp->bufaddr = new_xfer_buf_ixlp->ixl_buf.ixldmac_addr; in hci1394_ixl_update_prep_recv_buf()
1058 uvp->hci_offset = 0; in hci1394_ixl_update_prep_recv_buf()
1059 uvp->hcihdr = (uvp->bufsize << DESC_HDR_REQCOUNT_SHIFT) & in hci1394_ixl_update_prep_recv_buf()
1061 uvp->hcistatus = (uvp->bufsize << DESC_ST_RESCOUNT_SHIFT) & in hci1394_ixl_update_prep_recv_buf()
1074 hci1394_ixl_update_prep_send_pkt(hci1394_ixl_update_vars_t *uvp) in hci1394_ixl_update_prep_send_pkt() argument
1085 old_xfer_pkt_ixlp = (ixl1394_xfer_pkt_t *)uvp->ixloldp; in hci1394_ixl_update_prep_send_pkt()
1086 new_xfer_pkt_ixlp = (ixl1394_xfer_pkt_t *)uvp->ixlnewp; in hci1394_ixl_update_prep_send_pkt()
1102 uvp->upd_status = IXL1394_EXFER_BUF_MISSING; in hci1394_ixl_update_prep_send_pkt()
1108 if ((uvp->ixl_opcode == IXL1394_OP_SEND_PKT_WHDR_ST_U) && in hci1394_ixl_update_prep_send_pkt()
1111 uvp->upd_status = IXL1394_EPKT_HDR_MISSING; in hci1394_ixl_update_prep_send_pkt()
1117 if (uvp->ixl_opcode == IXL1394_OP_SEND_PKT_U) { in hci1394_ixl_update_prep_send_pkt()
1122 uvp->ixlxferp = (ixl1394_command_t *) in hci1394_ixl_update_prep_send_pkt()
1125 if (uvp->ixlxferp == NULL) { in hci1394_ixl_update_prep_send_pkt()
1127 uvp->upd_status = IXL1394_EORIG_IXL_CORRUPTED; in hci1394_ixl_update_prep_send_pkt()
1133 uvp->ixlxferp = uvp->ixloldp; in hci1394_ixl_update_prep_send_pkt()
1142 uvp->ixlxferp->compiler_privatep) == NULL) { in hci1394_ixl_update_prep_send_pkt()
1144 uvp->upd_status = IXL1394_EORIG_IXL_CORRUPTED; in hci1394_ixl_update_prep_send_pkt()
1150 uvp->ixldepth = 0; in hci1394_ixl_update_prep_send_pkt()
1151 uvp->ixlcount = 1; in hci1394_ixl_update_prep_send_pkt()
1157 uvp->hdr_offset = xferctlp->dma[0].dma_bound & DESC_Z_MASK - 1; in hci1394_ixl_update_prep_send_pkt()
1163 uvp->hci_offset = uvp->hdr_offset - 2 - uvp->ixloldp->compiler_resv; in hci1394_ixl_update_prep_send_pkt()
1166 uvp->bufsize = new_xfer_pkt_ixlp->size; in hci1394_ixl_update_prep_send_pkt()
1167 uvp->bufaddr = new_xfer_pkt_ixlp->ixl_buf.ixldmac_addr; in hci1394_ixl_update_prep_send_pkt()
1173 if (uvp->ixl_opcode == IXL1394_OP_SEND_PKT_WHDR_ST_U) { in hci1394_ixl_update_prep_send_pkt()
1174 uvp->bufsize -= 4; in hci1394_ixl_update_prep_send_pkt()
1175 uvp->bufaddr += 4; in hci1394_ixl_update_prep_send_pkt()
1180 uvp->hci_offset; in hci1394_ixl_update_prep_send_pkt()
1188 uvp->upd_status = IXL1394_EINTERNAL_ERROR; in hci1394_ixl_update_prep_send_pkt()
1194 uvp->hcihdr = desc_hdr; in hci1394_ixl_update_prep_send_pkt()
1195 uvp->hcihdr &= ~DESC_HDR_REQCOUNT_MASK; in hci1394_ixl_update_prep_send_pkt()
1196 uvp->hcihdr |= (uvp->bufsize << DESC_HDR_REQCOUNT_SHIFT) & in hci1394_ixl_update_prep_send_pkt()
1201 uvp->pkthdr2 = desc_hdr2; in hci1394_ixl_update_prep_send_pkt()
1202 uvp->pkthdr2 = (uvp->pkthdr2 & DESC_PKT_DATALEN_MASK) >> in hci1394_ixl_update_prep_send_pkt()
1204 uvp->pkthdr2 -= old_xfer_pkt_ixlp->size; in hci1394_ixl_update_prep_send_pkt()
1205 uvp->pkthdr2 += uvp->bufsize; in hci1394_ixl_update_prep_send_pkt()
1207 if (uvp->pkthdr2 > 0xFFFF) { in hci1394_ixl_update_prep_send_pkt()
1208 uvp->upd_status = IXL1394_EPKTSIZE_MAX_OFLO; in hci1394_ixl_update_prep_send_pkt()
1212 uvp->pkthdr2 = (uvp->pkthdr2 << DESC_PKT_DATALEN_SHIFT) & in hci1394_ixl_update_prep_send_pkt()
1223 hci1394_ixl_update_prep_send_buf(hci1394_ixl_update_vars_t *uvp) in hci1394_ixl_update_prep_send_buf() argument
1229 old_xfer_buf_ixlp = (ixl1394_xfer_buf_t *)uvp->ixloldp; in hci1394_ixl_update_prep_send_buf()
1230 new_xfer_buf_ixlp = (ixl1394_xfer_buf_t *)uvp->ixlnewp; in hci1394_ixl_update_prep_send_buf()
1246 uvp->upd_status = IXL1394_EXFER_BUF_MISSING; in hci1394_ixl_update_prep_send_buf()
1260 uvp->upd_status = IXL1394_EXFER_BUF_CNT_DIFF; in hci1394_ixl_update_prep_send_buf()
1266 uvp->ixlxferp = uvp->ixloldp; in hci1394_ixl_update_prep_send_buf()
1274 uvp->ixlxferp->compiler_privatep) == NULL) { in hci1394_ixl_update_prep_send_buf()
1276 uvp->upd_status = IXL1394_EORIG_IXL_CORRUPTED; in hci1394_ixl_update_prep_send_buf()
1282 uvp->ixldepth = 0; in hci1394_ixl_update_prep_send_buf()
1283 uvp->ixlcount = xferctlp->cnt; in hci1394_ixl_update_prep_send_buf()
1289 uvp->hdr_offset = xferctlp->dma[0].dma_bound & DESC_Z_MASK - 1; in hci1394_ixl_update_prep_send_buf()
1292 uvp->hci_offset = 0; in hci1394_ixl_update_prep_send_buf()
1295 uvp->bufsize = new_xfer_buf_ixlp->pkt_size; in hci1394_ixl_update_prep_send_buf()
1296 uvp->bufaddr = new_xfer_buf_ixlp->ixl_buf.ixldmac_addr; in hci1394_ixl_update_prep_send_buf()
1302 if (uvp->ixl_opcode == IXL1394_OP_SEND_PKT_WHDR_ST_U) { in hci1394_ixl_update_prep_send_buf()
1303 uvp->bufsize -= 4; in hci1394_ixl_update_prep_send_buf()
1304 uvp->bufaddr += 4; in hci1394_ixl_update_prep_send_buf()
1308 uvp->hcihdr = (uvp->bufsize << DESC_HDR_REQCOUNT_SHIFT) & in hci1394_ixl_update_prep_send_buf()
1312 uvp->pkthdr2 = (uvp->bufsize << DESC_PKT_DATALEN_SHIFT) & in hci1394_ixl_update_prep_send_buf()
1323 hci1394_ixl_update_perform(hci1394_ixl_update_vars_t *uvp) in hci1394_ixl_update_perform() argument
1334 ctxtp = uvp->ctxtp; in hci1394_ixl_update_perform()
1340 if ((uvp->ixlxferp == NULL) || in hci1394_ixl_update_perform()
1342 uvp->ixlxferp->compiler_privatep) == NULL)) { in hci1394_ixl_update_perform()
1344 uvp->upd_status = IXL1394_EINTERNAL_ERROR; in hci1394_ixl_update_perform()
1350 switch (uvp->ixl_opcode) { in hci1394_ixl_update_perform()
1356 old_jump_ixlp = (ixl1394_jump_t *)uvp->ixloldp; in hci1394_ixl_update_perform()
1357 new_jump_ixlp = (ixl1394_jump_t *)uvp->ixlnewp; in hci1394_ixl_update_perform()
1370 ddi_put32(acc_hdl, &hcidescp->hdr, uvp->hcihdr); in hci1394_ixl_update_perform()
1371 ddi_put32(acc_hdl, &hcidescp->branch, uvp->jumpaddr); in hci1394_ixl_update_perform()
1378 if (uvp->skipmode == IXL1394_SKIP_TO_NEXT) { in hci1394_ixl_update_perform()
1379 hcidescp -= uvp->hci_offset; in hci1394_ixl_update_perform()
1380 ddi_put32(acc_hdl, &hcidescp->branch, uvp->skipaddr); in hci1394_ixl_update_perform()
1387 uvp->upd_status = IXL1394_EINTERNAL_ERROR; in hci1394_ixl_update_perform()
1400 old_set_skipmode_ixlp = (ixl1394_set_skipmode_t *)uvp->ixloldp; in hci1394_ixl_update_perform()
1401 new_set_skipmode_ixlp = (ixl1394_set_skipmode_t *)uvp->ixlnewp; in hci1394_ixl_update_perform()
1407 if (uvp->skipmode == IXL1394_SKIP_TO_NEXT) { in hci1394_ixl_update_perform()
1408 skipaddrlast = uvp->skipaddr; in hci1394_ixl_update_perform()
1419 xferctlp->dma[ii].dma_descp - uvp->hci_offset; in hci1394_ixl_update_perform()
1423 if (uvp->skipmode == IXL1394_SKIP_TO_NEXT) { in hci1394_ixl_update_perform()
1425 uvp->skipaddr = in hci1394_ixl_update_perform()
1428 uvp->skipaddr = skipaddrlast; in hci1394_ixl_update_perform()
1430 } else if (uvp->skipmode == IXL1394_SKIP_TO_SELF) { in hci1394_ixl_update_perform()
1431 uvp->skipaddr = xferctlp->dma[ii].dma_bound; in hci1394_ixl_update_perform()
1434 ddi_put32(acc_hdl, &hcidescp->branch, uvp->skipaddr); in hci1394_ixl_update_perform()
1440 uvp->upd_status = IXL1394_EINTERNAL_ERROR; in hci1394_ixl_update_perform()
1451 old_set_skipmode_ixlp->skipmode = uvp->skipmode; in hci1394_ixl_update_perform()
1454 (ixl1394_priv_t)uvp->skipxferp; in hci1394_ixl_update_perform()
1461 old_set_tagsync_ixlp = (ixl1394_set_tagsync_t *)uvp->ixloldp; in hci1394_ixl_update_perform()
1462 new_set_tagsync_ixlp = (ixl1394_set_tagsync_t *)uvp->ixlnewp; in hci1394_ixl_update_perform()
1472 xferctlp->dma[ii].dma_descp - uvp->hdr_offset; in hci1394_ixl_update_perform()
1475 ddi_put32(acc_hdl, &hcidescp->q1, uvp->pkthdr1); in hci1394_ixl_update_perform()
1481 uvp->upd_status = IXL1394_EINTERNAL_ERROR; in hci1394_ixl_update_perform()
1501 old_xfer_pkt_ixlp = (ixl1394_xfer_pkt_t *)uvp->ixloldp; in hci1394_ixl_update_perform()
1502 new_xfer_pkt_ixlp = (ixl1394_xfer_pkt_t *)uvp->ixlnewp; in hci1394_ixl_update_perform()
1509 xferctlp->dma[0].dma_descp - uvp->hci_offset; in hci1394_ixl_update_perform()
1512 ddi_put32(acc_hdl, &hcidescp->hdr, uvp->hcihdr); in hci1394_ixl_update_perform()
1513 ddi_put32(acc_hdl, &hcidescp->data_addr, uvp->bufaddr); in hci1394_ixl_update_perform()
1519 uvp->upd_status = IXL1394_EINTERNAL_ERROR; in hci1394_ixl_update_perform()
1527 uvp->hcistatus; in hci1394_ixl_update_perform()
1534 uvp->upd_status = IXL1394_EINTERNAL_ERROR; in hci1394_ixl_update_perform()
1555 old_xfer_buf_ixlp = (ixl1394_xfer_buf_t *)uvp->ixloldp; in hci1394_ixl_update_perform()
1556 new_xfer_buf_ixlp = (ixl1394_xfer_buf_t *)uvp->ixlnewp; in hci1394_ixl_update_perform()
1566 xferctlp->dma[ii].dma_descp - uvp->hci_offset; in hci1394_ixl_update_perform()
1570 ddi_put32(acc_hdl, &hcidescp->data_addr, uvp->bufaddr); in hci1394_ixl_update_perform()
1576 uvp->bufaddr += uvp->bufsize; in hci1394_ixl_update_perform()
1582 uvp->upd_status = IXL1394_EINTERNAL_ERROR; in hci1394_ixl_update_perform()
1593 uvp->hcihdr; in hci1394_ixl_update_perform()
1602 uvp->hcistatus; in hci1394_ixl_update_perform()
1609 uvp->upd_status = IXL1394_EINTERNAL_ERROR; in hci1394_ixl_update_perform()
1632 old_xfer_pkt_ixlp = (ixl1394_xfer_pkt_t *)uvp->ixloldp; in hci1394_ixl_update_perform()
1633 new_xfer_pkt_ixlp = (ixl1394_xfer_pkt_t *)uvp->ixlnewp; in hci1394_ixl_update_perform()
1641 uvp->hdr_offset; in hci1394_ixl_update_perform()
1645 ddi_put32(acc_hdl, &hcidescp->q2, uvp->pkthdr2); in hci1394_ixl_update_perform()
1646 ddi_put32(acc_hdl, &hcidescp->hdr, uvp->hcihdr); in hci1394_ixl_update_perform()
1647 ddi_put32(acc_hdl, &hcidescp->data_addr, uvp->bufaddr); in hci1394_ixl_update_perform()
1653 uvp->upd_status = IXL1394_EINTERNAL_ERROR; in hci1394_ixl_update_perform()
1673 old_xfer_buf_ixlp = (ixl1394_xfer_buf_t *)uvp->ixloldp; in hci1394_ixl_update_perform()
1674 new_xfer_buf_ixlp = (ixl1394_xfer_buf_t *)uvp->ixlnewp; in hci1394_ixl_update_perform()
1685 xferctlp->dma[ii].dma_descp - uvp->hdr_offset; in hci1394_ixl_update_perform()
1689 ddi_put32(acc_hdl, &hcidescp->q2, uvp->pkthdr2); in hci1394_ixl_update_perform()
1690 ddi_put32(acc_hdl, &hcidescp->data_addr, uvp->bufaddr); in hci1394_ixl_update_perform()
1693 uvp->bufaddr += uvp->bufsize; in hci1394_ixl_update_perform()
1699 uvp->upd_status = IXL1394_EINTERNAL_ERROR; in hci1394_ixl_update_perform()
1710 uvp->hcihdr; in hci1394_ixl_update_perform()
1717 uvp->upd_status = IXL1394_EINTERNAL_ERROR; in hci1394_ixl_update_perform()
1736 uvp->upd_status = IXL1394_EINTERNAL_ERROR; in hci1394_ixl_update_perform()
1743 HCI1394_IRCTXT_CTRL_SET(uvp->soft_statep, ctxtp->ctxt_index, in hci1394_ixl_update_perform()
1746 HCI1394_ITCTXT_CTRL_SET(uvp->soft_statep, ctxtp->ctxt_index, in hci1394_ixl_update_perform()
1760 hci1394_ixl_update_evaluate(hci1394_ixl_update_vars_t *uvp) in hci1394_ixl_update_evaluate() argument
1767 ctxtp = uvp->ctxtp; in hci1394_ixl_update_evaluate()
1800 if (hci1394_ixl_dma_sync(uvp->soft_statep, ctxtp) == in hci1394_ixl_update_evaluate()
1804 uvp->upd_status = IXL1394_EPOST_UPD_DMALOST; in hci1394_ixl_update_evaluate()
1816 if ((uvp->locn_info[ii].ixlp == ixlp) && in hci1394_ixl_update_evaluate()
1817 (uvp->locn_info[ii].ixldepth == ixldepth)) { in hci1394_ixl_update_evaluate()
1828 uvp->upd_status = IXL1394_EPOST_UPD_DMALOST; in hci1394_ixl_update_evaluate()
1839 hci1394_ixl_update_analysis(hci1394_ixl_update_vars_t *uvp) in hci1394_ixl_update_analysis() argument
1847 ctxtp = uvp->ctxtp; in hci1394_ixl_update_analysis()
1881 status = hci1394_ixl_dma_sync(uvp->soft_statep, ctxtp); in hci1394_ixl_update_analysis()
1887 uvp->upd_status = IXL1394_EPRE_UPD_DMALOST; in hci1394_ixl_update_analysis()
1897 hci1394_ixl_update_set_locn_info(uvp); in hci1394_ixl_update_analysis()
1910 if ((uvp->locn_info[ii].ixlp == uvp->ixlxferp) && in hci1394_ixl_update_analysis()
1911 (uvp->locn_info[ii].ixldepth >= uvp->ixldepth) && in hci1394_ixl_update_analysis()
1912 (uvp->locn_info[ii].ixldepth < in hci1394_ixl_update_analysis()
1913 (uvp->ixldepth + uvp->ixlcount))) { in hci1394_ixl_update_analysis()
1915 uvp->upd_status = IXL1394_ERISK_PROHIBITS_UPD; in hci1394_ixl_update_analysis()
1931 hci1394_ixl_update_set_locn_info(hci1394_ixl_update_vars_t *uvp) in hci1394_ixl_update_set_locn_info() argument
1942 ctxtp = uvp->ctxtp; in hci1394_ixl_update_set_locn_info()
1960 uvp->locn_info[ii].ixlp = ixlp; in hci1394_ixl_update_set_locn_info()
1961 uvp->locn_info[ii].ixldepth = ixldepth; in hci1394_ixl_update_set_locn_info()