Lines Matching refs:data

123 fab_fire_to_data(fmd_hdl_t *hdl, nvlist_t *nvl, fab_data_t *data)  in fab_fire_to_data()  argument
125 data->nvl = nvl; in fab_fire_to_data()
128 data->dev_type = PCIE_PCIECAP_DEV_TYPE_ROOT; in fab_fire_to_data()
130 data->pcie_ue_sev = (PCIE_AER_UCE_DLP | PCIE_AER_UCE_SD | in fab_fire_to_data()
135 fab_xlate_fire_ce(fmd_hdl_t *hdl, fab_data_t *data, nvlist_t *erpt, in fab_xlate_fire_ce() argument
152 data->pcie_err_status = PCIE_DEVSTS_CE_DETECTED; in fab_xlate_fire_ce()
156 data->pcie_ce_status = (uint32_t)reg | (uint32_t)(reg >> 32); in fab_xlate_fire_ce()
163 fab_xlate_fire_ue(fmd_hdl_t *hdl, fab_data_t *data, nvlist_t *erpt, in fab_xlate_fire_ue() argument
182 data->pci_err_status = entry->pci_err_sts; in fab_xlate_fire_ue()
183 data->pci_bdg_sec_stat = entry->pci_bdg_sts; in fab_xlate_fire_ue()
186 if (entry->fire_bit & data->pcie_ue_sev) in fab_xlate_fire_ue()
187 data->pcie_err_status = PCIE_DEVSTS_FE_DETECTED; in fab_xlate_fire_ue()
189 data->pcie_err_status = PCIE_DEVSTS_NFE_DETECTED; in fab_xlate_fire_ue()
192 data->pcie_err_status |= PCIE_DEVSTS_UR_DETECTED; in fab_xlate_fire_ue()
196 data->pcie_ue_status = (uint32_t)reg | (uint32_t)(reg >> 32); in fab_xlate_fire_ue()
203 for (data->pcie_adv_ctl = (uint32_t)-1; temp; in fab_xlate_fire_ue()
204 data->pcie_adv_ctl++) in fab_xlate_fire_ue()
212 data->pcie_ue_hdr[0] = (uint32_t)(reg >> 32); in fab_xlate_fire_ue()
213 data->pcie_ue_hdr[1] = (uint32_t)(reg); in fab_xlate_fire_ue()
216 data->pcie_ue_hdr[2] = (uint32_t)(reg >> 32); in fab_xlate_fire_ue()
217 data->pcie_ue_hdr[3] = (uint32_t)(reg); in fab_xlate_fire_ue()
220 hdr = (pcie_tlp_hdr_t *)(&data->pcie_ue_hdr[0]); in fab_xlate_fire_ue()
225 data->pcie_ue_tgt_trans = PF_ADDR_PIO; in fab_xlate_fire_ue()
227 data->pcie_ue_tgt_addr = reg; in fab_xlate_fire_ue()
229 data->pcie_ue_tgt_addr = data->pcie_ue_hdr[2]; in fab_xlate_fire_ue()
234 data->pcie_ue_tgt_trans = PF_ADDR_CFG; in fab_xlate_fire_ue()
235 data->pcie_ue_tgt_bdf = data->pcie_ue_hdr[2] >> 16; in fab_xlate_fire_ue()
242 data->pcie_ue_hdr[0] = (uint32_t)(reg >> 32); in fab_xlate_fire_ue()
243 data->pcie_ue_hdr[1] = (uint32_t)(reg); in fab_xlate_fire_ue()
246 data->pcie_ue_hdr[2] = (uint32_t)(reg >> 32); in fab_xlate_fire_ue()
247 data->pcie_ue_hdr[3] = (uint32_t)(reg); in fab_xlate_fire_ue()
254 fab_xlate_fire_oe(fmd_hdl_t *hdl, fab_data_t *data, nvlist_t *erpt, in fab_xlate_fire_oe() argument
272 data->pci_err_status = entry->pci_err_sts; in fab_xlate_fire_oe()
273 data->pci_bdg_sec_stat = entry->pci_bdg_sts; in fab_xlate_fire_oe()
276 data->pcie_ue_hdr[0] = (uint32_t)(reg >> 32); in fab_xlate_fire_oe()
277 data->pcie_ue_hdr[1] = (uint32_t)(reg); in fab_xlate_fire_oe()
280 data->pcie_ue_hdr[2] = (uint32_t)(reg >> 32); in fab_xlate_fire_oe()
281 data->pcie_ue_hdr[3] = (uint32_t)(reg); in fab_xlate_fire_oe()
284 if (((pcie_tlp_hdr_t *)(&data->pcie_ue_hdr[0]))->type == in fab_xlate_fire_oe()
286 pcie_cpl_t *cpl = (pcie_cpl_t *)&data->pcie_ue_hdr[1]; in fab_xlate_fire_oe()
289 data->pci_err_status = 0; in fab_xlate_fire_oe()
290 data->pci_bdg_sec_stat = PCI_STAT_R_MAST_AB | in fab_xlate_fire_oe()
294 data->pci_err_status = 0; in fab_xlate_fire_oe()
295 data->pci_bdg_sec_stat = PCI_STAT_R_TARG_AB | in fab_xlate_fire_oe()
303 if (entry->fire_bit & data->pcie_ue_sev) in fab_xlate_fire_oe()
304 data->pcie_err_status = PCIE_DEVSTS_FE_DETECTED; in fab_xlate_fire_oe()
306 data->pcie_err_status = PCIE_DEVSTS_NFE_DETECTED; in fab_xlate_fire_oe()
309 data->pcie_ue_status = entry->fire_bit; in fab_xlate_fire_oe()
315 fab_xlate_fire_dmc(fmd_hdl_t *hdl, fab_data_t *data, nvlist_t *erpt, in fab_xlate_fire_dmc() argument
335 data->pci_err_status = entry->pci_err_sts; in fab_xlate_fire_dmc()
336 data->pci_bdg_sec_stat = entry->pci_bdg_sts; in fab_xlate_fire_dmc()
339 data->pcie_err_status = PCIE_DEVSTS_NFE_DETECTED; in fab_xlate_fire_dmc()
342 data->pcie_ue_status = entry->fire_bit; in fab_xlate_fire_dmc()
346 for (data->pcie_adv_ctl = (uint32_t)-1; temp; data->pcie_adv_ctl++) in fab_xlate_fire_dmc()
354 data->pcie_ue_hdr[0] = (uint32_t)(temp << 24); in fab_xlate_fire_dmc()
355 data->pcie_ue_tgt_trans = PF_ADDR_DMA; in fab_xlate_fire_dmc()
358 data->pcie_ue_hdr[1] = (uint32_t)(temp << 16); in fab_xlate_fire_dmc()
359 data->pcie_ue_tgt_bdf = temp; in fab_xlate_fire_dmc()
365 data->pcie_ue_hdr[2] = reg; in fab_xlate_fire_dmc()
366 data->pcie_ue_hdr[3] = 0; in fab_xlate_fire_dmc()
367 data->pcie_ue_tgt_addr = reg; in fab_xlate_fire_dmc()
370 fmd_hdl_debug(hdl, "HEADER 0 0x%x\n", data->pcie_ue_hdr[0]); in fab_xlate_fire_dmc()
371 fmd_hdl_debug(hdl, "HEADER 1 0x%x\n", data->pcie_ue_hdr[1]); in fab_xlate_fire_dmc()
372 fmd_hdl_debug(hdl, "HEADER 2 0x%x\n", data->pcie_ue_hdr[2]); in fab_xlate_fire_dmc()
373 fmd_hdl_debug(hdl, "HEADER 3 0x%x\n", data->pcie_ue_hdr[3]); in fab_xlate_fire_dmc()
381 fab_data_t data = {0}; in fab_xlate_fire_erpts() local
385 fab_fire_to_data(hdl, nvl, &data); in fab_xlate_fire_erpts()
388 if (! fab_xlate_fire_ce(hdl, &data, nvl, class) && in fab_xlate_fire_erpts()
389 ! fab_xlate_fire_ue(hdl, &data, nvl, class)) in fab_xlate_fire_erpts()
390 (void) fab_xlate_fire_oe(hdl, &data, nvl, class); in fab_xlate_fire_erpts()
393 (void) fab_xlate_fire_dmc(hdl, &data, nvl, class); in fab_xlate_fire_erpts()
395 fab_xlate_pcie_erpts(hdl, &data); in fab_xlate_fire_erpts()