us3_cheetahplus.c (fb2f18f8) us3_cheetahplus.c (5cff7825)
1/*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE

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759 * then delay 1us (in ppm code) prior to assert J_CHNG_L signal.
760 * To reverse the effect, upon exiting Estar, software restores the
761 * MCU to its original state.
762 */
763/* ARGSUSED1 */
764void
765cpu_change_speed(uint64_t divisor, uint64_t arg2)
766{
1/*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE

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759 * then delay 1us (in ppm code) prior to assert J_CHNG_L signal.
760 * To reverse the effect, upon exiting Estar, software restores the
761 * MCU to its original state.
762 */
763/* ARGSUSED1 */
764void
765cpu_change_speed(uint64_t divisor, uint64_t arg2)
766{
767 bus_config_eclk_t *bceclk;
767 bus_config_eclk_t *bceclk;
768 uint64_t reg;
768 uint64_t reg;
769 processor_info_t *pi = &(CPU->cpu_type_info);
769
770 for (bceclk = bus_config_eclk; bceclk->divisor; bceclk++) {
771 if (bceclk->divisor != divisor)
772 continue;
773 reg = get_safari_config();
774 reg &= ~SAFARI_CONFIG_ECLK_MASK;
775 reg |= bceclk->mask;
776 set_safari_config(reg);
777 CPU->cpu_m.divisor = (uchar_t)divisor;
770
771 for (bceclk = bus_config_eclk; bceclk->divisor; bceclk++) {
772 if (bceclk->divisor != divisor)
773 continue;
774 reg = get_safari_config();
775 reg &= ~SAFARI_CONFIG_ECLK_MASK;
776 reg |= bceclk->mask;
777 set_safari_config(reg);
778 CPU->cpu_m.divisor = (uchar_t)divisor;
779 pi->pi_curr_clock =
780 (((uint64_t)pi->pi_clock * 1000000) / divisor);
778 return;
779 }
780 /*
781 * We will reach here only if OBP and kernel don't agree on
782 * the speeds supported by the CPU.
783 */
784 cmn_err(CE_WARN, "cpu_change_speed: bad divisor %" PRIu64, divisor);
785}

--- 574 unchanged lines hidden --- 		781 return;
782 }
783 /*
784 * We will reach here only if OBP and kernel don't agree on
785 * the speeds supported by the CPU.
786 */
787 cmn_err(CE_WARN, "cpu_change_speed: bad divisor %" PRIu64, divisor);
788}

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