spitfire.c (05d3dc4b) spitfire.c (5cff7825)
1/*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE

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2815
2816/* ARGSUSED */
2817void
2818cpu_change_speed(uint64_t new_divisor, uint64_t arg2)
2819{
2820#ifdef HUMMINGBIRD
2821 uint64_t cur_mask, cur_divisor = 0;
2822 volatile uint64_t reg;
1/*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE

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2815
2816/* ARGSUSED */
2817void
2818cpu_change_speed(uint64_t new_divisor, uint64_t arg2)
2819{
2820#ifdef HUMMINGBIRD
2821 uint64_t cur_mask, cur_divisor = 0;
2822 volatile uint64_t reg;
2823 processor_info_t *pi = &(CPU->cpu_type_info);
2823 int index;
2824
2825 if ((new_divisor < HB_FULL_DIV || new_divisor > HB_LOWEST_DIV) ||
2826 (hb_eclk[new_divisor] == HB_ECLK_INVALID)) {
2827 cmn_err(CE_WARN, "cpu_change_speed: bad divisor 0x%lx",
2828 new_divisor);
2829 return;
2830 }

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2891 SET_ESTAR_MODE(hb_eclk[new_divisor]);
2892
2893 } else if (cur_divisor > new_divisor) {
2894 SET_ESTAR_MODE(hb_eclk[new_divisor]);
2895 /* LINTED: E_FALSE_LOGICAL_EXPR */
2896 CHANGE_REFRESH_COUNT(HB_SPEED_UP, cur_divisor, new_divisor);
2897 }
2898 CPU->cpu_m.divisor = (uchar_t)new_divisor;
2824 int index;
2825
2826 if ((new_divisor < HB_FULL_DIV || new_divisor > HB_LOWEST_DIV) ||
2827 (hb_eclk[new_divisor] == HB_ECLK_INVALID)) {
2828 cmn_err(CE_WARN, "cpu_change_speed: bad divisor 0x%lx",
2829 new_divisor);
2830 return;
2831 }

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2892 SET_ESTAR_MODE(hb_eclk[new_divisor]);
2893
2894 } else if (cur_divisor > new_divisor) {
2895 SET_ESTAR_MODE(hb_eclk[new_divisor]);
2896 /* LINTED: E_FALSE_LOGICAL_EXPR */
2897 CHANGE_REFRESH_COUNT(HB_SPEED_UP, cur_divisor, new_divisor);
2898 }
2899 CPU->cpu_m.divisor = (uchar_t)new_divisor;
2900 pi->pi_curr_clock =
2901 (((uint64_t)pi->pi_clock * 1000000) / new_divisor);
2899#endif
2900}
2901
2902/*
2903 * Clear the AFSR sticky bits and the UDBs. For Sabre/Spitfire/Blackbird,
2904 * we clear all the sticky bits. If a non-null pointer to a async fault
2905 * structure argument is passed in, the captured error state (AFSR, AFAR, UDBs)
2906 * info will be returned in the structure. If a non-null pointer to a

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2902#endif
2903}
2904
2905/*
2906 * Clear the AFSR sticky bits and the UDBs. For Sabre/Spitfire/Blackbird,
2907 * we clear all the sticky bits. If a non-null pointer to a async fault
2908 * structure argument is passed in, the captured error state (AFSR, AFAR, UDBs)
2909 * info will be returned in the structure. If a non-null pointer to a

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