ao.h (a307a255) ao.h (8a40a695)
1/*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE

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45
46#define AO_MCA_MAX_ERRORS 10
47
48typedef struct ao_data ao_data_t;
49
50typedef struct ao_bank_regs {
51 uint32_t abr_status;
52 uint32_t abr_addr;
1/*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE

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45
46#define AO_MCA_MAX_ERRORS 10
47
48typedef struct ao_data ao_data_t;
49
50typedef struct ao_bank_regs {
51 uint32_t abr_status;
52 uint32_t abr_addr;
53 uint32_t abr_misc;
53} ao_bank_regs_t;
54
55extern ao_bank_regs_t ao_bank_regs[AMD_MCA_BANK_COUNT];
56
57/*
58 * Rather than using torturous conditionals, we match errors using a table of
59 * ao_error_disp_t's. The members in the ao_error_disp_t are matched against
60 * the value of MCi_STATUS, with a successful match indicating that the given

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134 * The logout areas contain both global error state (acl_ip, acl_timestamp,
135 * etc.), as well as a bank array. The bank array contains one ao_bank_logout_t
136 * per error reporting bank.
137 */
138
139typedef struct ao_bank_logout {
140 uint64_t abl_status; /* Saved MCi_STATUS register */
141 uint64_t abl_addr; /* Saved MCi_ADDR register */
54} ao_bank_regs_t;
55
56extern ao_bank_regs_t ao_bank_regs[AMD_MCA_BANK_COUNT];
57
58/*
59 * Rather than using torturous conditionals, we match errors using a table of
60 * ao_error_disp_t's. The members in the ao_error_disp_t are matched against
61 * the value of MCi_STATUS, with a successful match indicating that the given

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135 * The logout areas contain both global error state (acl_ip, acl_timestamp,
136 * etc.), as well as a bank array. The bank array contains one ao_bank_logout_t
137 * per error reporting bank.
138 */
139
140typedef struct ao_bank_logout {
141 uint64_t abl_status; /* Saved MCi_STATUS register */
142 uint64_t abl_addr; /* Saved MCi_ADDR register */
143 uint64_t abl_misc; /* Saved MCi_MISC register */
142} ao_bank_logout_t;
143
144#define AO_ACL_F_PRIV 0x1 /* #mc in kernel mode (else user) */
145#define AO_ACL_F_FATAL 0x2 /* logout detected fatal error(s) */
146
147typedef struct ao_cpu_logout {
148 ao_data_t *acl_ao; /* pointer to per-cpu ao_data_t */
149 uintptr_t acl_ip; /* instruction pointer if #mc trap */

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159#define AO_MCA_LOGOUT_EXCEPTION 0
160#define AO_MCA_LOGOUT_POLLER 1
161#define AO_MCA_LOGOUT_NUM 2
162
163#define AO_MCA_F_UNFAULTING 0x1 /* CPU exiting faulted state */
164
165/*
166 * We store config as inherited from the BIOS to assist in troubleshooting.
144} ao_bank_logout_t;
145
146#define AO_ACL_F_PRIV 0x1 /* #mc in kernel mode (else user) */
147#define AO_ACL_F_FATAL 0x2 /* logout detected fatal error(s) */
148
149typedef struct ao_cpu_logout {
150 ao_data_t *acl_ao; /* pointer to per-cpu ao_data_t */
151 uintptr_t acl_ip; /* instruction pointer if #mc trap */

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161#define AO_MCA_LOGOUT_EXCEPTION 0
162#define AO_MCA_LOGOUT_POLLER 1
163#define AO_MCA_LOGOUT_NUM 2
164
165#define AO_MCA_F_UNFAULTING 0x1 /* CPU exiting faulted state */
166
167/*
168 * We store config as inherited from the BIOS to assist in troubleshooting.
169 * The NorthBridge config is stored in the chipshared structure below.
167 */
168typedef struct ao_bios_cfg {
169 uint64_t bcfg_bank_ctl[AMD_MCA_BANK_COUNT];
170 uint64_t bcfg_bank_mask[AMD_MCA_BANK_COUNT];
170 */
171typedef struct ao_bios_cfg {
172 uint64_t bcfg_bank_ctl[AMD_MCA_BANK_COUNT];
173 uint64_t bcfg_bank_mask[AMD_MCA_BANK_COUNT];
171 uint32_t bcfg_nb_cfg;
174 uint64_t bcfg_bank_misc[AMD_MCA_BANK_COUNT];
172} ao_bios_cfg_t;
173
174/*
175 * The master data structure used to hold MCA-related state.
176 */
177typedef struct ao_mca {
178 ao_bios_cfg_t ao_mca_bios_cfg; /* Bank and NB config before our init */
179 ao_cpu_logout_t ao_mca_logout[AO_MCA_LOGOUT_NUM]; /* save areas */
180 kmutex_t ao_mca_poll_lock; /* keep pollers from colliding */
181 ao_mca_poll_trace_t *ao_mca_poll_trace; /* trace buffers for this cpu */
182 uint_t ao_mca_poll_curtrace; /* most recently-filled trace buffer */
183 uint_t ao_mca_flags; /* AO_MCA_F_* */
184} ao_mca_t;
185
186/*
175} ao_bios_cfg_t;
176
177/*
178 * The master data structure used to hold MCA-related state.
179 */
180typedef struct ao_mca {
181 ao_bios_cfg_t ao_mca_bios_cfg; /* Bank and NB config before our init */
182 ao_cpu_logout_t ao_mca_logout[AO_MCA_LOGOUT_NUM]; /* save areas */
183 kmutex_t ao_mca_poll_lock; /* keep pollers from colliding */
184 ao_mca_poll_trace_t *ao_mca_poll_trace; /* trace buffers for this cpu */
185 uint_t ao_mca_poll_curtrace; /* most recently-filled trace buffer */
186 uint_t ao_mca_flags; /* AO_MCA_F_* */
187} ao_mca_t;
188
189/*
190 * Per-chip state
191 */
192struct ao_chipshared {
193 uint32_t aos_chiprev; /* Chip revision */
194 volatile ulong_t aos_cfgonce; /* Config performed once per chip */
195 kmutex_t aos_nb_poll_lock; /* Keep NB pollers from colliding */
196 uint64_t aos_nb_poll_timestamp; /* Timestamp of last NB poll */
197 int aos_nb_poll_owner; /* The cpuid of current NB poller */
198 uint64_t aos_bcfg_nb_ctl; /* BIOS value of MC4_CTL */
199 uint64_t aos_bcfg_nb_mask; /* BIOS value of MC4_MASK */
200 uint64_t aos_bcfg_nb_misc; /* BIOS value of MC4_MISC */
201 uint32_t aos_bcfg_nb_cfg; /* BIOS value of NB MCA Config */
202 uint32_t aos_bcfg_nb_sparectl; /* BIOS value of Online Spare Control */
203};
204
205/* Bit numbers for aos_cfgonce */
206enum ao_cfgonce_bitnum {
207 AO_CFGONCE_NBMCA
208};
209
210
211/*
187 * Per-CPU state
188 */
189struct ao_data {
212 * Per-CPU state
213 */
214struct ao_data {
190 ao_mca_t ao_mca; /* MCA state for this CPU */
191 cpu_t *ao_cpu; /* link to CPU's cpu_t */
192 const cmi_mc_ops_t *ao_mc_ops; /* memory controller ops */
193 void *ao_mc_data; /* argument for memory controller ops */
215 ao_mca_t ao_mca; /* MCA state for this CPU */
216 cpu_t *ao_cpu; /* link to CPU's cpu_t */
217 const cmi_mc_ops_t *ao_mc_ops; /* memory controller ops */
218 void *ao_mc_data; /* argument for MC ops */
219 struct ao_chipshared *ao_shared; /* Shared state for the chip */
194};
195
196#ifdef _KERNEL
197
198struct regs;
199
200extern errorq_t *ao_mca_queue;
201extern const cmi_ops_t _cmi_ops;
202
203extern void ao_faulted_enter(void *);
204extern void ao_faulted_exit(void *);
220};
221
222#ifdef _KERNEL
223
224struct regs;
225
226extern errorq_t *ao_mca_queue;
227extern const cmi_ops_t _cmi_ops;
228
229extern void ao_faulted_enter(void *);
230extern void ao_faulted_exit(void *);
205extern int ao_scrubber_enable(void *, uint64_t, uint64_t);
231extern int ao_scrubber_enable(void *, uint64_t, uint64_t, int);
206
207extern void ao_mca_post_init(void *);
208extern void ao_mca_init(void *);
209extern int ao_mca_trap(void *, struct regs *);
210extern int ao_mca_inject(void *, cmi_mca_regs_t *, uint_t);
211extern void ao_mca_poke(void *);
232
233extern void ao_mca_post_init(void *);
234extern void ao_mca_init(void *);
235extern int ao_mca_trap(void *, struct regs *);
236extern int ao_mca_inject(void *, cmi_mca_regs_t *, uint_t);
237extern void ao_mca_poke(void *);
212extern void ao_mca_poll_init(ao_mca_t *);
238extern void ao_mca_poll_init(ao_data_t *, int);
213extern void ao_mca_poll_start(void);
214
239extern void ao_mca_poll_start(void);
240
215extern int ao_mca_logout(ao_cpu_logout_t *, struct regs *, int *);
241extern int ao_mca_logout(ao_cpu_logout_t *, struct regs *, int *, int,
242 uint32_t);
216extern void ao_mca_drain(void *, const void *, const errorq_elem_t *);
217extern nvlist_t *ao_fmri_create(ao_data_t *, nv_alloc_t *);
218
219extern void ao_mc_register(void *, const cmi_mc_ops_t *, void *);
220extern const struct cmi_mc_ops *ao_mc_getops(void *);
221extern int ao_mc_patounum(ao_data_t *, uint64_t, uint32_t, int, mc_unum_t *);
222extern int ao_mc_unumtopa(ao_data_t *, mc_unum_t *, nvlist_t *, uint64_t *);
223
224extern void ao_pcicfg_write(uint_t, uint_t, uint_t, uint32_t);
225extern uint32_t ao_pcicfg_read(uint_t, uint_t, uint_t);
226
243extern void ao_mca_drain(void *, const void *, const errorq_elem_t *);
244extern nvlist_t *ao_fmri_create(ao_data_t *, nv_alloc_t *);
245
246extern void ao_mc_register(void *, const cmi_mc_ops_t *, void *);
247extern const struct cmi_mc_ops *ao_mc_getops(void *);
248extern int ao_mc_patounum(ao_data_t *, uint64_t, uint32_t, int, mc_unum_t *);
249extern int ao_mc_unumtopa(ao_data_t *, mc_unum_t *, nvlist_t *, uint64_t *);
250
251extern void ao_pcicfg_write(uint_t, uint_t, uint_t, uint32_t);
252extern uint32_t ao_pcicfg_read(uint_t, uint_t, uint_t);
253
254extern int ao_chip_once(ao_data_t *, enum ao_cfgonce_bitnum);
255
227#endif /* _KERNEL */
228
229#ifdef __cplusplus
230}
231#endif
232
233#endif /* _AO_H */
256#endif /* _KERNEL */
257
258#ifdef __cplusplus
259}
260#endif
261
262#endif /* _AO_H */