emlxs_sli4.c (81a990d5) | emlxs_sli4.c (a9800beb) |
---|---|
1/* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE --- 22 unchanged lines hidden (view full) --- 31EMLXS_MSG_DEF(EMLXS_SLI4_C); 32 33static int emlxs_sli4_create_queues(emlxs_hba_t *hba, 34 MAILBOXQ *mbq); 35static int emlxs_sli4_post_hdr_tmplates(emlxs_hba_t *hba, 36 MAILBOXQ *mbq); 37static int emlxs_sli4_post_sgl_pages(emlxs_hba_t *hba, 38 MAILBOXQ *mbq); | 1/* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License (the "License"). 6 * You may not use this file except in compliance with the License. 7 * 8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE --- 22 unchanged lines hidden (view full) --- 31EMLXS_MSG_DEF(EMLXS_SLI4_C); 32 33static int emlxs_sli4_create_queues(emlxs_hba_t *hba, 34 MAILBOXQ *mbq); 35static int emlxs_sli4_post_hdr_tmplates(emlxs_hba_t *hba, 36 MAILBOXQ *mbq); 37static int emlxs_sli4_post_sgl_pages(emlxs_hba_t *hba, 38 MAILBOXQ *mbq); |
39static int emlxs_fcf_bind(emlxs_hba_t *hba); | |
40 | 39 |
41static int emlxs_fcf_unbind(emlxs_hba_t *hba, uint32_t index); | 40static int emlxs_sli4_read_eq(emlxs_hba_t *hba, EQ_DESC_t *eq); |
42 | 41 |
43static int emlxs_sli4_poll_eq(emlxs_hba_t *hba, EQ_DESC_t *eq); 44 | |
45extern void emlxs_parse_prog_types(emlxs_hba_t *hba, char *types); 46 47extern int32_t emlxs_parse_vpd(emlxs_hba_t *hba, uint8_t *vpd, 48 uint32_t size); 49extern void emlxs_decode_label(char *label, char *buffer, int bige); 50 51extern void emlxs_build_prog_types(emlxs_hba_t *hba, 52 char *prog_types); --- 13 unchanged lines hidden (view full) --- 66static uint32_t emlxs_sli4_hba_reset(emlxs_hba_t *hba, uint32_t restart, 67 uint32_t skip_post, uint32_t quiesce); 68static void emlxs_sli4_hba_kill(emlxs_hba_t *hba); 69 70static uint32_t emlxs_sli4_hba_init(emlxs_hba_t *hba); 71 72static uint32_t emlxs_sli4_bde_setup(emlxs_port_t *port, 73 emlxs_buf_t *sbp); | 42extern void emlxs_parse_prog_types(emlxs_hba_t *hba, char *types); 43 44extern int32_t emlxs_parse_vpd(emlxs_hba_t *hba, uint8_t *vpd, 45 uint32_t size); 46extern void emlxs_decode_label(char *label, char *buffer, int bige); 47 48extern void emlxs_build_prog_types(emlxs_hba_t *hba, 49 char *prog_types); --- 13 unchanged lines hidden (view full) --- 63static uint32_t emlxs_sli4_hba_reset(emlxs_hba_t *hba, uint32_t restart, 64 uint32_t skip_post, uint32_t quiesce); 65static void emlxs_sli4_hba_kill(emlxs_hba_t *hba); 66 67static uint32_t emlxs_sli4_hba_init(emlxs_hba_t *hba); 68 69static uint32_t emlxs_sli4_bde_setup(emlxs_port_t *port, 70 emlxs_buf_t *sbp); |
74static uint32_t emlxs_sli4_fct_bde_setup(emlxs_port_t *port, 75 emlxs_buf_t *sbp); | 71 72 |
76static void emlxs_sli4_issue_iocb_cmd(emlxs_hba_t *hba, | 73static void emlxs_sli4_issue_iocb_cmd(emlxs_hba_t *hba, |
77 CHANNEL *rp, IOCBQ *iocb_cmd); | 74 CHANNEL *cp, IOCBQ *iocb_cmd); |
78static uint32_t emlxs_sli4_issue_mbox_cmd(emlxs_hba_t *hba, 79 MAILBOXQ *mbq, int32_t flg, uint32_t tmo); 80static uint32_t emlxs_sli4_issue_mbox_cmd4quiesce(emlxs_hba_t *hba, 81 MAILBOXQ *mbq, int32_t flg, uint32_t tmo); 82#ifdef SFCT_SUPPORT 83static uint32_t emlxs_sli4_prep_fct_iocb(emlxs_port_t *port, 84 emlxs_buf_t *cmd_sbp, int channel); 85#endif /* SFCT_SUPPORT */ --- 13 unchanged lines hidden (view full) --- 99#ifdef MSI_SUPPORT 100static uint32_t emlxs_sli4_msi_intr(char *arg1, char *arg2); 101#endif /* MSI_SUPPORT */ 102 103static void emlxs_sli4_resource_free(emlxs_hba_t *hba); 104 105static int emlxs_sli4_resource_alloc(emlxs_hba_t *hba); 106 | 75static uint32_t emlxs_sli4_issue_mbox_cmd(emlxs_hba_t *hba, 76 MAILBOXQ *mbq, int32_t flg, uint32_t tmo); 77static uint32_t emlxs_sli4_issue_mbox_cmd4quiesce(emlxs_hba_t *hba, 78 MAILBOXQ *mbq, int32_t flg, uint32_t tmo); 79#ifdef SFCT_SUPPORT 80static uint32_t emlxs_sli4_prep_fct_iocb(emlxs_port_t *port, 81 emlxs_buf_t *cmd_sbp, int channel); 82#endif /* SFCT_SUPPORT */ --- 13 unchanged lines hidden (view full) --- 96#ifdef MSI_SUPPORT 97static uint32_t emlxs_sli4_msi_intr(char *arg1, char *arg2); 98#endif /* MSI_SUPPORT */ 99 100static void emlxs_sli4_resource_free(emlxs_hba_t *hba); 101 102static int emlxs_sli4_resource_alloc(emlxs_hba_t *hba); 103 |
107static void emlxs_sli4_destroy_queues(emlxs_hba_t *hba); 108 | |
109static XRIobj_t *emlxs_sli4_alloc_xri(emlxs_hba_t *hba, | 104static XRIobj_t *emlxs_sli4_alloc_xri(emlxs_hba_t *hba, |
110 emlxs_buf_t *sbp, RPIobj_t *rp); 111static void emlxs_sli4_free_vpi(emlxs_hba_t *hba, emlxs_port_t *pp); 112 | 105 emlxs_buf_t *sbp, RPIobj_t *rpip); |
113static void emlxs_sli4_enable_intr(emlxs_hba_t *hba); 114 115static void emlxs_sli4_disable_intr(emlxs_hba_t *hba, uint32_t att); 116 117extern void emlxs_sli4_timer(emlxs_hba_t *hba); 118 119static void emlxs_sli4_timer_check_mbox(emlxs_hba_t *hba); 120 | 106static void emlxs_sli4_enable_intr(emlxs_hba_t *hba); 107 108static void emlxs_sli4_disable_intr(emlxs_hba_t *hba, uint32_t att); 109 110extern void emlxs_sli4_timer(emlxs_hba_t *hba); 111 112static void emlxs_sli4_timer_check_mbox(emlxs_hba_t *hba); 113 |
121extern void emlxs_sli4_poll_erratt(emlxs_hba_t *hba); | 114static void emlxs_sli4_poll_erratt(emlxs_hba_t *hba); |
122 123static XRIobj_t *emlxs_sli4_register_xri(emlxs_hba_t *hba, 124 emlxs_buf_t *sbp, uint16_t xri); 125 | 115 116static XRIobj_t *emlxs_sli4_register_xri(emlxs_hba_t *hba, 117 emlxs_buf_t *sbp, uint16_t xri); 118 |
126static XRIobj_t *emlxs_sli4_reserve_xri(emlxs_hba_t *hba, RPIobj_t *rp); 127 | 119static XRIobj_t *emlxs_sli4_reserve_xri(emlxs_hba_t *hba, 120 RPIobj_t *rpip); |
128static int emlxs_check_hdw_ready(emlxs_hba_t *); 129 | 121static int emlxs_check_hdw_ready(emlxs_hba_t *); 122 |
123 |
|
130/* Define SLI4 API functions */ 131emlxs_sli_api_t emlxs_sli4_api = { 132 emlxs_sli4_map_hdw, 133 emlxs_sli4_unmap_hdw, 134 emlxs_sli4_online, 135 emlxs_sli4_offline, 136 emlxs_sli4_hba_reset, 137 emlxs_sli4_hba_kill, --- 40 unchanged lines hidden (view full) --- 178 uint8_t *vpd_data; 179 uint32_t sli_mode; 180 uint8_t *outptr; 181 uint32_t status; 182 uint32_t fw_check; 183 uint32_t kern_update = 0; 184 emlxs_firmware_t hba_fw; 185 emlxs_firmware_t *fw; | 124/* Define SLI4 API functions */ 125emlxs_sli_api_t emlxs_sli4_api = { 126 emlxs_sli4_map_hdw, 127 emlxs_sli4_unmap_hdw, 128 emlxs_sli4_online, 129 emlxs_sli4_offline, 130 emlxs_sli4_hba_reset, 131 emlxs_sli4_hba_kill, --- 40 unchanged lines hidden (view full) --- 172 uint8_t *vpd_data; 173 uint32_t sli_mode; 174 uint8_t *outptr; 175 uint32_t status; 176 uint32_t fw_check; 177 uint32_t kern_update = 0; 178 emlxs_firmware_t hba_fw; 179 emlxs_firmware_t *fw; |
180 uint16_t ssvid; |
|
186 187 cfg = &CFG; 188 vpd = &VPD; 189 190 sli_mode = EMLXS_HBA_SLI4_MODE; 191 hba->sli_mode = sli_mode; 192 193 /* Set the fw_check flag */ --- 124 unchanged lines hidden (view full) --- 318 "Unable to read rev. Mailbox cmd=%x status=%x", 319 mb->mbxCommand, mb->mbxStatus); 320 321 rval = EIO; 322 goto failed1; 323 324 } 325 | 181 182 cfg = &CFG; 183 vpd = &VPD; 184 185 sli_mode = EMLXS_HBA_SLI4_MODE; 186 hba->sli_mode = sli_mode; 187 188 /* Set the fw_check flag */ --- 124 unchanged lines hidden (view full) --- 313 "Unable to read rev. Mailbox cmd=%x status=%x", 314 mb->mbxCommand, mb->mbxStatus); 315 316 rval = EIO; 317 goto failed1; 318 319 } 320 |
326emlxs_data_dump(hba, "RD_REV", (uint32_t *)mb, 18, 0); | 321emlxs_data_dump(port, "RD_REV", (uint32_t *)mb, 18, 0); |
327 if (mb->un.varRdRev4.sliLevel != 4) { 328 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_init_failed_msg, 329 "Invalid read rev Version for SLI4: 0x%x", 330 mb->un.varRdRev4.sliLevel); 331 332 rval = EIO; 333 goto failed1; 334 } --- 34 unchanged lines hidden (view full) --- 369 vpd->feaLevelHigh = mb->un.varRdRev4.feaLevelHigh; 370 vpd->feaLevelLow = mb->un.varRdRev4.feaLevelLow; 371 372 /* Decode FW labels */ 373 emlxs_decode_label(vpd->sli4FwName, vpd->sli4FwName, 0); 374 emlxs_decode_label(vpd->opFwName, vpd->opFwName, 0); 375 emlxs_decode_label(vpd->postKernName, vpd->postKernName, 0); 376 | 322 if (mb->un.varRdRev4.sliLevel != 4) { 323 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_init_failed_msg, 324 "Invalid read rev Version for SLI4: 0x%x", 325 mb->un.varRdRev4.sliLevel); 326 327 rval = EIO; 328 goto failed1; 329 } --- 34 unchanged lines hidden (view full) --- 364 vpd->feaLevelHigh = mb->un.varRdRev4.feaLevelHigh; 365 vpd->feaLevelLow = mb->un.varRdRev4.feaLevelLow; 366 367 /* Decode FW labels */ 368 emlxs_decode_label(vpd->sli4FwName, vpd->sli4FwName, 0); 369 emlxs_decode_label(vpd->opFwName, vpd->opFwName, 0); 370 emlxs_decode_label(vpd->postKernName, vpd->postKernName, 0); 371 |
377 if (hba->model_info.chip == EMLXS_BE_CHIP) { | 372 if (hba->model_info.chip == EMLXS_BE2_CHIP) { |
378 (void) strcpy(vpd->sli4FwLabel, "be2.ufi"); | 373 (void) strcpy(vpd->sli4FwLabel, "be2.ufi"); |
374 } else if (hba->model_info.chip == EMLXS_BE3_CHIP) { 375 (void) strcpy(vpd->sli4FwLabel, "be3.ufi"); |
|
379 } else { 380 (void) strcpy(vpd->sli4FwLabel, "sli4.fw"); 381 } 382 383 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_adapter_trans_msg, 384 "VPD ULP:%08x %s ARM:%08x %s f:%d %d %d %d : dcbx %d", 385 vpd->opFwRev, vpd->opFwName, vpd->postKernRev, vpd->postKernName, 386 vpd->fcphHigh, vpd->fcphLow, vpd->feaLevelHigh, vpd->feaLevelLow, --- 87 unchanged lines hidden (view full) --- 474 bcopy(&emlxs_pci_model[i], 475 &hba->model_info, 476 sizeof (emlxs_model_t)); 477 break; 478 } 479 } 480 } 481 | 376 } else { 377 (void) strcpy(vpd->sli4FwLabel, "sli4.fw"); 378 } 379 380 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_adapter_trans_msg, 381 "VPD ULP:%08x %s ARM:%08x %s f:%d %d %d %d : dcbx %d", 382 vpd->opFwRev, vpd->opFwName, vpd->postKernRev, vpd->postKernName, 383 vpd->fcphHigh, vpd->fcphLow, vpd->feaLevelHigh, vpd->feaLevelLow, --- 87 unchanged lines hidden (view full) --- 471 bcopy(&emlxs_pci_model[i], 472 &hba->model_info, 473 sizeof (emlxs_model_t)); 474 break; 475 } 476 } 477 } 478 |
479 /* HP CNA port indices start at 1 instead of 0 */ 480 if ((hba->model_info.chip == EMLXS_BE2_CHIP) || 481 (hba->model_info.chip == EMLXS_BE3_CHIP)) { 482 483 ssvid = ddi_get16(hba->pci_acc_handle, 484 (uint16_t *)(hba->pci_addr + PCI_SSVID_REGISTER)); 485 486 if ((ssvid == PCI_SSVID_HP) && (vpd->port_index > 0)) { 487 vpd->port_index--; 488 } 489 } 490 |
|
482 /* 483 * Now lets update hba->model_info with the real 484 * VPD data, if any. 485 */ 486 487 /* 488 * Replace the default model description with vpd data 489 */ --- 66 unchanged lines hidden (view full) --- 556 557 /* 558 * If the image was found, then verify current firmware 559 * versions of adapter 560 */ 561 if (fw) { 562 563 /* Obtain current firmware version info */ | 491 /* 492 * Now lets update hba->model_info with the real 493 * VPD data, if any. 494 */ 495 496 /* 497 * Replace the default model description with vpd data 498 */ --- 66 unchanged lines hidden (view full) --- 565 566 /* 567 * If the image was found, then verify current firmware 568 * versions of adapter 569 */ 570 if (fw) { 571 572 /* Obtain current firmware version info */ |
564 if (hba->model_info.chip == EMLXS_BE_CHIP) { | 573 if ((hba->model_info.chip == EMLXS_BE2_CHIP) || 574 (hba->model_info.chip == EMLXS_BE3_CHIP)) { |
565 (void) emlxs_sli4_read_fw_version(hba, &hba_fw); 566 } else { 567 hba_fw.kern = vpd->postKernRev; 568 hba_fw.stub = vpd->opFwRev; 569 hba_fw.sli1 = vpd->sli1FwRev; 570 hba_fw.sli2 = vpd->sli2FwRev; 571 hba_fw.sli3 = vpd->sli3FwRev; 572 hba_fw.sli4 = vpd->sli4FwRev; --- 95 unchanged lines hidden (view full) --- 668 if (emlxs_sli4_issue_mbox_cmd(hba, mbq, MBX_WAIT, 0) != MBX_SUCCESS) { 669 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_init_failed_msg, 670 "Unable to REQUEST_FEATURES. Mailbox cmd=%x status=%x", 671 mb->mbxCommand, mb->mbxStatus); 672 673 rval = EIO; 674 goto failed1; 675 } | 575 (void) emlxs_sli4_read_fw_version(hba, &hba_fw); 576 } else { 577 hba_fw.kern = vpd->postKernRev; 578 hba_fw.stub = vpd->opFwRev; 579 hba_fw.sli1 = vpd->sli1FwRev; 580 hba_fw.sli2 = vpd->sli2FwRev; 581 hba_fw.sli3 = vpd->sli3FwRev; 582 hba_fw.sli4 = vpd->sli4FwRev; --- 95 unchanged lines hidden (view full) --- 678 if (emlxs_sli4_issue_mbox_cmd(hba, mbq, MBX_WAIT, 0) != MBX_SUCCESS) { 679 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_init_failed_msg, 680 "Unable to REQUEST_FEATURES. Mailbox cmd=%x status=%x", 681 mb->mbxCommand, mb->mbxStatus); 682 683 rval = EIO; 684 goto failed1; 685 } |
676emlxs_data_dump(hba, "REQ_FEATURE", (uint32_t *)mb, 6, 0); | 686emlxs_data_dump(port, "REQ_FEATURE", (uint32_t *)mb, 6, 0); |
677 678 /* Make sure we get the features we requested */ 679 if (mb->un.varReqFeatures.featuresRequested != 680 mb->un.varReqFeatures.featuresEnabled) { 681 682 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_init_failed_msg, 683 "Unable to get REQUESTed_FEATURES. want:x%x got:x%x", 684 mb->un.varReqFeatures.featuresRequested, --- 19 unchanged lines hidden (view full) --- 704 if (emlxs_sli4_issue_mbox_cmd(hba, mbq, MBX_WAIT, 0) != MBX_SUCCESS) { 705 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_init_failed_msg, 706 "Unable to READ_CONFIG. Mailbox cmd=%x status=%x", 707 mb->mbxCommand, mb->mbxStatus); 708 709 rval = EIO; 710 goto failed1; 711 } | 687 688 /* Make sure we get the features we requested */ 689 if (mb->un.varReqFeatures.featuresRequested != 690 mb->un.varReqFeatures.featuresEnabled) { 691 692 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_init_failed_msg, 693 "Unable to get REQUESTed_FEATURES. want:x%x got:x%x", 694 mb->un.varReqFeatures.featuresRequested, --- 19 unchanged lines hidden (view full) --- 714 if (emlxs_sli4_issue_mbox_cmd(hba, mbq, MBX_WAIT, 0) != MBX_SUCCESS) { 715 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_init_failed_msg, 716 "Unable to READ_CONFIG. Mailbox cmd=%x status=%x", 717 mb->mbxCommand, mb->mbxStatus); 718 719 rval = EIO; 720 goto failed1; 721 } |
712emlxs_data_dump(hba, "READ_CONFIG4", (uint32_t *)mb, 18, 0); | 722emlxs_data_dump(port, "READ_CONFIG4", (uint32_t *)mb, 18, 0); |
713 714 hba->sli.sli4.XRICount = (mb->un.varRdConfig4.XRICount); 715 hba->sli.sli4.XRIBase = (mb->un.varRdConfig4.XRIBase); 716 hba->sli.sli4.RPICount = (mb->un.varRdConfig4.RPICount); 717 hba->sli.sli4.RPIBase = (mb->un.varRdConfig4.RPIBase); 718 hba->sli.sli4.VPICount = (mb->un.varRdConfig4.VPICount); 719 hba->sli.sli4.VPIBase = (mb->un.varRdConfig4.VPIBase); 720 hba->sli.sli4.VFICount = (mb->un.varRdConfig4.VFICount); --- 14 unchanged lines hidden (view full) --- 735 hba->max_nodes = hba->sli.sli4.RPICount; 736 } 737 738 /* Set the io throttle */ 739 hba->io_throttle = hba->sli.sli4.XRICount - IO_THROTTLE_RESERVE; 740 hba->max_iotag = hba->sli.sli4.XRICount; 741 742 /* Save the link speed capabilities */ | 723 724 hba->sli.sli4.XRICount = (mb->un.varRdConfig4.XRICount); 725 hba->sli.sli4.XRIBase = (mb->un.varRdConfig4.XRIBase); 726 hba->sli.sli4.RPICount = (mb->un.varRdConfig4.RPICount); 727 hba->sli.sli4.RPIBase = (mb->un.varRdConfig4.RPIBase); 728 hba->sli.sli4.VPICount = (mb->un.varRdConfig4.VPICount); 729 hba->sli.sli4.VPIBase = (mb->un.varRdConfig4.VPIBase); 730 hba->sli.sli4.VFICount = (mb->un.varRdConfig4.VFICount); --- 14 unchanged lines hidden (view full) --- 745 hba->max_nodes = hba->sli.sli4.RPICount; 746 } 747 748 /* Set the io throttle */ 749 hba->io_throttle = hba->sli.sli4.XRICount - IO_THROTTLE_RESERVE; 750 hba->max_iotag = hba->sli.sli4.XRICount; 751 752 /* Save the link speed capabilities */ |
743 vpd->link_speed = mb->un.varRdConfig4.lmt; | 753 vpd->link_speed = (uint16_t)mb->un.varRdConfig4.lmt; |
744 emlxs_process_link_speed(hba); 745 746 /* 747 * Allocate some memory for buffers 748 */ 749 if (emlxs_mem_alloc_buffer(hba) == 0) { 750 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_init_failed_msg, 751 "Unable to allocate memory buffers."); --- 10 unchanged lines hidden (view full) --- 762 763 if (emlxs_sli4_resource_alloc(hba)) { 764 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_init_failed_msg, 765 "Unable to allocate resources."); 766 767 rval = ENOMEM; 768 goto failed2; 769 } | 754 emlxs_process_link_speed(hba); 755 756 /* 757 * Allocate some memory for buffers 758 */ 759 if (emlxs_mem_alloc_buffer(hba) == 0) { 760 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_init_failed_msg, 761 "Unable to allocate memory buffers."); --- 10 unchanged lines hidden (view full) --- 772 773 if (emlxs_sli4_resource_alloc(hba)) { 774 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_init_failed_msg, 775 "Unable to allocate resources."); 776 777 rval = ENOMEM; 778 goto failed2; 779 } |
770emlxs_data_dump(hba, "XRIp", (uint32_t *)hba->sli.sli4.XRIp, 18, 0); | 780emlxs_data_dump(port, "XRIp", (uint32_t *)hba->sli.sli4.XRIp, 18, 0); |
771 772#if (EMLXS_MODREV >= EMLXS_MODREV5) 773 if ((cfg[CFG_NPIV_ENABLE].current) && (hba->flag & FC_NPIV_ENABLED)) { 774 hba->fca_tran->fca_num_npivports = hba->vpi_max; 775 } 776#endif /* >= EMLXS_MODREV5 */ 777 778 /* Reuse mbq from previous mbox */ --- 53 unchanged lines hidden (view full) --- 832 833 /* Reuse mbq from previous mbox */ 834 bzero(mbq, sizeof (MAILBOXQ)); 835 836 /* 837 * We need to get login parameters for NID 838 */ 839 (void) emlxs_mb_read_sparam(hba, mbq); | 781 782#if (EMLXS_MODREV >= EMLXS_MODREV5) 783 if ((cfg[CFG_NPIV_ENABLE].current) && (hba->flag & FC_NPIV_ENABLED)) { 784 hba->fca_tran->fca_num_npivports = hba->vpi_max; 785 } 786#endif /* >= EMLXS_MODREV5 */ 787 788 /* Reuse mbq from previous mbox */ --- 53 unchanged lines hidden (view full) --- 842 843 /* Reuse mbq from previous mbox */ 844 bzero(mbq, sizeof (MAILBOXQ)); 845 846 /* 847 * We need to get login parameters for NID 848 */ 849 (void) emlxs_mb_read_sparam(hba, mbq); |
840 mp = (MATCHMAP *)(mbq->bp); | 850 mp = (MATCHMAP *)mbq->bp; |
841 if (emlxs_sli4_issue_mbox_cmd(hba, mbq, MBX_WAIT, 0) != MBX_SUCCESS) { 842 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_init_failed_msg, 843 "Unable to read parameters. Mailbox cmd=%x status=%x", 844 mb->mbxCommand, mb->mbxStatus); 845 846 rval = EIO; 847 goto failed3; 848 } 849 850 /* Free the buffer since we were polling */ | 851 if (emlxs_sli4_issue_mbox_cmd(hba, mbq, MBX_WAIT, 0) != MBX_SUCCESS) { 852 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_init_failed_msg, 853 "Unable to read parameters. Mailbox cmd=%x status=%x", 854 mb->mbxCommand, mb->mbxStatus); 855 856 rval = EIO; 857 goto failed3; 858 } 859 860 /* Free the buffer since we were polling */ |
851 (void) emlxs_mem_put(hba, MEM_BUF, (uint8_t *)mp); | 861 emlxs_mem_put(hba, MEM_BUF, (void *)mp); |
852 mp = NULL; 853 854 /* If no serial number in VPD data, then use the WWPN */ 855 if (vpd->serial_num[0] == 0) { 856 outptr = (uint8_t *)&hba->wwpn.IEEE[0]; 857 for (i = 0; i < 12; i++) { 858 status = *outptr++; 859 j = ((status & 0xf0) >> 4); --- 22 unchanged lines hidden (view full) --- 882 * must equal zero. This effects the hba_fru_details structure 883 * in fca_bind_port() 884 */ 885 vpd->port_num[0] = 0; 886 vpd->port_index = 0; 887 } 888 889 /* Make attempt to set a port index */ | 862 mp = NULL; 863 864 /* If no serial number in VPD data, then use the WWPN */ 865 if (vpd->serial_num[0] == 0) { 866 outptr = (uint8_t *)&hba->wwpn.IEEE[0]; 867 for (i = 0; i < 12; i++) { 868 status = *outptr++; 869 j = ((status & 0xf0) >> 4); --- 22 unchanged lines hidden (view full) --- 892 * must equal zero. This effects the hba_fru_details structure 893 * in fca_bind_port() 894 */ 895 vpd->port_num[0] = 0; 896 vpd->port_index = 0; 897 } 898 899 /* Make attempt to set a port index */ |
890 if (vpd->port_index == -1) { | 900 if (vpd->port_index == (uint32_t)-1) { |
891 dev_info_t *p_dip; 892 dev_info_t *c_dip; 893 894 p_dip = ddi_get_parent(hba->dip); 895 c_dip = ddi_get_child(p_dip); 896 897 vpd->port_index = 0; 898 while (c_dip && (hba->dip != c_dip)) { --- 63 unchanged lines hidden (view full) --- 962 */ 963 if (cfg[CFG_PERSIST_LINKDOWN].current == 0) { 964 emlxs_mb_init_link(hba, mbq, 965 cfg[CFG_TOPOLOGY].current, cfg[CFG_LINK_SPEED].current); 966 967 if (emlxs_sli4_issue_mbox_cmd(hba, mbq, MBX_WAIT, 0) 968 != MBX_SUCCESS) { 969 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_init_failed_msg, | 901 dev_info_t *p_dip; 902 dev_info_t *c_dip; 903 904 p_dip = ddi_get_parent(hba->dip); 905 c_dip = ddi_get_child(p_dip); 906 907 vpd->port_index = 0; 908 while (c_dip && (hba->dip != c_dip)) { --- 63 unchanged lines hidden (view full) --- 972 */ 973 if (cfg[CFG_PERSIST_LINKDOWN].current == 0) { 974 emlxs_mb_init_link(hba, mbq, 975 cfg[CFG_TOPOLOGY].current, cfg[CFG_LINK_SPEED].current); 976 977 if (emlxs_sli4_issue_mbox_cmd(hba, mbq, MBX_WAIT, 0) 978 != MBX_SUCCESS) { 979 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_init_failed_msg, |
970 "Unable to initialize link. " \ | 980 "Unable to initialize link. " |
971 "Mailbox cmd=%x status=%x", 972 mb->mbxCommand, mb->mbxStatus); 973 974 rval = EIO; 975 goto failed3; 976 } 977 978 /* Wait for link to come up */ --- 8 unchanged lines hidden (view full) --- 987 988 rval = EIO; 989 goto failed3; 990 } 991 992 DELAYMS(1000); 993 i--; 994 } | 981 "Mailbox cmd=%x status=%x", 982 mb->mbxCommand, mb->mbxStatus); 983 984 rval = EIO; 985 goto failed3; 986 } 987 988 /* Wait for link to come up */ --- 8 unchanged lines hidden (view full) --- 997 998 rval = EIO; 999 goto failed3; 1000 } 1001 1002 DELAYMS(1000); 1003 i--; 1004 } |
1005 } else { 1006 EMLXS_STATE_CHANGE(hba, FC_LINK_DOWN_PERSIST); |
|
995 } 996 997 /* 998 * The leadvile driver will now handle the FLOGI at the driver level 999 */ 1000 1001 if (mbq) { 1002 (void) kmem_free((uint8_t *)mbq, sizeof (MAILBOXQ)); 1003 mbq = NULL; 1004 mb = NULL; 1005 } 1006 return (0); 1007 1008failed3: 1009 EMLXS_STATE_CHANGE(hba, FC_ERROR); 1010 1011 if (mp) { | 1007 } 1008 1009 /* 1010 * The leadvile driver will now handle the FLOGI at the driver level 1011 */ 1012 1013 if (mbq) { 1014 (void) kmem_free((uint8_t *)mbq, sizeof (MAILBOXQ)); 1015 mbq = NULL; 1016 mb = NULL; 1017 } 1018 return (0); 1019 1020failed3: 1021 EMLXS_STATE_CHANGE(hba, FC_ERROR); 1022 1023 if (mp) { |
1012 (void) emlxs_mem_put(hba, MEM_BUF, (uint8_t *)mp); | 1024 emlxs_mem_put(hba, MEM_BUF, (void *)mp); |
1013 mp = NULL; 1014 } 1015 1016 1017 if (hba->intr_flags & EMLXS_MSI_ADDED) { 1018 (void) EMLXS_INTR_REMOVE(hba); 1019 } 1020 --- 120 unchanged lines hidden (view full) --- 1141 buf_info->align = ddi_ptob(dip, 1L); 1142 1143 (void) emlxs_mem_alloc(hba, buf_info); 1144 1145 if (buf_info->virt == NULL) { 1146 goto failed; 1147 } 1148 | 1025 mp = NULL; 1026 } 1027 1028 1029 if (hba->intr_flags & EMLXS_MSI_ADDED) { 1030 (void) EMLXS_INTR_REMOVE(hba); 1031 } 1032 --- 120 unchanged lines hidden (view full) --- 1153 buf_info->align = ddi_ptob(dip, 1L); 1154 1155 (void) emlxs_mem_alloc(hba, buf_info); 1156 1157 if (buf_info->virt == NULL) { 1158 goto failed; 1159 } 1160 |
1149 hba->sli.sli4.bootstrapmb.virt = (uint8_t *)buf_info->virt; | 1161 hba->sli.sli4.bootstrapmb.virt = buf_info->virt; |
1150 hba->sli.sli4.bootstrapmb.phys = buf_info->phys; 1151 hba->sli.sli4.bootstrapmb.size = EMLXS_BOOTSTRAP_MB_SIZE + 1152 MBOX_EXTENSION_SIZE; 1153 hba->sli.sli4.bootstrapmb.data_handle = buf_info->data_handle; 1154 hba->sli.sli4.bootstrapmb.dma_handle = buf_info->dma_handle; 1155 bzero((char *)hba->sli.sli4.bootstrapmb.virt, 1156 EMLXS_BOOTSTRAP_MB_SIZE); 1157 } --- 51 unchanged lines hidden (view full) --- 1209 buf_info->phys = hba->sli.sli4.bootstrapmb.phys; 1210 buf_info->data_handle = 1211 hba->sli.sli4.bootstrapmb.data_handle; 1212 buf_info->dma_handle = 1213 hba->sli.sli4.bootstrapmb.dma_handle; 1214 buf_info->flags = FC_MBUF_DMA; 1215 } 1216 | 1162 hba->sli.sli4.bootstrapmb.phys = buf_info->phys; 1163 hba->sli.sli4.bootstrapmb.size = EMLXS_BOOTSTRAP_MB_SIZE + 1164 MBOX_EXTENSION_SIZE; 1165 hba->sli.sli4.bootstrapmb.data_handle = buf_info->data_handle; 1166 hba->sli.sli4.bootstrapmb.dma_handle = buf_info->dma_handle; 1167 bzero((char *)hba->sli.sli4.bootstrapmb.virt, 1168 EMLXS_BOOTSTRAP_MB_SIZE); 1169 } --- 51 unchanged lines hidden (view full) --- 1221 buf_info->phys = hba->sli.sli4.bootstrapmb.phys; 1222 buf_info->data_handle = 1223 hba->sli.sli4.bootstrapmb.data_handle; 1224 buf_info->dma_handle = 1225 hba->sli.sli4.bootstrapmb.dma_handle; 1226 buf_info->flags = FC_MBUF_DMA; 1227 } 1228 |
1217 buf_info->virt = (uint32_t *)hba->sli.sli4.bootstrapmb.virt; | 1229 buf_info->virt = hba->sli.sli4.bootstrapmb.virt; |
1218 buf_info->size = hba->sli.sli4.bootstrapmb.size; 1219 emlxs_mem_free(hba, buf_info); 1220 | 1230 buf_info->size = hba->sli.sli4.bootstrapmb.size; 1231 emlxs_mem_free(hba, buf_info); 1232 |
1221 hba->sli.sli4.bootstrapmb.virt = 0; | 1233 hba->sli.sli4.bootstrapmb.virt = NULL; |
1222 } 1223 1224 return; 1225 1226} /* emlxs_sli4_unmap_hdw() */ 1227 1228 1229static int --- 169 unchanged lines hidden (view full) --- 1399 /* Special words to initialize bootstrap mbox MUST be little endian */ 1400 iptr = (uint32_t *)hba->sli.sli4.bootstrapmb.virt; 1401 *iptr++ = LE_SWAP32(MQE_SPECIAL_WORD0); 1402 *iptr = LE_SWAP32(MQE_SPECIAL_WORD1); 1403 1404 EMLXS_MPDATA_SYNC(hba->sli.sli4.bootstrapmb.dma_handle, 0, 1405 MAILBOX_CMD_BSIZE, DDI_DMA_SYNC_FORDEV); 1406 | 1234 } 1235 1236 return; 1237 1238} /* emlxs_sli4_unmap_hdw() */ 1239 1240 1241static int --- 169 unchanged lines hidden (view full) --- 1411 /* Special words to initialize bootstrap mbox MUST be little endian */ 1412 iptr = (uint32_t *)hba->sli.sli4.bootstrapmb.virt; 1413 *iptr++ = LE_SWAP32(MQE_SPECIAL_WORD0); 1414 *iptr = LE_SWAP32(MQE_SPECIAL_WORD1); 1415 1416 EMLXS_MPDATA_SYNC(hba->sli.sli4.bootstrapmb.dma_handle, 0, 1417 MAILBOX_CMD_BSIZE, DDI_DMA_SYNC_FORDEV); 1418 |
1407emlxs_data_dump(hba, "EndianIN", (uint32_t *)iptr, 6, 0); | 1419emlxs_data_dump(port, "EndianIN", (uint32_t *)iptr, 6, 0); |
1408 if (!emlxs_issue_bootstrap_mb(hba, tmo)) { 1409 return (1); 1410 } 1411 EMLXS_MPDATA_SYNC(hba->sli.sli4.bootstrapmb.dma_handle, 0, 1412 MAILBOX_CMD_BSIZE, DDI_DMA_SYNC_FORKERNEL); | 1420 if (!emlxs_issue_bootstrap_mb(hba, tmo)) { 1421 return (1); 1422 } 1423 EMLXS_MPDATA_SYNC(hba->sli.sli4.bootstrapmb.dma_handle, 0, 1424 MAILBOX_CMD_BSIZE, DDI_DMA_SYNC_FORKERNEL); |
1413emlxs_data_dump(hba, "EndianOUT", (uint32_t *)iptr, 6, 0); | 1425emlxs_data_dump(port, "EndianOUT", (uint32_t *)iptr, 6, 0); |
1414 1415#ifdef FMA_SUPPORT 1416 if (emlxs_fm_check_dma_handle(hba, hba->sli.sli4.bootstrapmb.dma_handle) 1417 != DDI_FM_OK) { 1418 EMLXS_MSGF(EMLXS_CONTEXT, 1419 &emlxs_invalid_dma_handle_msg, 1420 "emlxs_init_bootstrap_mb: hdl=%p", 1421 hba->sli.sli4.bootstrapmb.dma_handle); --- 5 unchanged lines hidden (view full) --- 1427 1428} /* emlxs_init_bootstrap_mb() */ 1429 1430 1431static uint32_t 1432emlxs_sli4_hba_init(emlxs_hba_t *hba) 1433{ 1434 int rc; | 1426 1427#ifdef FMA_SUPPORT 1428 if (emlxs_fm_check_dma_handle(hba, hba->sli.sli4.bootstrapmb.dma_handle) 1429 != DDI_FM_OK) { 1430 EMLXS_MSGF(EMLXS_CONTEXT, 1431 &emlxs_invalid_dma_handle_msg, 1432 "emlxs_init_bootstrap_mb: hdl=%p", 1433 hba->sli.sli4.bootstrapmb.dma_handle); --- 5 unchanged lines hidden (view full) --- 1439 1440} /* emlxs_init_bootstrap_mb() */ 1441 1442 1443static uint32_t 1444emlxs_sli4_hba_init(emlxs_hba_t *hba) 1445{ 1446 int rc; |
1435 uint32_t i; | 1447 uint16_t i; |
1436 emlxs_port_t *vport; 1437 emlxs_config_t *cfg = &CFG; 1438 CHANNEL *cp; 1439 1440 /* Restart the adapter */ 1441 if (emlxs_sli4_hba_reset(hba, 1, 0, 0)) { 1442 return (1); 1443 } --- 5 unchanged lines hidden (view full) --- 1449 1450 /* Initialize all the port objects */ 1451 hba->vpi_base = 0; 1452 hba->vpi_max = 0; 1453 for (i = 0; i < MAX_VPORTS; i++) { 1454 vport = &VPORT(i); 1455 vport->hba = hba; 1456 vport->vpi = i; | 1448 emlxs_port_t *vport; 1449 emlxs_config_t *cfg = &CFG; 1450 CHANNEL *cp; 1451 1452 /* Restart the adapter */ 1453 if (emlxs_sli4_hba_reset(hba, 1, 0, 0)) { 1454 return (1); 1455 } --- 5 unchanged lines hidden (view full) --- 1461 1462 /* Initialize all the port objects */ 1463 hba->vpi_base = 0; 1464 hba->vpi_max = 0; 1465 for (i = 0; i < MAX_VPORTS; i++) { 1466 vport = &VPORT(i); 1467 vport->hba = hba; 1468 vport->vpi = i; |
1469 1470 vport->VPIobj.index = i; 1471 vport->VPIobj.VPI = i; 1472 vport->VPIobj.port = vport; |
|
1457 } 1458 1459 /* Set the max node count */ 1460 if (hba->max_nodes == 0) { 1461 if (cfg[CFG_NUM_NODES].current > 0) { 1462 hba->max_nodes = cfg[CFG_NUM_NODES].current; 1463 } else { 1464 hba->max_nodes = 4096; --- 27 unchanged lines hidden (view full) --- 1492{ 1493 emlxs_port_t *port = &PPORT; 1494 emlxs_port_t *vport; 1495 CHANNEL *cp; 1496 emlxs_config_t *cfg = &CFG; 1497 MAILBOXQ mboxq; 1498 uint32_t i; 1499 uint32_t rc; | 1473 } 1474 1475 /* Set the max node count */ 1476 if (hba->max_nodes == 0) { 1477 if (cfg[CFG_NUM_NODES].current > 0) { 1478 hba->max_nodes = cfg[CFG_NUM_NODES].current; 1479 } else { 1480 hba->max_nodes = 4096; --- 27 unchanged lines hidden (view full) --- 1508{ 1509 emlxs_port_t *port = &PPORT; 1510 emlxs_port_t *vport; 1511 CHANNEL *cp; 1512 emlxs_config_t *cfg = &CFG; 1513 MAILBOXQ mboxq; 1514 uint32_t i; 1515 uint32_t rc; |
1500 uint32_t channelno; | 1516 uint16_t channelno; |
1501 1502 if (!cfg[CFG_RESET_ENABLE].current) { 1503 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_reset_failed_msg, 1504 "Adapter reset disabled."); 1505 EMLXS_STATE_CHANGE(hba, FC_ERROR); 1506 1507 return (1); 1508 } --- 27 unchanged lines hidden (view full) --- 1536 } else { 1537 if (emlxs_sli4_issue_mbox_cmd4quiesce(hba, &mboxq, 1538 MBX_POLL, 0) != MBX_SUCCESS) { 1539 EMLXS_STATE_CHANGE(hba, FC_ERROR); 1540 /* Log a dump event - not supported */ 1541 return (1); 1542 } 1543 } | 1517 1518 if (!cfg[CFG_RESET_ENABLE].current) { 1519 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_reset_failed_msg, 1520 "Adapter reset disabled."); 1521 EMLXS_STATE_CHANGE(hba, FC_ERROR); 1522 1523 return (1); 1524 } --- 27 unchanged lines hidden (view full) --- 1552 } else { 1553 if (emlxs_sli4_issue_mbox_cmd4quiesce(hba, &mboxq, 1554 MBX_POLL, 0) != MBX_SUCCESS) { 1555 EMLXS_STATE_CHANGE(hba, FC_ERROR); 1556 /* Log a dump event - not supported */ 1557 return (1); 1558 } 1559 } |
1544emlxs_data_dump(hba, "resetPort", (uint32_t *)&mboxq, 12, 0); | 1560emlxs_data_dump(port, "resetPort", (uint32_t *)&mboxq, 12, 0); |
1545 1546 /* Reset the hba structure */ 1547 hba->flag &= FC_RESET_MASK; 1548 1549 for (channelno = 0; channelno < hba->chan_count; channelno++) { 1550 cp = &hba->chan[channelno]; 1551 cp->hba = hba; 1552 cp->channelno = channelno; --- 13 unchanged lines hidden (view full) --- 1566 for (i = 0; i < MAX_VPORTS; i++) { 1567 vport = &VPORT(i); 1568 1569 vport->flag &= EMLXS_PORT_RESET_MASK; 1570 vport->did = 0; 1571 vport->prev_did = 0; 1572 vport->lip_type = 0; 1573 bzero(&vport->fabric_sparam, sizeof (SERV_PARM)); | 1561 1562 /* Reset the hba structure */ 1563 hba->flag &= FC_RESET_MASK; 1564 1565 for (channelno = 0; channelno < hba->chan_count; channelno++) { 1566 cp = &hba->chan[channelno]; 1567 cp->hba = hba; 1568 cp->channelno = channelno; --- 13 unchanged lines hidden (view full) --- 1582 for (i = 0; i < MAX_VPORTS; i++) { 1583 vport = &VPORT(i); 1584 1585 vport->flag &= EMLXS_PORT_RESET_MASK; 1586 vport->did = 0; 1587 vport->prev_did = 0; 1588 vport->lip_type = 0; 1589 bzero(&vport->fabric_sparam, sizeof (SERV_PARM)); |
1590 bzero(&vport->prev_fabric_sparam, sizeof (SERV_PARM)); |
|
1574 1575 bzero((caddr_t)&vport->node_base, sizeof (NODELIST)); 1576 vport->node_base.nlp_Rpi = 0; 1577 vport->node_base.nlp_DID = 0xffffff; 1578 vport->node_base.nlp_list_next = NULL; 1579 vport->node_base.nlp_list_prev = NULL; 1580 vport->node_base.nlp_active = 1; 1581 vport->node_count = 0; --- 85 unchanged lines hidden (view full) --- 1667#endif /* >= EMLXS_MODREV3 */ 1668 1669 stage_sge.offset = 0; 1670 stage_sge.reserved = 0; 1671 stage_sge.last = 0; 1672 cnt = 0; 1673 for (i = 0; i < cookie_cnt && size > 0; i++, cp++) { 1674 | 1591 1592 bzero((caddr_t)&vport->node_base, sizeof (NODELIST)); 1593 vport->node_base.nlp_Rpi = 0; 1594 vport->node_base.nlp_DID = 0xffffff; 1595 vport->node_base.nlp_list_next = NULL; 1596 vport->node_base.nlp_list_prev = NULL; 1597 vport->node_base.nlp_active = 1; 1598 vport->node_count = 0; --- 85 unchanged lines hidden (view full) --- 1684#endif /* >= EMLXS_MODREV3 */ 1685 1686 stage_sge.offset = 0; 1687 stage_sge.reserved = 0; 1688 stage_sge.last = 0; 1689 cnt = 0; 1690 for (i = 0; i < cookie_cnt && size > 0; i++, cp++) { 1691 |
1675 | |
1676 sge_size = cp->dmac_size; 1677 sge_addr = cp->dmac_laddress; 1678 while (sge_size && size) { 1679 if (cnt) { 1680 /* Copy staged SGE before we build next one */ 1681 BE_SWAP32_BCOPY((uint8_t *)&stage_sge, 1682 (uint8_t *)sge, sizeof (ULP_SGE64)); 1683 sge++; --- 5 unchanged lines hidden (view full) --- 1689 PADDR_HI(sge_addr); 1690 stage_sge.addrLow = 1691 PADDR_LO(sge_addr); 1692 stage_sge.length = len; 1693 if (sgl_type == SGL_DATA) { 1694 stage_sge.offset = cnt; 1695 } 1696#ifdef DEBUG_SGE | 1692 sge_size = cp->dmac_size; 1693 sge_addr = cp->dmac_laddress; 1694 while (sge_size && size) { 1695 if (cnt) { 1696 /* Copy staged SGE before we build next one */ 1697 BE_SWAP32_BCOPY((uint8_t *)&stage_sge, 1698 (uint8_t *)sge, sizeof (ULP_SGE64)); 1699 sge++; --- 5 unchanged lines hidden (view full) --- 1705 PADDR_HI(sge_addr); 1706 stage_sge.addrLow = 1707 PADDR_LO(sge_addr); 1708 stage_sge.length = len; 1709 if (sgl_type == SGL_DATA) { 1710 stage_sge.offset = cnt; 1711 } 1712#ifdef DEBUG_SGE |
1697 emlxs_data_dump(hba, "SGE", (uint32_t *)&stage_sge, | 1713 emlxs_data_dump(port, "SGE", (uint32_t *)&stage_sge, |
1698 4, 0); 1699#endif 1700 sge_addr += len; 1701 sge_size -= len; 1702 1703 cnt += len; 1704 size -= len; 1705 } 1706 } 1707 1708 if (last) { 1709 stage_sge.last = 1; 1710 } 1711 BE_SWAP32_BCOPY((uint8_t *)&stage_sge, (uint8_t *)sge, 1712 sizeof (ULP_SGE64)); | 1714 4, 0); 1715#endif 1716 sge_addr += len; 1717 sge_size -= len; 1718 1719 cnt += len; 1720 size -= len; 1721 } 1722 } 1723 1724 if (last) { 1725 stage_sge.last = 1; 1726 } 1727 BE_SWAP32_BCOPY((uint8_t *)&stage_sge, (uint8_t *)sge, 1728 sizeof (ULP_SGE64)); |
1729 |
|
1713 sge++; 1714 1715 *pcnt = cnt; 1716 return (sge); 1717 1718} /* emlxs_pkt_to_sgl */ 1719 1720 1721/*ARGSUSED*/ 1722uint32_t 1723emlxs_sli4_bde_setup(emlxs_port_t *port, emlxs_buf_t *sbp) 1724{ 1725 fc_packet_t *pkt; | 1730 sge++; 1731 1732 *pcnt = cnt; 1733 return (sge); 1734 1735} /* emlxs_pkt_to_sgl */ 1736 1737 1738/*ARGSUSED*/ 1739uint32_t 1740emlxs_sli4_bde_setup(emlxs_port_t *port, emlxs_buf_t *sbp) 1741{ 1742 fc_packet_t *pkt; |
1726 XRIobj_t *xp; | 1743 XRIobj_t *xrip; |
1727 ULP_SGE64 *sge; 1728 emlxs_wqe_t *wqe; 1729 IOCBQ *iocbq; 1730 ddi_dma_cookie_t *cp_cmd; 1731 uint32_t cmd_cnt; 1732 uint32_t resp_cnt; 1733 uint32_t cnt; 1734 1735 iocbq = (IOCBQ *) &sbp->iocbq; 1736 wqe = &iocbq->wqe; 1737 pkt = PRIV2PKT(sbp); | 1744 ULP_SGE64 *sge; 1745 emlxs_wqe_t *wqe; 1746 IOCBQ *iocbq; 1747 ddi_dma_cookie_t *cp_cmd; 1748 uint32_t cmd_cnt; 1749 uint32_t resp_cnt; 1750 uint32_t cnt; 1751 1752 iocbq = (IOCBQ *) &sbp->iocbq; 1753 wqe = &iocbq->wqe; 1754 pkt = PRIV2PKT(sbp); |
1738 xp = sbp->xp; 1739 sge = xp->SGList.virt; | 1755 xrip = sbp->xrip; 1756 sge = xrip->SGList.virt; |
1740 1741#if (EMLXS_MODREV >= EMLXS_MODREV3) 1742 cp_cmd = pkt->pkt_cmd_cookie; 1743#else 1744 cp_cmd = &pkt->pkt_cmd_cookie; 1745#endif /* >= EMLXS_MODREV3 */ 1746 1747 iocbq = &sbp->iocbq; --- 50 unchanged lines hidden (view full) --- 1798 wqe->un.GenReq.Payload.addrLow = 1799 PADDR_LO(cp_cmd->dmac_laddress); 1800 wqe->un.GenReq.Payload.tus.f.bdeSize = cmd_cnt; 1801 } 1802 return (0); 1803} /* emlxs_sli4_bde_setup */ 1804 1805 | 1757 1758#if (EMLXS_MODREV >= EMLXS_MODREV3) 1759 cp_cmd = pkt->pkt_cmd_cookie; 1760#else 1761 cp_cmd = &pkt->pkt_cmd_cookie; 1762#endif /* >= EMLXS_MODREV3 */ 1763 1764 iocbq = &sbp->iocbq; --- 50 unchanged lines hidden (view full) --- 1815 wqe->un.GenReq.Payload.addrLow = 1816 PADDR_LO(cp_cmd->dmac_laddress); 1817 wqe->un.GenReq.Payload.tus.f.bdeSize = cmd_cnt; 1818 } 1819 return (0); 1820} /* emlxs_sli4_bde_setup */ 1821 1822 |
1806/*ARGSUSED*/ 1807static uint32_t 1808emlxs_sli4_fct_bde_setup(emlxs_port_t *port, emlxs_buf_t *sbp) 1809{ 1810 return (0); | |
1811 | 1823 |
1812} /* emlxs_sli4_fct_bde_setup */ | |
1813 | 1824 |
1814 | |
1815static void 1816emlxs_sli4_issue_iocb_cmd(emlxs_hba_t *hba, CHANNEL *cp, IOCBQ *iocbq) 1817{ 1818 emlxs_port_t *port = &PPORT; 1819 emlxs_buf_t *sbp; 1820 uint32_t channelno; 1821 int32_t throttle; 1822 emlxs_wqe_t *wqe; 1823 emlxs_wqe_t *wqeslot; 1824 WQ_DESC_t *wq; 1825 uint32_t flag; 1826 uint32_t wqdb; | 1825static void 1826emlxs_sli4_issue_iocb_cmd(emlxs_hba_t *hba, CHANNEL *cp, IOCBQ *iocbq) 1827{ 1828 emlxs_port_t *port = &PPORT; 1829 emlxs_buf_t *sbp; 1830 uint32_t channelno; 1831 int32_t throttle; 1832 emlxs_wqe_t *wqe; 1833 emlxs_wqe_t *wqeslot; 1834 WQ_DESC_t *wq; 1835 uint32_t flag; 1836 uint32_t wqdb; |
1827 uint32_t next_wqe; | 1837 uint16_t next_wqe; |
1828 off_t offset; 1829 1830 1831 channelno = cp->channelno; 1832 wq = (WQ_DESC_t *)cp->iopath; 1833 1834#ifdef SLI4_FASTPATH_DEBUG 1835 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, --- 8 unchanged lines hidden (view full) --- 1844 if (!(iocbq->flag & IOCB_SPECIAL) || !iocbq->port || 1845 !(((emlxs_port_t *)iocbq->port)->tgt_mode)) { 1846 emlxs_tx_put(iocbq, 1); 1847 return; 1848 } 1849 } 1850 1851 /* Attempt to acquire CMD_RING lock */ | 1838 off_t offset; 1839 1840 1841 channelno = cp->channelno; 1842 wq = (WQ_DESC_t *)cp->iopath; 1843 1844#ifdef SLI4_FASTPATH_DEBUG 1845 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, --- 8 unchanged lines hidden (view full) --- 1854 if (!(iocbq->flag & IOCB_SPECIAL) || !iocbq->port || 1855 !(((emlxs_port_t *)iocbq->port)->tgt_mode)) { 1856 emlxs_tx_put(iocbq, 1); 1857 return; 1858 } 1859 } 1860 1861 /* Attempt to acquire CMD_RING lock */ |
1852 if (mutex_tryenter(&EMLXS_CMD_RING_LOCK(channelno)) == 0) { | 1862 if (mutex_tryenter(&EMLXS_QUE_LOCK(channelno)) == 0) { |
1853 /* Queue it for later */ 1854 if (iocbq) { 1855 if ((hba->io_count - 1856 hba->channel_tx_count) > 10) { 1857 emlxs_tx_put(iocbq, 1); 1858 return; 1859 } else { 1860 | 1863 /* Queue it for later */ 1864 if (iocbq) { 1865 if ((hba->io_count - 1866 hba->channel_tx_count) > 10) { 1867 emlxs_tx_put(iocbq, 1); 1868 return; 1869 } else { 1870 |
1861 mutex_enter(&EMLXS_CMD_RING_LOCK(channelno)); | 1871 mutex_enter(&EMLXS_QUE_LOCK(channelno)); |
1862 } 1863 } else { 1864 return; 1865 } 1866 } | 1872 } 1873 } else { 1874 return; 1875 } 1876 } |
1867 /* CMD_RING_LOCK acquired */ | 1877 /* EMLXS_QUE_LOCK acquired */ |
1868 1869 /* Throttle check only applies to non special iocb */ 1870 if (iocbq && (!(iocbq->flag & IOCB_SPECIAL))) { 1871 /* Check if HBA is full */ 1872 throttle = hba->io_throttle - hba->io_active; 1873 if (throttle <= 0) { 1874 /* Hitting adapter throttle limit */ 1875 /* Queue it for later */ --- 52 unchanged lines hidden (view full) --- 1928 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 1929 "ISSUE QID %d WQE iotag: %x xri: %x", wq->qid, 1930 wqe->RequestTag, wqe->XRITag); 1931#endif 1932 1933 sbp = iocbq->sbp; 1934 if (sbp) { 1935 /* If exchange removed after wqe was prep'ed, drop it */ | 1878 1879 /* Throttle check only applies to non special iocb */ 1880 if (iocbq && (!(iocbq->flag & IOCB_SPECIAL))) { 1881 /* Check if HBA is full */ 1882 throttle = hba->io_throttle - hba->io_active; 1883 if (throttle <= 0) { 1884 /* Hitting adapter throttle limit */ 1885 /* Queue it for later */ --- 52 unchanged lines hidden (view full) --- 1938 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 1939 "ISSUE QID %d WQE iotag: %x xri: %x", wq->qid, 1940 wqe->RequestTag, wqe->XRITag); 1941#endif 1942 1943 sbp = iocbq->sbp; 1944 if (sbp) { 1945 /* If exchange removed after wqe was prep'ed, drop it */ |
1936 if (!(sbp->xp)) { | 1946 if (!(sbp->xrip)) { |
1937 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 1938 "Xmit WQE iotag: %x xri: %x aborted", 1939 wqe->RequestTag, wqe->XRITag); 1940 1941 /* Get next iocb from the tx queue */ 1942 iocbq = emlxs_tx_get(cp, 1); 1943 continue; 1944 } --- 32 unchanged lines hidden (view full) --- 1977 iocbq->node = (void *)&port->node_base; 1978 sbp->node = (void *)&port->node_base; 1979 } 1980 1981 sbp->pkt_flags |= PACKET_IN_CHIPQ; 1982 mutex_exit(&sbp->mtx); 1983 1984 atomic_add_32(&hba->io_active, 1); | 1947 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 1948 "Xmit WQE iotag: %x xri: %x aborted", 1949 wqe->RequestTag, wqe->XRITag); 1950 1951 /* Get next iocb from the tx queue */ 1952 iocbq = emlxs_tx_get(cp, 1); 1953 continue; 1954 } --- 32 unchanged lines hidden (view full) --- 1987 iocbq->node = (void *)&port->node_base; 1988 sbp->node = (void *)&port->node_base; 1989 } 1990 1991 sbp->pkt_flags |= PACKET_IN_CHIPQ; 1992 mutex_exit(&sbp->mtx); 1993 1994 atomic_add_32(&hba->io_active, 1); |
1985 sbp->xp->state |= RESOURCE_XRI_PENDING_IO; | 1995 sbp->xrip->flag |= EMLXS_XRI_PENDING_IO; |
1986 } 1987 1988 1989 /* Free the local iocb if there is no sbp tracking it */ 1990 if (sbp) { 1991#ifdef SFCT_SUPPORT 1992#ifdef FCT_IO_TRACE 1993 if (sbp->fct_cmd) { --- 15 unchanged lines hidden (view full) --- 2009 /* Send the iocb */ 2010 wqeslot = (emlxs_wqe_t *)wq->addr.virt; 2011 wqeslot += wq->host_index; 2012 2013 wqe->CQId = wq->cqid; 2014 BE_SWAP32_BCOPY((uint8_t *)wqe, (uint8_t *)wqeslot, 2015 sizeof (emlxs_wqe_t)); 2016#ifdef DEBUG_WQE | 1996 } 1997 1998 1999 /* Free the local iocb if there is no sbp tracking it */ 2000 if (sbp) { 2001#ifdef SFCT_SUPPORT 2002#ifdef FCT_IO_TRACE 2003 if (sbp->fct_cmd) { --- 15 unchanged lines hidden (view full) --- 2019 /* Send the iocb */ 2020 wqeslot = (emlxs_wqe_t *)wq->addr.virt; 2021 wqeslot += wq->host_index; 2022 2023 wqe->CQId = wq->cqid; 2024 BE_SWAP32_BCOPY((uint8_t *)wqe, (uint8_t *)wqeslot, 2025 sizeof (emlxs_wqe_t)); 2026#ifdef DEBUG_WQE |
2017 emlxs_data_dump(hba, "WQE", (uint32_t *)wqe, 18, 0); | 2027 emlxs_data_dump(port, "WQE", (uint32_t *)wqe, 18, 0); |
2018#endif 2019 offset = (off_t)((uint64_t)((unsigned long) 2020 wq->addr.virt) - 2021 (uint64_t)((unsigned long) 2022 hba->sli.sli4.slim2.virt)); 2023 2024 EMLXS_MPDATA_SYNC(wq->addr.dma_handle, offset, 2025 4096, DDI_DMA_SYNC_FORDEV); --- 12 unchanged lines hidden (view full) --- 2038#endif 2039 2040 /* 2041 * After this, the sbp / iocb / wqe should not be 2042 * accessed in the xmit path. 2043 */ 2044 2045 if (!sbp) { | 2028#endif 2029 offset = (off_t)((uint64_t)((unsigned long) 2030 wq->addr.virt) - 2031 (uint64_t)((unsigned long) 2032 hba->sli.sli4.slim2.virt)); 2033 2034 EMLXS_MPDATA_SYNC(wq->addr.dma_handle, offset, 2035 4096, DDI_DMA_SYNC_FORDEV); --- 12 unchanged lines hidden (view full) --- 2048#endif 2049 2050 /* 2051 * After this, the sbp / iocb / wqe should not be 2052 * accessed in the xmit path. 2053 */ 2054 2055 if (!sbp) { |
2046 (void) emlxs_mem_put(hba, MEM_IOCB, (uint8_t *)iocbq); | 2056 emlxs_mem_put(hba, MEM_IOCB, (void *)iocbq); |
2047 } 2048 2049 if (iocbq && (!(flag & IOCB_SPECIAL))) { 2050 /* Check if HBA is full */ 2051 throttle = hba->io_throttle - hba->io_active; 2052 if (throttle <= 0) { 2053 goto busy; 2054 } --- 10 unchanged lines hidden (view full) --- 2065 goto busy; 2066 } 2067 2068 2069 /* Get the next iocb from the tx queue if there is one */ 2070 iocbq = emlxs_tx_get(cp, 1); 2071 } 2072 | 2057 } 2058 2059 if (iocbq && (!(flag & IOCB_SPECIAL))) { 2060 /* Check if HBA is full */ 2061 throttle = hba->io_throttle - hba->io_active; 2062 if (throttle <= 0) { 2063 goto busy; 2064 } --- 10 unchanged lines hidden (view full) --- 2075 goto busy; 2076 } 2077 2078 2079 /* Get the next iocb from the tx queue if there is one */ 2080 iocbq = emlxs_tx_get(cp, 1); 2081 } 2082 |
2073 mutex_exit(&EMLXS_CMD_RING_LOCK(channelno)); | 2083 mutex_exit(&EMLXS_QUE_LOCK(channelno)); |
2074 2075 return; 2076 2077busy: 2078 if (throttle <= 0) { 2079 HBASTATS.IocbThrottled++; 2080 } else { 2081 HBASTATS.IocbRingFull[channelno]++; 2082 } 2083 | 2084 2085 return; 2086 2087busy: 2088 if (throttle <= 0) { 2089 HBASTATS.IocbThrottled++; 2090 } else { 2091 HBASTATS.IocbRingFull[channelno]++; 2092 } 2093 |
2084 mutex_exit(&EMLXS_CMD_RING_LOCK(channelno)); | 2094 mutex_exit(&EMLXS_QUE_LOCK(channelno)); |
2085 2086 return; 2087 2088} /* emlxs_sli4_issue_iocb_cmd() */ 2089 2090 2091/*ARGSUSED*/ 2092static uint32_t | 2095 2096 return; 2097 2098} /* emlxs_sli4_issue_iocb_cmd() */ 2099 2100 2101/*ARGSUSED*/ 2102static uint32_t |
2093emlxs_sli4_issue_mq(emlxs_hba_t *hba, MAILBOX4 *mqe, MAILBOX *mb, uint32_t tmo) | 2103emlxs_sli4_issue_mq(emlxs_port_t *port, MAILBOX4 *mqe, MAILBOX *mb, 2104 uint32_t tmo) |
2094{ | 2105{ |
2095 emlxs_port_t *port = &PPORT; | 2106 emlxs_hba_t *hba = HBA; |
2096 MAILBOXQ *mbq; 2097 MAILBOX4 *mb4; 2098 MATCHMAP *mp; 2099 uint32_t *iptr; 2100 uint32_t mqdb; 2101 off_t offset; 2102 2103 mbq = (MAILBOXQ *)mb; 2104 mb4 = (MAILBOX4 *)mb; 2105 mp = (MATCHMAP *) mbq->nonembed; | 2107 MAILBOXQ *mbq; 2108 MAILBOX4 *mb4; 2109 MATCHMAP *mp; 2110 uint32_t *iptr; 2111 uint32_t mqdb; 2112 off_t offset; 2113 2114 mbq = (MAILBOXQ *)mb; 2115 mb4 = (MAILBOX4 *)mb; 2116 mp = (MATCHMAP *) mbq->nonembed; |
2106 hba->mbox_mqe = (uint32_t *)mqe; | 2117 hba->mbox_mqe = (void *)mqe; |
2107 2108 if ((mb->mbxCommand != MBX_SLI_CONFIG) || 2109 (mb4->un.varSLIConfig.be.embedded)) { 2110 /* 2111 * If this is an embedded mbox, everything should fit 2112 * into the mailbox area. 2113 */ 2114 BE_SWAP32_BCOPY((uint8_t *)mb, (uint8_t *)mqe, 2115 MAILBOX_CMD_SLI4_BSIZE); 2116 2117 EMLXS_MPDATA_SYNC(hba->sli.sli4.mq.addr.dma_handle, 0, 2118 4096, DDI_DMA_SYNC_FORDEV); 2119 | 2118 2119 if ((mb->mbxCommand != MBX_SLI_CONFIG) || 2120 (mb4->un.varSLIConfig.be.embedded)) { 2121 /* 2122 * If this is an embedded mbox, everything should fit 2123 * into the mailbox area. 2124 */ 2125 BE_SWAP32_BCOPY((uint8_t *)mb, (uint8_t *)mqe, 2126 MAILBOX_CMD_SLI4_BSIZE); 2127 2128 EMLXS_MPDATA_SYNC(hba->sli.sli4.mq.addr.dma_handle, 0, 2129 4096, DDI_DMA_SYNC_FORDEV); 2130 |
2120 emlxs_data_dump(hba, "MBOX CMD", (uint32_t *)mqe, 18, 0); | 2131 if (mb->mbxCommand != MBX_HEARTBEAT) { 2132 emlxs_data_dump(port, "MBOX CMD", (uint32_t *)mqe, 2133 18, 0); 2134 } |
2121 } else { 2122 /* SLI_CONFIG and non-embedded */ 2123 2124 /* 2125 * If this is not embedded, the MQ area 2126 * MUST contain a SGE pointer to a larger area for the 2127 * non-embedded mailbox command. 2128 * mp will point to the actual mailbox command which --- 17 unchanged lines hidden (view full) --- 2146 offset = (off_t)((uint64_t)((unsigned long) 2147 hba->sli.sli4.mq.addr.virt) - 2148 (uint64_t)((unsigned long) 2149 hba->sli.sli4.slim2.virt)); 2150 2151 EMLXS_MPDATA_SYNC(hba->sli.sli4.mq.addr.dma_handle, offset, 2152 4096, DDI_DMA_SYNC_FORDEV); 2153 | 2135 } else { 2136 /* SLI_CONFIG and non-embedded */ 2137 2138 /* 2139 * If this is not embedded, the MQ area 2140 * MUST contain a SGE pointer to a larger area for the 2141 * non-embedded mailbox command. 2142 * mp will point to the actual mailbox command which --- 17 unchanged lines hidden (view full) --- 2160 offset = (off_t)((uint64_t)((unsigned long) 2161 hba->sli.sli4.mq.addr.virt) - 2162 (uint64_t)((unsigned long) 2163 hba->sli.sli4.slim2.virt)); 2164 2165 EMLXS_MPDATA_SYNC(hba->sli.sli4.mq.addr.dma_handle, offset, 2166 4096, DDI_DMA_SYNC_FORDEV); 2167 |
2154 emlxs_data_dump(hba, "MBOX EXT", (uint32_t *)mqe, 12, 0); | 2168 emlxs_data_dump(port, "MBOX EXT", (uint32_t *)mqe, 12, 0); |
2155 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_mbox_detail_msg, 2156 "Extension Addr %p %p", mp->phys, (uint32_t *)(mp->virt)); | 2169 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_mbox_detail_msg, 2170 "Extension Addr %p %p", mp->phys, (uint32_t *)(mp->virt)); |
2157 emlxs_data_dump(hba, "EXT AREA", (uint32_t *)mp->virt, 24, 0); | 2171 emlxs_data_dump(port, "EXT AREA", (uint32_t *)mp->virt, 24, 0); |
2158 } 2159 2160 /* Ring the MQ Doorbell */ 2161 mqdb = hba->sli.sli4.mq.qid; 2162 mqdb |= ((1 << MQ_DB_POP_SHIFT) & MQ_DB_POP_MASK); 2163 | 2172 } 2173 2174 /* Ring the MQ Doorbell */ 2175 mqdb = hba->sli.sli4.mq.qid; 2176 mqdb |= ((1 << MQ_DB_POP_SHIFT) & MQ_DB_POP_MASK); 2177 |
2164 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 2165 "MQ RING: %08x", mqdb); | 2178 if (mb->mbxCommand != MBX_HEARTBEAT) { 2179 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 2180 "MQ RING: %08x", mqdb); 2181 } |
2166 2167 WRITE_BAR2_REG(hba, FC_MQDB_REG(hba), mqdb); 2168 return (MBX_SUCCESS); 2169 2170} /* emlxs_sli4_issue_mq() */ 2171 2172 2173/*ARGSUSED*/ --- 5 unchanged lines hidden (view full) --- 2179 MAILBOX4 *mb4; 2180 MATCHMAP *mp = NULL; 2181 uint32_t *iptr; 2182 int nonembed = 0; 2183 2184 mbq = (MAILBOXQ *)mb; 2185 mb4 = (MAILBOX4 *)mb; 2186 mp = (MATCHMAP *) mbq->nonembed; | 2182 2183 WRITE_BAR2_REG(hba, FC_MQDB_REG(hba), mqdb); 2184 return (MBX_SUCCESS); 2185 2186} /* emlxs_sli4_issue_mq() */ 2187 2188 2189/*ARGSUSED*/ --- 5 unchanged lines hidden (view full) --- 2195 MAILBOX4 *mb4; 2196 MATCHMAP *mp = NULL; 2197 uint32_t *iptr; 2198 int nonembed = 0; 2199 2200 mbq = (MAILBOXQ *)mb; 2201 mb4 = (MAILBOX4 *)mb; 2202 mp = (MATCHMAP *) mbq->nonembed; |
2187 hba->mbox_mqe = (uint32_t *)hba->sli.sli4.bootstrapmb.virt; | 2203 hba->mbox_mqe = hba->sli.sli4.bootstrapmb.virt; |
2188 2189 if ((mb->mbxCommand != MBX_SLI_CONFIG) || 2190 (mb4->un.varSLIConfig.be.embedded)) { 2191 /* 2192 * If this is an embedded mbox, everything should fit 2193 * into the bootstrap mailbox area. 2194 */ 2195 iptr = (uint32_t *)hba->sli.sli4.bootstrapmb.virt; 2196 BE_SWAP32_BCOPY((uint8_t *)mb, (uint8_t *)iptr, 2197 MAILBOX_CMD_SLI4_BSIZE); 2198 2199 EMLXS_MPDATA_SYNC(hba->sli.sli4.bootstrapmb.dma_handle, 0, 2200 MAILBOX_CMD_SLI4_BSIZE, DDI_DMA_SYNC_FORDEV); | 2204 2205 if ((mb->mbxCommand != MBX_SLI_CONFIG) || 2206 (mb4->un.varSLIConfig.be.embedded)) { 2207 /* 2208 * If this is an embedded mbox, everything should fit 2209 * into the bootstrap mailbox area. 2210 */ 2211 iptr = (uint32_t *)hba->sli.sli4.bootstrapmb.virt; 2212 BE_SWAP32_BCOPY((uint8_t *)mb, (uint8_t *)iptr, 2213 MAILBOX_CMD_SLI4_BSIZE); 2214 2215 EMLXS_MPDATA_SYNC(hba->sli.sli4.bootstrapmb.dma_handle, 0, 2216 MAILBOX_CMD_SLI4_BSIZE, DDI_DMA_SYNC_FORDEV); |
2201 emlxs_data_dump(hba, "MBOX CMD", iptr, 18, 0); | 2217 emlxs_data_dump(port, "MBOX CMD", iptr, 18, 0); |
2202 } else { 2203 /* 2204 * If this is not embedded, the bootstrap mailbox area 2205 * MUST contain a SGE pointer to a larger area for the 2206 * non-embedded mailbox command. 2207 * mp will point to the actual mailbox command which 2208 * should be copied into the non-embedded area. 2209 */ --- 13 unchanged lines hidden (view full) --- 2223 iptr = (uint32_t *)hba->sli.sli4.bootstrapmb.virt; 2224 BE_SWAP32_BCOPY((uint8_t *)mb, (uint8_t *)iptr, 2225 MAILBOX_CMD_SLI4_BSIZE); 2226 2227 EMLXS_MPDATA_SYNC(hba->sli.sli4.bootstrapmb.dma_handle, 0, 2228 EMLXS_BOOTSTRAP_MB_SIZE + MBOX_EXTENSION_SIZE, 2229 DDI_DMA_SYNC_FORDEV); 2230 | 2218 } else { 2219 /* 2220 * If this is not embedded, the bootstrap mailbox area 2221 * MUST contain a SGE pointer to a larger area for the 2222 * non-embedded mailbox command. 2223 * mp will point to the actual mailbox command which 2224 * should be copied into the non-embedded area. 2225 */ --- 13 unchanged lines hidden (view full) --- 2239 iptr = (uint32_t *)hba->sli.sli4.bootstrapmb.virt; 2240 BE_SWAP32_BCOPY((uint8_t *)mb, (uint8_t *)iptr, 2241 MAILBOX_CMD_SLI4_BSIZE); 2242 2243 EMLXS_MPDATA_SYNC(hba->sli.sli4.bootstrapmb.dma_handle, 0, 2244 EMLXS_BOOTSTRAP_MB_SIZE + MBOX_EXTENSION_SIZE, 2245 DDI_DMA_SYNC_FORDEV); 2246 |
2231 emlxs_data_dump(hba, "MBOX EXT", iptr, 12, 0); | 2247 emlxs_data_dump(port, "MBOX EXT", iptr, 12, 0); |
2232 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_mbox_detail_msg, 2233 "Extension Addr %p %p", mp->phys, 2234 (uint32_t *)((uint8_t *)mp->virt)); 2235 iptr = (uint32_t *)((uint8_t *)mp->virt); | 2248 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_mbox_detail_msg, 2249 "Extension Addr %p %p", mp->phys, 2250 (uint32_t *)((uint8_t *)mp->virt)); 2251 iptr = (uint32_t *)((uint8_t *)mp->virt); |
2236 emlxs_data_dump(hba, "EXT AREA", (uint32_t *)mp->virt, 24, 0); | 2252 emlxs_data_dump(port, "EXT AREA", (uint32_t *)mp->virt, 24, 0); |
2237 } 2238 2239 2240 /* NOTE: tmo is in 10ms ticks */ 2241 if (!emlxs_issue_bootstrap_mb(hba, tmo)) { 2242 return (MBX_TIMEOUT); 2243 } 2244 2245 if ((mb->mbxCommand != MBX_SLI_CONFIG) || 2246 (mb4->un.varSLIConfig.be.embedded)) { 2247 EMLXS_MPDATA_SYNC(hba->sli.sli4.bootstrapmb.dma_handle, 0, 2248 MAILBOX_CMD_SLI4_BSIZE, DDI_DMA_SYNC_FORKERNEL); 2249 2250 iptr = (uint32_t *)hba->sli.sli4.bootstrapmb.virt; 2251 BE_SWAP32_BCOPY((uint8_t *)iptr, (uint8_t *)mb, 2252 MAILBOX_CMD_SLI4_BSIZE); 2253 | 2253 } 2254 2255 2256 /* NOTE: tmo is in 10ms ticks */ 2257 if (!emlxs_issue_bootstrap_mb(hba, tmo)) { 2258 return (MBX_TIMEOUT); 2259 } 2260 2261 if ((mb->mbxCommand != MBX_SLI_CONFIG) || 2262 (mb4->un.varSLIConfig.be.embedded)) { 2263 EMLXS_MPDATA_SYNC(hba->sli.sli4.bootstrapmb.dma_handle, 0, 2264 MAILBOX_CMD_SLI4_BSIZE, DDI_DMA_SYNC_FORKERNEL); 2265 2266 iptr = (uint32_t *)hba->sli.sli4.bootstrapmb.virt; 2267 BE_SWAP32_BCOPY((uint8_t *)iptr, (uint8_t *)mb, 2268 MAILBOX_CMD_SLI4_BSIZE); 2269 |
2254 emlxs_data_dump(hba, "MBOX CMPL", iptr, 18, 0); | 2270 emlxs_data_dump(port, "MBOX CMP", iptr, 18, 0); |
2255 2256 } else { 2257 EMLXS_MPDATA_SYNC(hba->sli.sli4.bootstrapmb.dma_handle, 0, 2258 EMLXS_BOOTSTRAP_MB_SIZE + MBOX_EXTENSION_SIZE, 2259 DDI_DMA_SYNC_FORKERNEL); 2260 2261 EMLXS_MPDATA_SYNC(mp->dma_handle, 0, mp->size, 2262 DDI_DMA_SYNC_FORKERNEL); 2263 2264 BE_SWAP32_BUFFER(mp->virt, mp->size); 2265 2266 iptr = (uint32_t *)hba->sli.sli4.bootstrapmb.virt; 2267 BE_SWAP32_BCOPY((uint8_t *)iptr, (uint8_t *)mb, 2268 MAILBOX_CMD_SLI4_BSIZE); 2269 | 2271 2272 } else { 2273 EMLXS_MPDATA_SYNC(hba->sli.sli4.bootstrapmb.dma_handle, 0, 2274 EMLXS_BOOTSTRAP_MB_SIZE + MBOX_EXTENSION_SIZE, 2275 DDI_DMA_SYNC_FORKERNEL); 2276 2277 EMLXS_MPDATA_SYNC(mp->dma_handle, 0, mp->size, 2278 DDI_DMA_SYNC_FORKERNEL); 2279 2280 BE_SWAP32_BUFFER(mp->virt, mp->size); 2281 2282 iptr = (uint32_t *)hba->sli.sli4.bootstrapmb.virt; 2283 BE_SWAP32_BCOPY((uint8_t *)iptr, (uint8_t *)mb, 2284 MAILBOX_CMD_SLI4_BSIZE); 2285 |
2270 emlxs_data_dump(hba, "MBOX CMPL", iptr, 12, 0); | 2286 emlxs_data_dump(port, "MBOX CMP", iptr, 12, 0); |
2271 iptr = (uint32_t *)((uint8_t *)mp->virt); | 2287 iptr = (uint32_t *)((uint8_t *)mp->virt); |
2272 emlxs_data_dump(hba, "EXT AREA", (uint32_t *)iptr, 24, 0); | 2288 emlxs_data_dump(port, "EXT AREA", (uint32_t *)iptr, 24, 0); |
2273 } 2274 2275#ifdef FMA_SUPPORT 2276 if (nonembed && mp) { 2277 if (emlxs_fm_check_dma_handle(hba, mp->dma_handle) 2278 != DDI_FM_OK) { 2279 EMLXS_MSGF(EMLXS_CONTEXT, 2280 &emlxs_invalid_dma_handle_msg, --- 19 unchanged lines hidden (view full) --- 2300} /* emlxs_sli4_issue_bootstrap() */ 2301 2302 2303/*ARGSUSED*/ 2304static uint32_t 2305emlxs_sli4_issue_mbox_cmd(emlxs_hba_t *hba, MAILBOXQ *mbq, int32_t flag, 2306 uint32_t tmo) 2307{ | 2289 } 2290 2291#ifdef FMA_SUPPORT 2292 if (nonembed && mp) { 2293 if (emlxs_fm_check_dma_handle(hba, mp->dma_handle) 2294 != DDI_FM_OK) { 2295 EMLXS_MSGF(EMLXS_CONTEXT, 2296 &emlxs_invalid_dma_handle_msg, --- 19 unchanged lines hidden (view full) --- 2316} /* emlxs_sli4_issue_bootstrap() */ 2317 2318 2319/*ARGSUSED*/ 2320static uint32_t 2321emlxs_sli4_issue_mbox_cmd(emlxs_hba_t *hba, MAILBOXQ *mbq, int32_t flag, 2322 uint32_t tmo) 2323{ |
2308 emlxs_port_t *port = &PPORT; | 2324 emlxs_port_t *port; |
2309 MAILBOX4 *mb4; 2310 MAILBOX *mb; 2311 mbox_rsp_hdr_t *hdr_rsp; 2312 MATCHMAP *mp; 2313 uint32_t *iptr; 2314 uint32_t rc; 2315 uint32_t i; 2316 uint32_t tmo_local; 2317 | 2325 MAILBOX4 *mb4; 2326 MAILBOX *mb; 2327 mbox_rsp_hdr_t *hdr_rsp; 2328 MATCHMAP *mp; 2329 uint32_t *iptr; 2330 uint32_t rc; 2331 uint32_t i; 2332 uint32_t tmo_local; 2333 |
2334 if (!mbq->port) { 2335 mbq->port = &PPORT; 2336 } 2337 2338 port = (emlxs_port_t *)mbq->port; 2339 |
|
2318 mb4 = (MAILBOX4 *)mbq; 2319 mb = (MAILBOX *)mbq; 2320 2321 mb->mbxStatus = MBX_SUCCESS; 2322 rc = MBX_SUCCESS; 2323 2324 /* Check for minimum timeouts */ 2325 switch (mb->mbxCommand) { --- 33 unchanged lines hidden (view full) --- 2359 } else { 2360 /* Must have interrupts enabled to perform MBX_NOWAIT */ 2361 if (!(hba->sli.sli4.flag & EMLXS_SLI4_INTR_ENABLED)) { 2362 2363 mb->mbxStatus = MBX_HARDWARE_ERROR; 2364 mutex_exit(&EMLXS_PORT_LOCK); 2365 2366 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_mbox_detail_msg, | 2340 mb4 = (MAILBOX4 *)mbq; 2341 mb = (MAILBOX *)mbq; 2342 2343 mb->mbxStatus = MBX_SUCCESS; 2344 rc = MBX_SUCCESS; 2345 2346 /* Check for minimum timeouts */ 2347 switch (mb->mbxCommand) { --- 33 unchanged lines hidden (view full) --- 2381 } else { 2382 /* Must have interrupts enabled to perform MBX_NOWAIT */ 2383 if (!(hba->sli.sli4.flag & EMLXS_SLI4_INTR_ENABLED)) { 2384 2385 mb->mbxStatus = MBX_HARDWARE_ERROR; 2386 mutex_exit(&EMLXS_PORT_LOCK); 2387 2388 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_mbox_detail_msg, |
2367 "Mailbox Queue missing %s failed", | 2389 "Interrupts disabled. %s failed.", |
2368 emlxs_mb_cmd_xlate(mb->mbxCommand)); 2369 2370 return (MBX_HARDWARE_ERROR); 2371 } 2372 } 2373 2374 /* Check for hardware error ; special case SLI_CONFIG */ 2375 if ((hba->flag & FC_HARDWARE_ERROR) && --- 46 unchanged lines hidden (view full) --- 2422 DELAYMS(10); 2423 mutex_enter(&EMLXS_PORT_LOCK); 2424 } 2425 } 2426 2427 /* Initialize mailbox area */ 2428 emlxs_mb_init(hba, mbq, flag, tmo); 2429 | 2390 emlxs_mb_cmd_xlate(mb->mbxCommand)); 2391 2392 return (MBX_HARDWARE_ERROR); 2393 } 2394 } 2395 2396 /* Check for hardware error ; special case SLI_CONFIG */ 2397 if ((hba->flag & FC_HARDWARE_ERROR) && --- 46 unchanged lines hidden (view full) --- 2444 DELAYMS(10); 2445 mutex_enter(&EMLXS_PORT_LOCK); 2446 } 2447 } 2448 2449 /* Initialize mailbox area */ 2450 emlxs_mb_init(hba, mbq, flag, tmo); 2451 |
2452 if (mb->mbxCommand == MBX_DOWN_LINK) { 2453 hba->sli.sli4.flag |= EMLXS_SLI4_DOWN_LINK; 2454 } 2455 |
|
2430 mutex_exit(&EMLXS_PORT_LOCK); 2431 switch (flag) { 2432 2433 case MBX_NOWAIT: 2434 if (mb->mbxCommand != MBX_HEARTBEAT) { 2435 if (mb->mbxCommand != MBX_DOWN_LOAD 2436 /* && mb->mbxCommand != MBX_DUMP_MEMORY */) { 2437 EMLXS_MSGF(EMLXS_CONTEXT, --- 13 unchanged lines hidden (view full) --- 2451 } 2452 2453 if (mbq->bp) { 2454 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_mbox_detail_msg, 2455 "BDE virt %p phys %p size x%x", 2456 ((MATCHMAP *)mbq->bp)->virt, 2457 ((MATCHMAP *)mbq->bp)->phys, 2458 ((MATCHMAP *)mbq->bp)->size); | 2456 mutex_exit(&EMLXS_PORT_LOCK); 2457 switch (flag) { 2458 2459 case MBX_NOWAIT: 2460 if (mb->mbxCommand != MBX_HEARTBEAT) { 2461 if (mb->mbxCommand != MBX_DOWN_LOAD 2462 /* && mb->mbxCommand != MBX_DUMP_MEMORY */) { 2463 EMLXS_MSGF(EMLXS_CONTEXT, --- 13 unchanged lines hidden (view full) --- 2477 } 2478 2479 if (mbq->bp) { 2480 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_mbox_detail_msg, 2481 "BDE virt %p phys %p size x%x", 2482 ((MATCHMAP *)mbq->bp)->virt, 2483 ((MATCHMAP *)mbq->bp)->phys, 2484 ((MATCHMAP *)mbq->bp)->size); |
2459 emlxs_data_dump(hba, "DATA", | 2485 emlxs_data_dump(port, "DATA", |
2460 (uint32_t *)(((MATCHMAP *)mbq->bp)->virt), 30, 0); 2461 } | 2486 (uint32_t *)(((MATCHMAP *)mbq->bp)->virt), 30, 0); 2487 } |
2462 rc = emlxs_sli4_issue_mq(hba, (MAILBOX4 *)iptr, mb, tmo_local); | 2488 rc = emlxs_sli4_issue_mq(port, (MAILBOX4 *)iptr, mb, tmo_local); |
2463 break; 2464 2465 case MBX_POLL: 2466 if (mb->mbxCommand != MBX_DOWN_LOAD 2467 /* && mb->mbxCommand != MBX_DUMP_MEMORY */) { 2468 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_mbox_detail_msg, 2469 "Sending. %s: mb=%p Poll. embedded %d", 2470 emlxs_mb_cmd_xlate(mb->mbxCommand), mb, --- 15 unchanged lines hidden (view full) --- 2486 EMLXS_STATE_CHANGE(hba, FC_ERROR); 2487 emlxs_mb_fini(hba, NULL, MBX_TIMEOUT); 2488 2489 } else { 2490 if (mb->mbxCommand != MBX_DOWN_LOAD 2491 /* && mb->mbxCommand != MBX_DUMP_MEMORY */) { 2492 EMLXS_MSGF(EMLXS_CONTEXT, 2493 &emlxs_mbox_detail_msg, | 2489 break; 2490 2491 case MBX_POLL: 2492 if (mb->mbxCommand != MBX_DOWN_LOAD 2493 /* && mb->mbxCommand != MBX_DUMP_MEMORY */) { 2494 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_mbox_detail_msg, 2495 "Sending. %s: mb=%p Poll. embedded %d", 2496 emlxs_mb_cmd_xlate(mb->mbxCommand), mb, --- 15 unchanged lines hidden (view full) --- 2512 EMLXS_STATE_CHANGE(hba, FC_ERROR); 2513 emlxs_mb_fini(hba, NULL, MBX_TIMEOUT); 2514 2515 } else { 2516 if (mb->mbxCommand != MBX_DOWN_LOAD 2517 /* && mb->mbxCommand != MBX_DUMP_MEMORY */) { 2518 EMLXS_MSGF(EMLXS_CONTEXT, 2519 &emlxs_mbox_detail_msg, |
2494 "Completed. %s: mb=%p status=%x Poll. " \ | 2520 "Completed. %s: mb=%p status=%x Poll. " |
2495 "embedded %d", 2496 emlxs_mb_cmd_xlate(mb->mbxCommand), mb, rc, 2497 ((mb->mbxCommand != MBX_SLI_CONFIG) ? 1 : 2498 (mb4->un.varSLIConfig.be.embedded))); 2499 } 2500 2501 /* Process the result */ 2502 if (!(mbq->flag & MBQ_PASSTHRU)) { --- 4 unchanged lines hidden (view full) --- 2507 2508 emlxs_mb_fini(hba, NULL, mb->mbxStatus); 2509 } 2510 2511 mp = (MATCHMAP *)mbq->nonembed; 2512 if (mp) { 2513 hdr_rsp = (mbox_rsp_hdr_t *)mp->virt; 2514 if (hdr_rsp->status) { | 2521 "embedded %d", 2522 emlxs_mb_cmd_xlate(mb->mbxCommand), mb, rc, 2523 ((mb->mbxCommand != MBX_SLI_CONFIG) ? 1 : 2524 (mb4->un.varSLIConfig.be.embedded))); 2525 } 2526 2527 /* Process the result */ 2528 if (!(mbq->flag & MBQ_PASSTHRU)) { --- 4 unchanged lines hidden (view full) --- 2533 2534 emlxs_mb_fini(hba, NULL, mb->mbxStatus); 2535 } 2536 2537 mp = (MATCHMAP *)mbq->nonembed; 2538 if (mp) { 2539 hdr_rsp = (mbox_rsp_hdr_t *)mp->virt; 2540 if (hdr_rsp->status) { |
2541 EMLXS_MSGF(EMLXS_CONTEXT, 2542 &emlxs_mbox_detail_msg, 2543 "%s: MBX_NONEMBED_ERROR: 0x%x, 0x%x", 2544 emlxs_mb_cmd_xlate(mb->mbxCommand), 2545 hdr_rsp->status, hdr_rsp->extra_status); 2546 |
|
2515 mb->mbxStatus = MBX_NONEMBED_ERROR; 2516 } 2517 } 2518 rc = mb->mbxStatus; 2519 2520 /* Attempt to send pending mailboxes */ 2521 mbq = (MAILBOXQ *)emlxs_mb_get(hba); 2522 if (mbq) { 2523 /* Attempt to send pending mailboxes */ 2524 i = emlxs_sli4_issue_mbox_cmd(hba, mbq, MBX_NOWAIT, 0); 2525 if ((i != MBX_BUSY) && (i != MBX_SUCCESS)) { | 2547 mb->mbxStatus = MBX_NONEMBED_ERROR; 2548 } 2549 } 2550 rc = mb->mbxStatus; 2551 2552 /* Attempt to send pending mailboxes */ 2553 mbq = (MAILBOXQ *)emlxs_mb_get(hba); 2554 if (mbq) { 2555 /* Attempt to send pending mailboxes */ 2556 i = emlxs_sli4_issue_mbox_cmd(hba, mbq, MBX_NOWAIT, 0); 2557 if ((i != MBX_BUSY) && (i != MBX_SUCCESS)) { |
2526 (void) emlxs_mem_put(hba, MEM_MBOX, 2527 (uint8_t *)mbq); | 2558 emlxs_mem_put(hba, MEM_MBOX, (void *)mbq); |
2528 } 2529 } 2530 break; 2531 2532 case MBX_SLEEP: 2533 if (mb->mbxCommand != MBX_DOWN_LOAD 2534 /* && mb->mbxCommand != MBX_DUMP_MEMORY */) { 2535 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_mbox_detail_msg, --- 5 unchanged lines hidden (view full) --- 2541 2542 iptr = hba->sli.sli4.mq.addr.virt; 2543 iptr += (hba->sli.sli4.mq.host_index * MAILBOX_CMD_SLI4_WSIZE); 2544 hba->sli.sli4.mq.host_index++; 2545 if (hba->sli.sli4.mq.host_index >= hba->sli.sli4.mq.max_index) { 2546 hba->sli.sli4.mq.host_index = 0; 2547 } 2548 | 2559 } 2560 } 2561 break; 2562 2563 case MBX_SLEEP: 2564 if (mb->mbxCommand != MBX_DOWN_LOAD 2565 /* && mb->mbxCommand != MBX_DUMP_MEMORY */) { 2566 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_mbox_detail_msg, --- 5 unchanged lines hidden (view full) --- 2572 2573 iptr = hba->sli.sli4.mq.addr.virt; 2574 iptr += (hba->sli.sli4.mq.host_index * MAILBOX_CMD_SLI4_WSIZE); 2575 hba->sli.sli4.mq.host_index++; 2576 if (hba->sli.sli4.mq.host_index >= hba->sli.sli4.mq.max_index) { 2577 hba->sli.sli4.mq.host_index = 0; 2578 } 2579 |
2549 rc = emlxs_sli4_issue_mq(hba, (MAILBOX4 *)iptr, mb, tmo_local); | 2580 rc = emlxs_sli4_issue_mq(port, (MAILBOX4 *)iptr, mb, tmo_local); |
2550 2551 if (rc != MBX_SUCCESS) { 2552 break; 2553 } 2554 2555 /* Wait for completion */ 2556 /* The driver clock is timing the mailbox. */ 2557 2558 mutex_enter(&EMLXS_MBOX_LOCK); 2559 while (!(mbq->flag & MBQ_COMPLETED)) { 2560 cv_wait(&EMLXS_MBOX_CV, &EMLXS_MBOX_LOCK); 2561 } 2562 mutex_exit(&EMLXS_MBOX_LOCK); 2563 2564 mp = (MATCHMAP *)mbq->nonembed; 2565 if (mp) { 2566 hdr_rsp = (mbox_rsp_hdr_t *)mp->virt; 2567 if (hdr_rsp->status) { | 2581 2582 if (rc != MBX_SUCCESS) { 2583 break; 2584 } 2585 2586 /* Wait for completion */ 2587 /* The driver clock is timing the mailbox. */ 2588 2589 mutex_enter(&EMLXS_MBOX_LOCK); 2590 while (!(mbq->flag & MBQ_COMPLETED)) { 2591 cv_wait(&EMLXS_MBOX_CV, &EMLXS_MBOX_LOCK); 2592 } 2593 mutex_exit(&EMLXS_MBOX_LOCK); 2594 2595 mp = (MATCHMAP *)mbq->nonembed; 2596 if (mp) { 2597 hdr_rsp = (mbox_rsp_hdr_t *)mp->virt; 2598 if (hdr_rsp->status) { |
2599 EMLXS_MSGF(EMLXS_CONTEXT, 2600 &emlxs_mbox_detail_msg, 2601 "%s: MBX_NONEMBED_ERROR: 0x%x, 0x%x", 2602 emlxs_mb_cmd_xlate(mb->mbxCommand), 2603 hdr_rsp->status, hdr_rsp->extra_status); 2604 |
|
2568 mb->mbxStatus = MBX_NONEMBED_ERROR; 2569 } 2570 } 2571 rc = mb->mbxStatus; 2572 2573 if (rc == MBX_TIMEOUT) { 2574 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_mbox_detail_msg, 2575 "Timeout. %s: mb=%p tmo=%x Sleep. embedded %d", 2576 emlxs_mb_cmd_xlate(mb->mbxCommand), mb, tmo, 2577 ((mb->mbxCommand != MBX_SLI_CONFIG) ? 1 : 2578 (mb4->un.varSLIConfig.be.embedded))); 2579 } else { 2580 if (mb->mbxCommand != MBX_DOWN_LOAD 2581 /* && mb->mbxCommand != MBX_DUMP_MEMORY */) { 2582 EMLXS_MSGF(EMLXS_CONTEXT, 2583 &emlxs_mbox_detail_msg, | 2605 mb->mbxStatus = MBX_NONEMBED_ERROR; 2606 } 2607 } 2608 rc = mb->mbxStatus; 2609 2610 if (rc == MBX_TIMEOUT) { 2611 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_mbox_detail_msg, 2612 "Timeout. %s: mb=%p tmo=%x Sleep. embedded %d", 2613 emlxs_mb_cmd_xlate(mb->mbxCommand), mb, tmo, 2614 ((mb->mbxCommand != MBX_SLI_CONFIG) ? 1 : 2615 (mb4->un.varSLIConfig.be.embedded))); 2616 } else { 2617 if (mb->mbxCommand != MBX_DOWN_LOAD 2618 /* && mb->mbxCommand != MBX_DUMP_MEMORY */) { 2619 EMLXS_MSGF(EMLXS_CONTEXT, 2620 &emlxs_mbox_detail_msg, |
2584 "Completed. %s: mb=%p status=%x Sleep. " \ | 2621 "Completed. %s: mb=%p status=%x Sleep. " |
2585 "embedded %d", 2586 emlxs_mb_cmd_xlate(mb->mbxCommand), mb, rc, 2587 ((mb->mbxCommand != MBX_SLI_CONFIG) ? 1 : 2588 (mb4->un.varSLIConfig.be.embedded))); 2589 } 2590 } 2591 break; 2592 } --- 61 unchanged lines hidden (view full) --- 2654 2655 emlxs_mb_fini(hba, NULL, mb->mbxStatus); 2656 } 2657 2658 mp = (MATCHMAP *)mbq->nonembed; 2659 if (mp) { 2660 hdr_rsp = (mbox_rsp_hdr_t *)mp->virt; 2661 if (hdr_rsp->status) { | 2622 "embedded %d", 2623 emlxs_mb_cmd_xlate(mb->mbxCommand), mb, rc, 2624 ((mb->mbxCommand != MBX_SLI_CONFIG) ? 1 : 2625 (mb4->un.varSLIConfig.be.embedded))); 2626 } 2627 } 2628 break; 2629 } --- 61 unchanged lines hidden (view full) --- 2691 2692 emlxs_mb_fini(hba, NULL, mb->mbxStatus); 2693 } 2694 2695 mp = (MATCHMAP *)mbq->nonembed; 2696 if (mp) { 2697 hdr_rsp = (mbox_rsp_hdr_t *)mp->virt; 2698 if (hdr_rsp->status) { |
2699 EMLXS_MSGF(EMLXS_CONTEXT, 2700 &emlxs_mbox_detail_msg, 2701 "%s: MBX_NONEMBED_ERROR: 0x%x, 0x%x", 2702 emlxs_mb_cmd_xlate(mb->mbxCommand), 2703 hdr_rsp->status, hdr_rsp->extra_status); 2704 |
|
2662 mb->mbxStatus = MBX_NONEMBED_ERROR; 2663 } 2664 } 2665 rc = mb->mbxStatus; 2666 2667 break; 2668 } 2669 --- 16 unchanged lines hidden (view full) --- 2686 2687/*ARGSUSED*/ 2688extern uint32_t 2689emlxs_sli4_prep_fcp_iocb(emlxs_port_t *port, emlxs_buf_t *sbp, int channel) 2690{ 2691 emlxs_hba_t *hba = HBA; 2692 fc_packet_t *pkt; 2693 CHANNEL *cp; | 2705 mb->mbxStatus = MBX_NONEMBED_ERROR; 2706 } 2707 } 2708 rc = mb->mbxStatus; 2709 2710 break; 2711 } 2712 --- 16 unchanged lines hidden (view full) --- 2729 2730/*ARGSUSED*/ 2731extern uint32_t 2732emlxs_sli4_prep_fcp_iocb(emlxs_port_t *port, emlxs_buf_t *sbp, int channel) 2733{ 2734 emlxs_hba_t *hba = HBA; 2735 fc_packet_t *pkt; 2736 CHANNEL *cp; |
2694 RPIobj_t *rp; 2695 XRIobj_t *xp; | 2737 RPIobj_t *rpip; 2738 XRIobj_t *xrip; |
2696 emlxs_wqe_t *wqe; 2697 IOCBQ *iocbq; 2698 NODELIST *node; 2699 uint16_t iotag; 2700 uint32_t did; 2701 off_t offset; 2702 2703 pkt = PRIV2PKT(sbp); --- 4 unchanged lines hidden (view full) --- 2708 iocbq->channel = (void *) cp; 2709 iocbq->port = (void *) port; 2710 2711 wqe = &iocbq->wqe; 2712 bzero((void *)wqe, sizeof (emlxs_wqe_t)); 2713 2714 /* Find target node object */ 2715 node = (NODELIST *)iocbq->node; | 2739 emlxs_wqe_t *wqe; 2740 IOCBQ *iocbq; 2741 NODELIST *node; 2742 uint16_t iotag; 2743 uint32_t did; 2744 off_t offset; 2745 2746 pkt = PRIV2PKT(sbp); --- 4 unchanged lines hidden (view full) --- 2751 iocbq->channel = (void *) cp; 2752 iocbq->port = (void *) port; 2753 2754 wqe = &iocbq->wqe; 2755 bzero((void *)wqe, sizeof (emlxs_wqe_t)); 2756 2757 /* Find target node object */ 2758 node = (NODELIST *)iocbq->node; |
2716 rp = EMLXS_NODE_TO_RPI(hba, node); | 2759 rpip = EMLXS_NODE_TO_RPI(port, node); |
2717 | 2760 |
2718 if (!rp) { | 2761 if (!rpip) { |
2719 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_pkt_trans_msg, 2720 "Unable to find rpi. did=0x%x", did); 2721 2722 emlxs_set_pkt_state(sbp, IOSTAT_LOCAL_REJECT, 2723 IOERR_INVALID_RPI, 0); 2724 return (0xff); 2725 } 2726 2727 sbp->channel = cp; 2728 /* Next allocate an Exchange for this command */ | 2762 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_pkt_trans_msg, 2763 "Unable to find rpi. did=0x%x", did); 2764 2765 emlxs_set_pkt_state(sbp, IOSTAT_LOCAL_REJECT, 2766 IOERR_INVALID_RPI, 0); 2767 return (0xff); 2768 } 2769 2770 sbp->channel = cp; 2771 /* Next allocate an Exchange for this command */ |
2729 xp = emlxs_sli4_alloc_xri(hba, sbp, rp); | 2772 xrip = emlxs_sli4_alloc_xri(hba, sbp, rpip); |
2730 | 2773 |
2731 if (!xp) { | 2774 if (!xrip) { |
2732 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_pkt_trans_msg, 2733 "Adapter Busy. Unable to allocate exchange. did=0x%x", did); 2734 2735 return (FC_TRAN_BUSY); 2736 } 2737 sbp->bmp = NULL; 2738 iotag = sbp->iotag; 2739 2740#ifdef SLI4_FASTPATH_DEBUG 2741 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, /* DEBUG */ | 2775 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_pkt_trans_msg, 2776 "Adapter Busy. Unable to allocate exchange. did=0x%x", did); 2777 2778 return (FC_TRAN_BUSY); 2779 } 2780 sbp->bmp = NULL; 2781 iotag = sbp->iotag; 2782 2783#ifdef SLI4_FASTPATH_DEBUG 2784 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, /* DEBUG */ |
2742 "Prep FCP iotag: %x xri: %x", iotag, xp->XRI); | 2785 "Prep FCP iotag: %x xri: %x", iotag, xrip->XRI); |
2743#endif 2744 2745 /* Indicate this is a FCP cmd */ 2746 iocbq->flag |= IOCB_FCP_CMD; 2747 2748 if (emlxs_sli4_bde_setup(port, sbp)) { | 2786#endif 2787 2788 /* Indicate this is a FCP cmd */ 2789 iocbq->flag |= IOCB_FCP_CMD; 2790 2791 if (emlxs_sli4_bde_setup(port, sbp)) { |
2749 emlxs_sli4_free_xri(hba, sbp, xp); | 2792 emlxs_sli4_free_xri(hba, sbp, xrip, 1); |
2750 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_pkt_trans_msg, 2751 "Adapter Busy. Unable to setup SGE. did=0x%x", did); 2752 2753 return (FC_TRAN_BUSY); 2754 } 2755 2756 2757 /* DEBUG */ 2758#ifdef DEBUG_FCP 2759 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, | 2793 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_pkt_trans_msg, 2794 "Adapter Busy. Unable to setup SGE. did=0x%x", did); 2795 2796 return (FC_TRAN_BUSY); 2797 } 2798 2799 2800 /* DEBUG */ 2801#ifdef DEBUG_FCP 2802 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, |
2760 "SGLaddr virt %p phys %p size %d", xp->SGList.virt, 2761 xp->SGList.phys, pkt->pkt_datalen); 2762 emlxs_data_dump(hba, "SGL", (uint32_t *)xp->SGList.virt, 20, 0); | 2803 "SGLaddr virt %p phys %p size %d", xrip->SGList.virt, 2804 xrip->SGList.phys, pkt->pkt_datalen); 2805 emlxs_data_dump(port, "SGL", (uint32_t *)xrip->SGList.virt, 20, 0); |
2763 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 2764 "CMD virt %p len %d:%d:%d", 2765 pkt->pkt_cmd, pkt->pkt_cmdlen, pkt->pkt_rsplen, pkt->pkt_datalen); | 2806 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 2807 "CMD virt %p len %d:%d:%d", 2808 pkt->pkt_cmd, pkt->pkt_cmdlen, pkt->pkt_rsplen, pkt->pkt_datalen); |
2766 emlxs_data_dump(hba, "FCP CMD", (uint32_t *)pkt->pkt_cmd, 10, 0); | 2809 emlxs_data_dump(port, "FCP CMD", (uint32_t *)pkt->pkt_cmd, 10, 0); |
2767#endif 2768 2769 offset = (off_t)((uint64_t)((unsigned long) | 2810#endif 2811 2812 offset = (off_t)((uint64_t)((unsigned long) |
2770 xp->SGList.virt) - | 2813 xrip->SGList.virt) - |
2771 (uint64_t)((unsigned long) 2772 hba->sli.sli4.slim2.virt)); 2773 | 2814 (uint64_t)((unsigned long) 2815 hba->sli.sli4.slim2.virt)); 2816 |
2774 EMLXS_MPDATA_SYNC(xp->SGList.dma_handle, offset, 2775 xp->SGList.size, DDI_DMA_SYNC_FORDEV); | 2817 EMLXS_MPDATA_SYNC(xrip->SGList.dma_handle, offset, 2818 xrip->SGList.size, DDI_DMA_SYNC_FORDEV); |
2776 2777 /* if device is FCP-2 device, set the following bit */ 2778 /* that says to run the FC-TAPE protocol. */ 2779 if (node->nlp_fcp_info & NLP_FCP_2_DEVICE) { 2780 wqe->ERP = 1; 2781 } 2782 2783 if (pkt->pkt_datalen == 0) { --- 4 unchanged lines hidden (view full) --- 2788 wqe->CmdType = WQE_TYPE_FCP_DATA_IN; 2789 wqe->PU = PARM_READ_CHECK; 2790 } else { 2791 wqe->Command = CMD_FCP_IWRITE64_CR; 2792 wqe->CmdType = WQE_TYPE_FCP_DATA_OUT; 2793 } 2794 wqe->un.FcpCmd.TotalTransferCount = pkt->pkt_datalen; 2795 | 2819 2820 /* if device is FCP-2 device, set the following bit */ 2821 /* that says to run the FC-TAPE protocol. */ 2822 if (node->nlp_fcp_info & NLP_FCP_2_DEVICE) { 2823 wqe->ERP = 1; 2824 } 2825 2826 if (pkt->pkt_datalen == 0) { --- 4 unchanged lines hidden (view full) --- 2831 wqe->CmdType = WQE_TYPE_FCP_DATA_IN; 2832 wqe->PU = PARM_READ_CHECK; 2833 } else { 2834 wqe->Command = CMD_FCP_IWRITE64_CR; 2835 wqe->CmdType = WQE_TYPE_FCP_DATA_OUT; 2836 } 2837 wqe->un.FcpCmd.TotalTransferCount = pkt->pkt_datalen; 2838 |
2796 wqe->ContextTag = rp->RPI; | 2839 wqe->ContextTag = rpip->RPI; |
2797 wqe->ContextType = WQE_RPI_CONTEXT; | 2840 wqe->ContextType = WQE_RPI_CONTEXT; |
2798 wqe->XRITag = xp->XRI; | 2841 wqe->XRITag = xrip->XRI; |
2799 wqe->Timer = 2800 ((pkt->pkt_timeout > 0xff) ? 0 : pkt->pkt_timeout); 2801 2802 if (pkt->pkt_cmd_fhdr.f_ctl & F_CTL_CHAINED_SEQ) { 2803 wqe->CCPE = 1; 2804 wqe->CCP = pkt->pkt_cmd_fhdr.rsvd; 2805 } 2806 --- 26 unchanged lines hidden (view full) --- 2833static uint32_t 2834emlxs_sli4_prep_els_iocb(emlxs_port_t *port, emlxs_buf_t *sbp) 2835{ 2836 emlxs_hba_t *hba = HBA; 2837 fc_packet_t *pkt; 2838 IOCBQ *iocbq; 2839 IOCB *iocb; 2840 emlxs_wqe_t *wqe; | 2842 wqe->Timer = 2843 ((pkt->pkt_timeout > 0xff) ? 0 : pkt->pkt_timeout); 2844 2845 if (pkt->pkt_cmd_fhdr.f_ctl & F_CTL_CHAINED_SEQ) { 2846 wqe->CCPE = 1; 2847 wqe->CCP = pkt->pkt_cmd_fhdr.rsvd; 2848 } 2849 --- 26 unchanged lines hidden (view full) --- 2876static uint32_t 2877emlxs_sli4_prep_els_iocb(emlxs_port_t *port, emlxs_buf_t *sbp) 2878{ 2879 emlxs_hba_t *hba = HBA; 2880 fc_packet_t *pkt; 2881 IOCBQ *iocbq; 2882 IOCB *iocb; 2883 emlxs_wqe_t *wqe; |
2841 FCFIobj_t *fp; 2842 RPIobj_t *rp = NULL; 2843 XRIobj_t *xp; | 2884 FCFIobj_t *fcfp; 2885 RPIobj_t *rpip = NULL; 2886 XRIobj_t *xrip; |
2844 CHANNEL *cp; 2845 uint32_t did; 2846 uint32_t cmd; 2847 ULP_SGE64 stage_sge; 2848 ULP_SGE64 *sge; 2849 ddi_dma_cookie_t *cp_cmd; 2850 ddi_dma_cookie_t *cp_resp; 2851 emlxs_node_t *node; --- 25 unchanged lines hidden (view full) --- 2877#endif /* >= EMLXS_MODREV3 */ 2878 2879 /* CMD payload */ 2880 sge = &stage_sge; 2881 sge->addrHigh = PADDR_HI(cp_cmd->dmac_laddress); 2882 sge->addrLow = PADDR_LO(cp_cmd->dmac_laddress); 2883 sge->length = pkt->pkt_cmdlen; 2884 sge->offset = 0; | 2887 CHANNEL *cp; 2888 uint32_t did; 2889 uint32_t cmd; 2890 ULP_SGE64 stage_sge; 2891 ULP_SGE64 *sge; 2892 ddi_dma_cookie_t *cp_cmd; 2893 ddi_dma_cookie_t *cp_resp; 2894 emlxs_node_t *node; --- 25 unchanged lines hidden (view full) --- 2920#endif /* >= EMLXS_MODREV3 */ 2921 2922 /* CMD payload */ 2923 sge = &stage_sge; 2924 sge->addrHigh = PADDR_HI(cp_cmd->dmac_laddress); 2925 sge->addrLow = PADDR_LO(cp_cmd->dmac_laddress); 2926 sge->length = pkt->pkt_cmdlen; 2927 sge->offset = 0; |
2928 sge->reserved = 0; |
|
2885 2886 /* Initalize iocb */ 2887 if (pkt->pkt_tran_type == FC_PKT_OUTBOUND) { 2888 /* ELS Response */ 2889 | 2929 2930 /* Initalize iocb */ 2931 if (pkt->pkt_tran_type == FC_PKT_OUTBOUND) { 2932 /* ELS Response */ 2933 |
2890 xp = emlxs_sli4_register_xri(hba, sbp, pkt->pkt_cmd_fhdr.rx_id); | 2934 xrip = emlxs_sli4_register_xri(hba, sbp, 2935 pkt->pkt_cmd_fhdr.rx_id); |
2891 | 2936 |
2892 if (!xp) { | 2937 if (!xrip) { |
2893 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_pkt_trans_failed_msg, 2894 "Unable to find XRI. rxid=%x", 2895 pkt->pkt_cmd_fhdr.rx_id); 2896 2897 emlxs_set_pkt_state(sbp, IOSTAT_LOCAL_REJECT, 2898 IOERR_NO_XRI, 0); 2899 return (0xff); 2900 } 2901 | 2938 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_pkt_trans_failed_msg, 2939 "Unable to find XRI. rxid=%x", 2940 pkt->pkt_cmd_fhdr.rx_id); 2941 2942 emlxs_set_pkt_state(sbp, IOSTAT_LOCAL_REJECT, 2943 IOERR_NO_XRI, 0); 2944 return (0xff); 2945 } 2946 |
2902 rp = xp->RPIp; | 2947 rpip = xrip->rpip; |
2903 | 2948 |
2904 if (!rp) { | 2949 if (!rpip) { |
2905 /* This means that we had a node registered */ 2906 /* when the unsol request came in but the node */ 2907 /* has since been unregistered. */ 2908 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_pkt_trans_failed_msg, 2909 "Unable to find RPI. rxid=%x", 2910 pkt->pkt_cmd_fhdr.rx_id); 2911 2912 emlxs_set_pkt_state(sbp, IOSTAT_LOCAL_REJECT, 2913 IOERR_INVALID_RPI, 0); 2914 return (0xff); 2915 } 2916 2917 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 2918 "Prep ELS XRI: xri=%x iotag=%x oxid=%x rpi=%x", | 2950 /* This means that we had a node registered */ 2951 /* when the unsol request came in but the node */ 2952 /* has since been unregistered. */ 2953 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_pkt_trans_failed_msg, 2954 "Unable to find RPI. rxid=%x", 2955 pkt->pkt_cmd_fhdr.rx_id); 2956 2957 emlxs_set_pkt_state(sbp, IOSTAT_LOCAL_REJECT, 2958 IOERR_INVALID_RPI, 0); 2959 return (0xff); 2960 } 2961 2962 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 2963 "Prep ELS XRI: xri=%x iotag=%x oxid=%x rpi=%x", |
2919 xp->XRI, xp->iotag, xp->rx_id, rp->RPI); | 2964 xrip->XRI, xrip->iotag, xrip->rx_id, rpip->RPI); |
2920 2921 wqe->Command = CMD_XMIT_ELS_RSP64_CX; 2922 wqe->CmdType = WQE_TYPE_GEN; 2923 2924 wqe->un.ElsRsp.Payload.addrHigh = sge->addrHigh; 2925 wqe->un.ElsRsp.Payload.addrLow = sge->addrLow; 2926 wqe->un.ElsRsp.Payload.tus.f.bdeSize = pkt->pkt_cmdlen; 2927 2928 wqe->un.ElsRsp.RemoteId = did; 2929 wqe->PU = 0x3; 2930 2931 sge->last = 1; 2932 /* Now sge is fully staged */ 2933 | 2965 2966 wqe->Command = CMD_XMIT_ELS_RSP64_CX; 2967 wqe->CmdType = WQE_TYPE_GEN; 2968 2969 wqe->un.ElsRsp.Payload.addrHigh = sge->addrHigh; 2970 wqe->un.ElsRsp.Payload.addrLow = sge->addrLow; 2971 wqe->un.ElsRsp.Payload.tus.f.bdeSize = pkt->pkt_cmdlen; 2972 2973 wqe->un.ElsRsp.RemoteId = did; 2974 wqe->PU = 0x3; 2975 2976 sge->last = 1; 2977 /* Now sge is fully staged */ 2978 |
2934 sge = xp->SGList.virt; | 2979 sge = xrip->SGList.virt; |
2935 BE_SWAP32_BCOPY((uint8_t *)&stage_sge, (uint8_t *)sge, 2936 sizeof (ULP_SGE64)); 2937 | 2980 BE_SWAP32_BCOPY((uint8_t *)&stage_sge, (uint8_t *)sge, 2981 sizeof (ULP_SGE64)); 2982 |
2938 wqe->ContextTag = port->vpi + hba->vpi_base; | 2983 wqe->ContextTag = port->VPIobj.VPI; |
2939 wqe->ContextType = WQE_VPI_CONTEXT; | 2984 wqe->ContextType = WQE_VPI_CONTEXT; |
2940 wqe->OXId = xp->rx_id; | 2985 wqe->OXId = xrip->rx_id; |
2941 2942 } else { 2943 /* ELS Request */ 2944 2945 node = (emlxs_node_t *)iocbq->node; | 2986 2987 } else { 2988 /* ELS Request */ 2989 2990 node = (emlxs_node_t *)iocbq->node; |
2946 rp = EMLXS_NODE_TO_RPI(hba, node); | 2991 rpip = EMLXS_NODE_TO_RPI(port, node); 2992 fcfp = port->VPIobj.vfip->fcfp; |
2947 | 2993 |
2948 if (!rp) { 2949 fp = hba->sli.sli4.FCFIp; 2950 rp = &fp->scratch_rpi; | 2994 if (!rpip) { 2995 rpip = port->VPIobj.rpip; |
2951 } 2952 2953 /* Next allocate an Exchange for this command */ | 2996 } 2997 2998 /* Next allocate an Exchange for this command */ |
2954 xp = emlxs_sli4_alloc_xri(hba, sbp, rp); | 2999 xrip = emlxs_sli4_alloc_xri(hba, sbp, rpip); |
2955 | 3000 |
2956 if (!xp) { | 3001 if (!xrip) { |
2957 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_pkt_trans_msg, | 3002 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_pkt_trans_msg, |
2958 "Adapter Busy. Unable to allocate exchange. " \ | 3003 "Adapter Busy. Unable to allocate exchange. " |
2959 "did=0x%x", did); 2960 2961 return (FC_TRAN_BUSY); 2962 } 2963 2964 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, | 3004 "did=0x%x", did); 3005 3006 return (FC_TRAN_BUSY); 3007 } 3008 3009 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, |
2965 "Prep ELS XRI: xri=%x iotag=%x rpi=%x", xp->XRI, 2966 xp->iotag, rp->RPI); | 3010 "Prep ELS XRI: xri=%x iotag=%x rpi=%x", xrip->XRI, 3011 xrip->iotag, rpip->RPI); |
2967 2968 wqe->Command = CMD_ELS_REQUEST64_CR; 2969 wqe->CmdType = WQE_TYPE_ELS; 2970 2971 wqe->un.ElsCmd.Payload.addrHigh = sge->addrHigh; 2972 wqe->un.ElsCmd.Payload.addrLow = sge->addrLow; 2973 wqe->un.ElsCmd.Payload.tus.f.bdeSize = pkt->pkt_cmdlen; 2974 2975 /* setup for rsp */ 2976 iocb->un.elsreq64.remoteID = (did == BCAST_DID) ? 0 : did; 2977 iocb->ULPPU = 1; /* Wd4 is relative offset */ 2978 2979 sge->last = 0; 2980 | 3012 3013 wqe->Command = CMD_ELS_REQUEST64_CR; 3014 wqe->CmdType = WQE_TYPE_ELS; 3015 3016 wqe->un.ElsCmd.Payload.addrHigh = sge->addrHigh; 3017 wqe->un.ElsCmd.Payload.addrLow = sge->addrLow; 3018 wqe->un.ElsCmd.Payload.tus.f.bdeSize = pkt->pkt_cmdlen; 3019 3020 /* setup for rsp */ 3021 iocb->un.elsreq64.remoteID = (did == BCAST_DID) ? 0 : did; 3022 iocb->ULPPU = 1; /* Wd4 is relative offset */ 3023 3024 sge->last = 0; 3025 |
2981 sge = xp->SGList.virt; | 3026 sge = xrip->SGList.virt; |
2982 BE_SWAP32_BCOPY((uint8_t *)&stage_sge, (uint8_t *)sge, 2983 sizeof (ULP_SGE64)); 2984 2985 wqe->un.ElsCmd.PayloadLength = 2986 pkt->pkt_cmdlen; /* Byte offset of rsp data */ 2987 2988 /* RSP payload */ 2989 sge = &stage_sge; 2990 sge->addrHigh = PADDR_HI(cp_resp->dmac_laddress); 2991 sge->addrLow = PADDR_LO(cp_resp->dmac_laddress); 2992 sge->length = pkt->pkt_rsplen; 2993 sge->offset = 0; 2994 sge->last = 1; 2995 /* Now sge is fully staged */ 2996 | 3027 BE_SWAP32_BCOPY((uint8_t *)&stage_sge, (uint8_t *)sge, 3028 sizeof (ULP_SGE64)); 3029 3030 wqe->un.ElsCmd.PayloadLength = 3031 pkt->pkt_cmdlen; /* Byte offset of rsp data */ 3032 3033 /* RSP payload */ 3034 sge = &stage_sge; 3035 sge->addrHigh = PADDR_HI(cp_resp->dmac_laddress); 3036 sge->addrLow = PADDR_LO(cp_resp->dmac_laddress); 3037 sge->length = pkt->pkt_rsplen; 3038 sge->offset = 0; 3039 sge->last = 1; 3040 /* Now sge is fully staged */ 3041 |
2997 sge = xp->SGList.virt; | 3042 sge = xrip->SGList.virt; |
2998 sge++; 2999 BE_SWAP32_BCOPY((uint8_t *)&stage_sge, (uint8_t *)sge, 3000 sizeof (ULP_SGE64)); 3001#ifdef DEBUG_ELS 3002 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 3003 "SGLaddr virt %p phys %p", | 3043 sge++; 3044 BE_SWAP32_BCOPY((uint8_t *)&stage_sge, (uint8_t *)sge, 3045 sizeof (ULP_SGE64)); 3046#ifdef DEBUG_ELS 3047 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 3048 "SGLaddr virt %p phys %p", |
3004 xp->SGList.virt, xp->SGList.phys); | 3049 xrip->SGList.virt, xrip->SGList.phys); |
3005 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 3006 "PAYLOAD virt %p phys %p", 3007 pkt->pkt_cmd, cp_cmd->dmac_laddress); | 3050 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 3051 "PAYLOAD virt %p phys %p", 3052 pkt->pkt_cmd, cp_cmd->dmac_laddress); |
3008 emlxs_data_dump(hba, "SGL", (uint32_t *)xp->SGList.virt, 12, 0); | 3053 emlxs_data_dump(port, "SGL", (uint32_t *)xrip->SGList.virt, 3054 12, 0); |
3009#endif 3010 3011 cmd = *((uint32_t *)pkt->pkt_cmd); 3012 cmd &= ELS_CMD_MASK; 3013 3014 switch (cmd) { 3015 case ELS_CMD_FLOGI: 3016 wqe->un.ElsCmd.SP = 1; | 3055#endif 3056 3057 cmd = *((uint32_t *)pkt->pkt_cmd); 3058 cmd &= ELS_CMD_MASK; 3059 3060 switch (cmd) { 3061 case ELS_CMD_FLOGI: 3062 wqe->un.ElsCmd.SP = 1; |
3017 wqe->ContextTag = fp->FCFI; | 3063 wqe->ContextTag = fcfp->FCFI; |
3018 wqe->ContextType = WQE_FCFI_CONTEXT; 3019 if (hba->flag & FC_FIP_SUPPORTED) { 3020 wqe->CmdType |= WQE_TYPE_MASK_FIP; 3021 wqe->ELSId |= WQE_ELSID_FLOGI; 3022 } 3023 break; 3024 case ELS_CMD_FDISC: 3025 wqe->un.ElsCmd.SP = 1; | 3064 wqe->ContextType = WQE_FCFI_CONTEXT; 3065 if (hba->flag & FC_FIP_SUPPORTED) { 3066 wqe->CmdType |= WQE_TYPE_MASK_FIP; 3067 wqe->ELSId |= WQE_ELSID_FLOGI; 3068 } 3069 break; 3070 case ELS_CMD_FDISC: 3071 wqe->un.ElsCmd.SP = 1; |
3026 wqe->ContextTag = port->vpi + hba->vpi_base; | 3072 wqe->ContextTag = port->VPIobj.VPI; |
3027 wqe->ContextType = WQE_VPI_CONTEXT; 3028 if (hba->flag & FC_FIP_SUPPORTED) { 3029 wqe->CmdType |= WQE_TYPE_MASK_FIP; 3030 wqe->ELSId |= WQE_ELSID_FDISC; 3031 } 3032 break; 3033 case ELS_CMD_LOGO: | 3073 wqe->ContextType = WQE_VPI_CONTEXT; 3074 if (hba->flag & FC_FIP_SUPPORTED) { 3075 wqe->CmdType |= WQE_TYPE_MASK_FIP; 3076 wqe->ELSId |= WQE_ELSID_FDISC; 3077 } 3078 break; 3079 case ELS_CMD_LOGO: |
3034 wqe->ContextTag = port->vpi + hba->vpi_base; 3035 wqe->ContextType = WQE_VPI_CONTEXT; 3036 if ((hba->flag & FC_FIP_SUPPORTED) && 3037 (did == FABRIC_DID)) { 3038 wqe->CmdType |= WQE_TYPE_MASK_FIP; 3039 wqe->ELSId |= WQE_ELSID_LOGO; | 3080 if (did == FABRIC_DID) { 3081 wqe->ContextTag = fcfp->FCFI; 3082 wqe->ContextType = WQE_FCFI_CONTEXT; 3083 if (hba->flag & FC_FIP_SUPPORTED) { 3084 wqe->CmdType |= WQE_TYPE_MASK_FIP; 3085 wqe->ELSId |= WQE_ELSID_LOGO; 3086 } 3087 } else { 3088 wqe->ContextTag = port->VPIobj.VPI; 3089 wqe->ContextType = WQE_VPI_CONTEXT; |
3040 } 3041 break; 3042 3043 case ELS_CMD_SCR: 3044 case ELS_CMD_PLOGI: 3045 case ELS_CMD_PRLI: 3046 default: | 3090 } 3091 break; 3092 3093 case ELS_CMD_SCR: 3094 case ELS_CMD_PLOGI: 3095 case ELS_CMD_PRLI: 3096 default: |
3047 wqe->ContextTag = port->vpi + hba->vpi_base; | 3097 wqe->ContextTag = port->VPIobj.VPI; |
3048 wqe->ContextType = WQE_VPI_CONTEXT; 3049 break; 3050 } 3051 wqe->un.ElsCmd.RemoteId = did; 3052 wqe->Timer = ((pkt->pkt_timeout > 0xff) ? 0 : pkt->pkt_timeout); 3053 } 3054 3055 offset = (off_t)((uint64_t)((unsigned long) | 3098 wqe->ContextType = WQE_VPI_CONTEXT; 3099 break; 3100 } 3101 wqe->un.ElsCmd.RemoteId = did; 3102 wqe->Timer = ((pkt->pkt_timeout > 0xff) ? 0 : pkt->pkt_timeout); 3103 } 3104 3105 offset = (off_t)((uint64_t)((unsigned long) |
3056 xp->SGList.virt) - | 3106 xrip->SGList.virt) - |
3057 (uint64_t)((unsigned long) 3058 hba->sli.sli4.slim2.virt)); 3059 | 3107 (uint64_t)((unsigned long) 3108 hba->sli.sli4.slim2.virt)); 3109 |
3060 EMLXS_MPDATA_SYNC(xp->SGList.dma_handle, offset, 3061 xp->SGList.size, DDI_DMA_SYNC_FORDEV); | 3110 EMLXS_MPDATA_SYNC(xrip->SGList.dma_handle, offset, 3111 xrip->SGList.size, DDI_DMA_SYNC_FORDEV); |
3062 3063 if (pkt->pkt_cmd_fhdr.f_ctl & F_CTL_CHAINED_SEQ) { 3064 wqe->CCPE = 1; 3065 wqe->CCP = pkt->pkt_cmd_fhdr.rsvd; 3066 } 3067 3068 switch (FC_TRAN_CLASS(pkt->pkt_tran_flags)) { 3069 case FC_TRAN_CLASS2: 3070 wqe->Class = CLASS2; 3071 break; 3072 case FC_TRAN_CLASS3: 3073 default: 3074 wqe->Class = CLASS3; 3075 break; 3076 } 3077 sbp->class = wqe->Class; | 3112 3113 if (pkt->pkt_cmd_fhdr.f_ctl & F_CTL_CHAINED_SEQ) { 3114 wqe->CCPE = 1; 3115 wqe->CCP = pkt->pkt_cmd_fhdr.rsvd; 3116 } 3117 3118 switch (FC_TRAN_CLASS(pkt->pkt_tran_flags)) { 3119 case FC_TRAN_CLASS2: 3120 wqe->Class = CLASS2; 3121 break; 3122 case FC_TRAN_CLASS3: 3123 default: 3124 wqe->Class = CLASS3; 3125 break; 3126 } 3127 sbp->class = wqe->Class; |
3078 wqe->XRITag = xp->XRI; 3079 wqe->RequestTag = xp->iotag; | 3128 wqe->XRITag = xrip->XRI; 3129 wqe->RequestTag = xrip->iotag; |
3080 wqe->CQId = 0x3ff; 3081 return (FC_SUCCESS); 3082 3083} /* emlxs_sli4_prep_els_iocb() */ 3084 3085 3086/*ARGSUSED*/ 3087static uint32_t 3088emlxs_sli4_prep_ct_iocb(emlxs_port_t *port, emlxs_buf_t *sbp) 3089{ 3090 emlxs_hba_t *hba = HBA; 3091 fc_packet_t *pkt; 3092 IOCBQ *iocbq; 3093 IOCB *iocb; 3094 emlxs_wqe_t *wqe; 3095 NODELIST *node = NULL; 3096 CHANNEL *cp; | 3130 wqe->CQId = 0x3ff; 3131 return (FC_SUCCESS); 3132 3133} /* emlxs_sli4_prep_els_iocb() */ 3134 3135 3136/*ARGSUSED*/ 3137static uint32_t 3138emlxs_sli4_prep_ct_iocb(emlxs_port_t *port, emlxs_buf_t *sbp) 3139{ 3140 emlxs_hba_t *hba = HBA; 3141 fc_packet_t *pkt; 3142 IOCBQ *iocbq; 3143 IOCB *iocb; 3144 emlxs_wqe_t *wqe; 3145 NODELIST *node = NULL; 3146 CHANNEL *cp; |
3097 RPIobj_t *rp; 3098 XRIobj_t *xp; | 3147 RPIobj_t *rpip; 3148 XRIobj_t *xrip; |
3099 uint32_t did; 3100 off_t offset; 3101 3102 pkt = PRIV2PKT(sbp); 3103 did = LE_SWAP24_LO(pkt->pkt_cmd_fhdr.d_id); 3104 3105 iocbq = &sbp->iocbq; 3106 wqe = &iocbq->wqe; --- 8 unchanged lines hidden (view full) --- 3115 3116 sbp->bmp = NULL; 3117 sbp->channel = cp; 3118 3119 /* Initalize wqe */ 3120 if (pkt->pkt_tran_type == FC_PKT_OUTBOUND) { 3121 /* CT Response */ 3122 | 3149 uint32_t did; 3150 off_t offset; 3151 3152 pkt = PRIV2PKT(sbp); 3153 did = LE_SWAP24_LO(pkt->pkt_cmd_fhdr.d_id); 3154 3155 iocbq = &sbp->iocbq; 3156 wqe = &iocbq->wqe; --- 8 unchanged lines hidden (view full) --- 3165 3166 sbp->bmp = NULL; 3167 sbp->channel = cp; 3168 3169 /* Initalize wqe */ 3170 if (pkt->pkt_tran_type == FC_PKT_OUTBOUND) { 3171 /* CT Response */ 3172 |
3123 xp = emlxs_sli4_register_xri(hba, sbp, pkt->pkt_cmd_fhdr.rx_id); | 3173 xrip = emlxs_sli4_register_xri(hba, sbp, 3174 pkt->pkt_cmd_fhdr.rx_id); |
3124 | 3175 |
3125 if (!xp) { | 3176 if (!xrip) { |
3126 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_pkt_trans_failed_msg, 3127 "Unable to find XRI. rxid=%x", 3128 pkt->pkt_cmd_fhdr.rx_id); 3129 3130 emlxs_set_pkt_state(sbp, IOSTAT_LOCAL_REJECT, 3131 IOERR_NO_XRI, 0); 3132 return (0xff); 3133 } 3134 | 3177 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_pkt_trans_failed_msg, 3178 "Unable to find XRI. rxid=%x", 3179 pkt->pkt_cmd_fhdr.rx_id); 3180 3181 emlxs_set_pkt_state(sbp, IOSTAT_LOCAL_REJECT, 3182 IOERR_NO_XRI, 0); 3183 return (0xff); 3184 } 3185 |
3135 rp = xp->RPIp; | 3186 rpip = xrip->rpip; |
3136 | 3187 |
3137 if (!rp) { | 3188 if (!rpip) { |
3138 /* This means that we had a node registered */ 3139 /* when the unsol request came in but the node */ 3140 /* has since been unregistered. */ 3141 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_pkt_trans_failed_msg, 3142 "Unable to find RPI. rxid=%x", 3143 pkt->pkt_cmd_fhdr.rx_id); 3144 3145 emlxs_set_pkt_state(sbp, IOSTAT_LOCAL_REJECT, 3146 IOERR_INVALID_RPI, 0); 3147 return (0xff); 3148 } 3149 3150 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, | 3189 /* This means that we had a node registered */ 3190 /* when the unsol request came in but the node */ 3191 /* has since been unregistered. */ 3192 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_pkt_trans_failed_msg, 3193 "Unable to find RPI. rxid=%x", 3194 pkt->pkt_cmd_fhdr.rx_id); 3195 3196 emlxs_set_pkt_state(sbp, IOSTAT_LOCAL_REJECT, 3197 IOERR_INVALID_RPI, 0); 3198 return (0xff); 3199 } 3200 3201 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, |
3151 "Prep CT XRI: xri=%x iotag=%x oxid=%x", xp->XRI, 3152 xp->iotag, xp->rx_id); | 3202 "Prep CT XRI: xri=%x iotag=%x oxid=%x", xrip->XRI, 3203 xrip->iotag, xrip->rx_id); |
3153 3154 if (emlxs_sli4_bde_setup(port, sbp)) { 3155 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_pkt_trans_msg, 3156 "Adapter Busy. Unable to setup SGE. did=0x%x", did); 3157 3158 return (FC_TRAN_BUSY); 3159 } 3160 --- 7 unchanged lines hidden (view full) --- 3168 3169 if (pkt->pkt_cmd_fhdr.f_ctl & F_CTL_SEQ_INITIATIVE) { 3170 wqe->un.XmitSeq.si = 1; 3171 } 3172 3173 wqe->un.XmitSeq.DFctl = pkt->pkt_cmd_fhdr.df_ctl; 3174 wqe->un.XmitSeq.Rctl = pkt->pkt_cmd_fhdr.r_ctl; 3175 wqe->un.XmitSeq.Type = pkt->pkt_cmd_fhdr.type; | 3204 3205 if (emlxs_sli4_bde_setup(port, sbp)) { 3206 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_pkt_trans_msg, 3207 "Adapter Busy. Unable to setup SGE. did=0x%x", did); 3208 3209 return (FC_TRAN_BUSY); 3210 } 3211 --- 7 unchanged lines hidden (view full) --- 3219 3220 if (pkt->pkt_cmd_fhdr.f_ctl & F_CTL_SEQ_INITIATIVE) { 3221 wqe->un.XmitSeq.si = 1; 3222 } 3223 3224 wqe->un.XmitSeq.DFctl = pkt->pkt_cmd_fhdr.df_ctl; 3225 wqe->un.XmitSeq.Rctl = pkt->pkt_cmd_fhdr.r_ctl; 3226 wqe->un.XmitSeq.Type = pkt->pkt_cmd_fhdr.type; |
3176 wqe->OXId = xp->rx_id; | 3227 wqe->OXId = xrip->rx_id; |
3177 wqe->XC = 0; /* xri_tag is a new exchange */ 3178 wqe->CmdSpecific[0] = wqe->un.GenReq.Payload.tus.f.bdeSize; 3179 3180 } else { 3181 /* CT Request */ 3182 3183 node = (emlxs_node_t *)iocbq->node; | 3228 wqe->XC = 0; /* xri_tag is a new exchange */ 3229 wqe->CmdSpecific[0] = wqe->un.GenReq.Payload.tus.f.bdeSize; 3230 3231 } else { 3232 /* CT Request */ 3233 3234 node = (emlxs_node_t *)iocbq->node; |
3184 rp = EMLXS_NODE_TO_RPI(hba, node); | 3235 rpip = EMLXS_NODE_TO_RPI(port, node); |
3185 | 3236 |
3186 if (!rp) { | 3237 if (!rpip) { |
3187 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_pkt_trans_failed_msg, | 3238 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_pkt_trans_failed_msg, |
3188 "Unable to find rpi. did=0x%x", did); | 3239 "Unable to find rpi. did=0x%x rpi=%x", 3240 did, node->nlp_Rpi); |
3189 3190 emlxs_set_pkt_state(sbp, IOSTAT_LOCAL_REJECT, 3191 IOERR_INVALID_RPI, 0); 3192 return (0xff); 3193 } 3194 3195 /* Next allocate an Exchange for this command */ | 3241 3242 emlxs_set_pkt_state(sbp, IOSTAT_LOCAL_REJECT, 3243 IOERR_INVALID_RPI, 0); 3244 return (0xff); 3245 } 3246 3247 /* Next allocate an Exchange for this command */ |
3196 xp = emlxs_sli4_alloc_xri(hba, sbp, rp); | 3248 xrip = emlxs_sli4_alloc_xri(hba, sbp, rpip); |
3197 | 3249 |
3198 if (!xp) { | 3250 if (!xrip) { |
3199 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_pkt_trans_msg, | 3251 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_pkt_trans_msg, |
3200 "Adapter Busy. Unable to allocate exchange. " \ | 3252 "Adapter Busy. Unable to allocate exchange. " |
3201 "did=0x%x", did); 3202 3203 return (FC_TRAN_BUSY); 3204 } 3205 3206 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, | 3253 "did=0x%x", did); 3254 3255 return (FC_TRAN_BUSY); 3256 } 3257 3258 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, |
3207 "Prep CT XRI: %x iotag %x", xp->XRI, xp->iotag); | 3259 "Prep CT XRI: %x iotag %x", xrip->XRI, xrip->iotag); |
3208 3209 if (emlxs_sli4_bde_setup(port, sbp)) { 3210 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_pkt_trans_msg, 3211 "Adapter Busy. Unable to setup SGE. did=0x%x", did); 3212 | 3260 3261 if (emlxs_sli4_bde_setup(port, sbp)) { 3262 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_pkt_trans_msg, 3263 "Adapter Busy. Unable to setup SGE. did=0x%x", did); 3264 |
3213 emlxs_sli4_free_xri(hba, sbp, xp); | 3265 emlxs_sli4_free_xri(hba, sbp, xrip, 1); |
3214 return (FC_TRAN_BUSY); 3215 } 3216 3217 wqe->CmdType = WQE_TYPE_GEN; 3218 wqe->Command = CMD_GEN_REQUEST64_CR; 3219 wqe->un.GenReq.la = 1; 3220 wqe->un.GenReq.DFctl = pkt->pkt_cmd_fhdr.df_ctl; 3221 wqe->un.GenReq.Rctl = pkt->pkt_cmd_fhdr.r_ctl; 3222 wqe->un.GenReq.Type = pkt->pkt_cmd_fhdr.type; 3223 wqe->Timer = ((pkt->pkt_timeout > 0xff) ? 0 : pkt->pkt_timeout); 3224 3225#ifdef DEBUG_CT 3226 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, | 3266 return (FC_TRAN_BUSY); 3267 } 3268 3269 wqe->CmdType = WQE_TYPE_GEN; 3270 wqe->Command = CMD_GEN_REQUEST64_CR; 3271 wqe->un.GenReq.la = 1; 3272 wqe->un.GenReq.DFctl = pkt->pkt_cmd_fhdr.df_ctl; 3273 wqe->un.GenReq.Rctl = pkt->pkt_cmd_fhdr.r_ctl; 3274 wqe->un.GenReq.Type = pkt->pkt_cmd_fhdr.type; 3275 wqe->Timer = ((pkt->pkt_timeout > 0xff) ? 0 : pkt->pkt_timeout); 3276 3277#ifdef DEBUG_CT 3278 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, |
3227 "SGLaddr virt %p phys %p", xp->SGList.virt, 3228 xp->SGList.phys); 3229 emlxs_data_dump(hba, "SGL", (uint32_t *)xp->SGList.virt, 12, 0); | 3279 "SGLaddr virt %p phys %p", xrip->SGList.virt, 3280 xrip->SGList.phys); 3281 emlxs_data_dump(port, "SGL", (uint32_t *)xrip->SGList.virt, 3282 12, 0); |
3230 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 3231 "CMD virt %p len %d:%d", 3232 pkt->pkt_cmd, pkt->pkt_cmdlen, pkt->pkt_rsplen); | 3283 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 3284 "CMD virt %p len %d:%d", 3285 pkt->pkt_cmd, pkt->pkt_cmdlen, pkt->pkt_rsplen); |
3233 emlxs_data_dump(hba, "DATA", (uint32_t *)pkt->pkt_cmd, 20, 0); | 3286 emlxs_data_dump(port, "DATA", (uint32_t *)pkt->pkt_cmd, 20, 0); |
3234#endif /* DEBUG_CT */ 3235 } 3236 3237 /* Setup for rsp */ 3238 iocb->un.genreq64.w5.hcsw.Rctl = pkt->pkt_cmd_fhdr.r_ctl; 3239 iocb->un.genreq64.w5.hcsw.Type = pkt->pkt_cmd_fhdr.type; 3240 iocb->un.genreq64.w5.hcsw.Dfctl = pkt->pkt_cmd_fhdr.df_ctl; 3241 iocb->ULPPU = 1; /* Wd4 is relative offset */ 3242 3243 offset = (off_t)((uint64_t)((unsigned long) | 3287#endif /* DEBUG_CT */ 3288 } 3289 3290 /* Setup for rsp */ 3291 iocb->un.genreq64.w5.hcsw.Rctl = pkt->pkt_cmd_fhdr.r_ctl; 3292 iocb->un.genreq64.w5.hcsw.Type = pkt->pkt_cmd_fhdr.type; 3293 iocb->un.genreq64.w5.hcsw.Dfctl = pkt->pkt_cmd_fhdr.df_ctl; 3294 iocb->ULPPU = 1; /* Wd4 is relative offset */ 3295 3296 offset = (off_t)((uint64_t)((unsigned long) |
3244 xp->SGList.virt) - | 3297 xrip->SGList.virt) - |
3245 (uint64_t)((unsigned long) 3246 hba->sli.sli4.slim2.virt)); 3247 | 3298 (uint64_t)((unsigned long) 3299 hba->sli.sli4.slim2.virt)); 3300 |
3248 EMLXS_MPDATA_SYNC(xp->SGList.dma_handle, offset, 3249 xp->SGList.size, DDI_DMA_SYNC_FORDEV); | 3301 EMLXS_MPDATA_SYNC(xrip->SGList.dma_handle, offset, 3302 xrip->SGList.size, DDI_DMA_SYNC_FORDEV); |
3250 | 3303 |
3251 wqe->ContextTag = rp->RPI; | 3304 wqe->ContextTag = rpip->RPI; |
3252 wqe->ContextType = WQE_RPI_CONTEXT; | 3305 wqe->ContextType = WQE_RPI_CONTEXT; |
3253 wqe->XRITag = xp->XRI; | 3306 wqe->XRITag = xrip->XRI; |
3254 3255 if (pkt->pkt_cmd_fhdr.f_ctl & F_CTL_CHAINED_SEQ) { 3256 wqe->CCPE = 1; 3257 wqe->CCP = pkt->pkt_cmd_fhdr.rsvd; 3258 } 3259 3260 switch (FC_TRAN_CLASS(pkt->pkt_tran_flags)) { 3261 case FC_TRAN_CLASS2: 3262 wqe->Class = CLASS2; 3263 break; 3264 case FC_TRAN_CLASS3: 3265 default: 3266 wqe->Class = CLASS3; 3267 break; 3268 } 3269 sbp->class = wqe->Class; | 3307 3308 if (pkt->pkt_cmd_fhdr.f_ctl & F_CTL_CHAINED_SEQ) { 3309 wqe->CCPE = 1; 3310 wqe->CCP = pkt->pkt_cmd_fhdr.rsvd; 3311 } 3312 3313 switch (FC_TRAN_CLASS(pkt->pkt_tran_flags)) { 3314 case FC_TRAN_CLASS2: 3315 wqe->Class = CLASS2; 3316 break; 3317 case FC_TRAN_CLASS3: 3318 default: 3319 wqe->Class = CLASS3; 3320 break; 3321 } 3322 sbp->class = wqe->Class; |
3270 wqe->RequestTag = xp->iotag; | 3323 wqe->RequestTag = xrip->iotag; |
3271 wqe->CQId = 0x3ff; 3272 return (FC_SUCCESS); 3273 3274} /* emlxs_sli4_prep_ct_iocb() */ 3275 3276 3277/*ARGSUSED*/ 3278static int | 3324 wqe->CQId = 0x3ff; 3325 return (FC_SUCCESS); 3326 3327} /* emlxs_sli4_prep_ct_iocb() */ 3328 3329 3330/*ARGSUSED*/ 3331static int |
3279emlxs_sli4_poll_eq(emlxs_hba_t *hba, EQ_DESC_t *eq) | 3332emlxs_sli4_read_eq(emlxs_hba_t *hba, EQ_DESC_t *eq) |
3280{ 3281 uint32_t *ptr; | 3333{ 3334 uint32_t *ptr; |
3282 int num_entries = 0; | |
3283 EQE_u eqe; | 3335 EQE_u eqe; |
3284 uint32_t host_index, shost_index; | |
3285 int rc = 0; 3286 off_t offset; 3287 3288 /* EMLXS_PORT_LOCK must be held when entering this routine */ 3289 ptr = eq->addr.virt; 3290 ptr += eq->host_index; | 3336 int rc = 0; 3337 off_t offset; 3338 3339 /* EMLXS_PORT_LOCK must be held when entering this routine */ 3340 ptr = eq->addr.virt; 3341 ptr += eq->host_index; |
3291 host_index = eq->host_index; | |
3292 | 3342 |
3293 shost_index = host_index; 3294 | |
3295 offset = (off_t)((uint64_t)((unsigned long) 3296 eq->addr.virt) - 3297 (uint64_t)((unsigned long) 3298 hba->sli.sli4.slim2.virt)); 3299 3300 EMLXS_MPDATA_SYNC(eq->addr.dma_handle, offset, 3301 4096, DDI_DMA_SYNC_FORKERNEL); 3302 3303 mutex_enter(&EMLXS_PORT_LOCK); 3304 | 3343 offset = (off_t)((uint64_t)((unsigned long) 3344 eq->addr.virt) - 3345 (uint64_t)((unsigned long) 3346 hba->sli.sli4.slim2.virt)); 3347 3348 EMLXS_MPDATA_SYNC(eq->addr.dma_handle, offset, 3349 4096, DDI_DMA_SYNC_FORKERNEL); 3350 3351 mutex_enter(&EMLXS_PORT_LOCK); 3352 |
3305 for (;;) { 3306 eqe.word = *ptr; 3307 eqe.word = BE_SWAP32(eqe.word); | 3353 eqe.word = *ptr; 3354 eqe.word = BE_SWAP32(eqe.word); |
3308 | 3355 |
3309 if (eqe.word & EQE_VALID) { 3310 rc = 1; 3311 break; 3312 } 3313 3314 *ptr = 0; 3315 num_entries++; 3316 host_index++; 3317 if (host_index >= eq->max_index) { 3318 host_index = 0; 3319 ptr = eq->addr.virt; 3320 } else { 3321 ptr++; 3322 } 3323 3324 if (host_index == shost_index) { 3325 /* We donot need to loop forever */ 3326 break; 3327 } | 3356 if (eqe.word & EQE_VALID) { 3357 rc = 1; |
3328 } 3329 3330 mutex_exit(&EMLXS_PORT_LOCK); 3331 3332 return (rc); 3333 | 3358 } 3359 3360 mutex_exit(&EMLXS_PORT_LOCK); 3361 3362 return (rc); 3363 |
3334} /* emlxs_sli4_poll_eq */ | 3364} /* emlxs_sli4_read_eq */ |
3335 3336 3337/*ARGSUSED*/ 3338static void 3339emlxs_sli4_poll_intr(emlxs_hba_t *hba, uint32_t att_bit) 3340{ 3341 int rc = 0; 3342 int i; 3343 char arg[] = {0, 0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7}; 3344 char arg2; 3345 3346 /* 3347 * Poll the eqe to see if the valid bit is set or not 3348 */ 3349 3350 for (;;) { 3351 if (hba->intr_type == DDI_INTR_TYPE_FIXED) { 3352 /* only poll eqe0 */ | 3365 3366 3367/*ARGSUSED*/ 3368static void 3369emlxs_sli4_poll_intr(emlxs_hba_t *hba, uint32_t att_bit) 3370{ 3371 int rc = 0; 3372 int i; 3373 char arg[] = {0, 0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7}; 3374 char arg2; 3375 3376 /* 3377 * Poll the eqe to see if the valid bit is set or not 3378 */ 3379 3380 for (;;) { 3381 if (hba->intr_type == DDI_INTR_TYPE_FIXED) { 3382 /* only poll eqe0 */ |
3353 rc = emlxs_sli4_poll_eq(hba, | 3383 rc = emlxs_sli4_read_eq(hba, |
3354 &hba->sli.sli4.eq[0]); 3355 if (rc == 1) { 3356 (void) bcopy((char *)&arg[0], 3357 (char *)&arg2, sizeof (char)); 3358 break; 3359 } 3360 } else { 3361 /* poll every msi vector */ 3362 for (i = 0; i < hba->intr_count; i++) { | 3384 &hba->sli.sli4.eq[0]); 3385 if (rc == 1) { 3386 (void) bcopy((char *)&arg[0], 3387 (char *)&arg2, sizeof (char)); 3388 break; 3389 } 3390 } else { 3391 /* poll every msi vector */ 3392 for (i = 0; i < hba->intr_count; i++) { |
3363 rc = emlxs_sli4_poll_eq(hba, | 3393 rc = emlxs_sli4_read_eq(hba, |
3364 &hba->sli.sli4.eq[i]); 3365 3366 if (rc == 1) { 3367 break; 3368 } 3369 } 3370 if ((i != hba->intr_count) && (rc == 1)) { 3371 (void) bcopy((char *)&arg[i], --- 11 unchanged lines hidden (view full) --- 3383} /* emlxs_sli4_poll_intr() */ 3384 3385 3386/*ARGSUSED*/ 3387static void 3388emlxs_sli4_process_async_event(emlxs_hba_t *hba, CQE_ASYNC_t *cqe) 3389{ 3390 emlxs_port_t *port = &PPORT; | 3394 &hba->sli.sli4.eq[i]); 3395 3396 if (rc == 1) { 3397 break; 3398 } 3399 } 3400 if ((i != hba->intr_count) && (rc == 1)) { 3401 (void) bcopy((char *)&arg[i], --- 11 unchanged lines hidden (view full) --- 3413} /* emlxs_sli4_poll_intr() */ 3414 3415 3416/*ARGSUSED*/ 3417static void 3418emlxs_sli4_process_async_event(emlxs_hba_t *hba, CQE_ASYNC_t *cqe) 3419{ 3420 emlxs_port_t *port = &PPORT; |
3391 CQE_ASYNC_FCOE_t *fcoe; | |
3392 | 3421 |
3393 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 3394 "CQ ENTRY: process async event %d stat %d tag %d", 3395 cqe->event_code, cqe->link_status, cqe->event_tag); | 3422 /* Save the event tag */ 3423 hba->link_event_tag = cqe->un.link.event_tag; |
3396 | 3424 |
3397 hba->link_event_tag = cqe->event_tag; | |
3398 switch (cqe->event_code) { 3399 case ASYNC_EVENT_CODE_LINK_STATE: | 3425 switch (cqe->event_code) { 3426 case ASYNC_EVENT_CODE_LINK_STATE: |
3400 switch (cqe->link_status) { | 3427 switch (cqe->un.link.link_status) { |
3401 case ASYNC_EVENT_PHYS_LINK_UP: 3402 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, | 3428 case ASYNC_EVENT_PHYS_LINK_UP: 3429 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, |
3403 "Physical link up received"); | 3430 "Link Async Event: PHYS_LINK_UP. val=%d type=%x", 3431 cqe->valid, cqe->event_type); |
3404 break; 3405 3406 case ASYNC_EVENT_PHYS_LINK_DOWN: 3407 case ASYNC_EVENT_LOGICAL_LINK_DOWN: | 3432 break; 3433 3434 case ASYNC_EVENT_PHYS_LINK_DOWN: 3435 case ASYNC_EVENT_LOGICAL_LINK_DOWN: |
3408 if (hba->state > FC_LINK_DOWN) { 3409 (void) emlxs_fcf_unbind(hba, 3410 MAX_FCFCONNECTLIST_ENTRIES); 3411 } 3412 /* Log the link event */ 3413 emlxs_log_link_event(port); | 3436 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 3437 "Link Async Event: LINK_DOWN. val=%d type=%x", 3438 cqe->valid, cqe->event_type); 3439 3440 (void) emlxs_fcf_linkdown_notify(port); 3441 3442 mutex_enter(&EMLXS_PORT_LOCK); 3443 hba->sli.sli4.flag &= ~EMLXS_SLI4_DOWN_LINK; 3444 mutex_exit(&EMLXS_PORT_LOCK); |
3414 break; 3415 3416 case ASYNC_EVENT_LOGICAL_LINK_UP: | 3445 break; 3446 3447 case ASYNC_EVENT_LOGICAL_LINK_UP: |
3417 /* If link not already up then declare it up now */ 3418 if (hba->state < FC_LINK_UP) { 3419 if (cqe->port_speed == PHY_1GHZ_LINK) { 3420 hba->linkspeed = LA_1GHZ_LINK; 3421 } else { 3422 hba->linkspeed = LA_10GHZ_LINK; 3423 } 3424 hba->topology = TOPOLOGY_PT_PT; 3425 hba->qos_linkspeed = cqe->qos_link_speed; | 3448 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 3449 "Link Async Event: LOGICAL_LINK_UP. val=%d type=%x", 3450 cqe->valid, cqe->event_type); |
3426 | 3451 |
3427 /* 3428 * This link is not really up till we have 3429 * a valid FCF. 3430 */ 3431 (void) emlxs_fcf_bind(hba); | 3452 if (cqe->un.link.port_speed == PHY_1GHZ_LINK) { 3453 hba->linkspeed = LA_1GHZ_LINK; 3454 } else { 3455 hba->linkspeed = LA_10GHZ_LINK; |
3432 } | 3456 } |
3433 /* Log the link event */ 3434 emlxs_log_link_event(port); | 3457 hba->topology = TOPOLOGY_PT_PT; 3458 hba->qos_linkspeed = cqe->un.link.qos_link_speed; 3459 3460 (void) emlxs_fcf_linkup_notify(port); |
3435 break; 3436 } 3437 break; 3438 case ASYNC_EVENT_CODE_FCOE_FIP: | 3461 break; 3462 } 3463 break; 3464 case ASYNC_EVENT_CODE_FCOE_FIP: |
3439 fcoe = (CQE_ASYNC_FCOE_t *)cqe; 3440 switch (fcoe->evt_type) { | 3465 switch (cqe->un.fcoe.evt_type) { |
3441 case ASYNC_EVENT_NEW_FCF_DISC: 3442 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, | 3466 case ASYNC_EVENT_NEW_FCF_DISC: 3467 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, |
3443 "FCOE Async Event New FCF %d:%d: received ", 3444 fcoe->ref_index, fcoe->fcf_count); 3445 (void) emlxs_fcf_bind(hba); | 3468 "FCOE Async Event: FCF_FOUND %d:%d", 3469 cqe->un.fcoe.ref_index, cqe->un.fcoe.fcf_count); 3470 3471 (void) emlxs_fcf_found_notify(port, 3472 cqe->un.fcoe.ref_index); |
3446 break; 3447 case ASYNC_EVENT_FCF_TABLE_FULL: | 3473 break; 3474 case ASYNC_EVENT_FCF_TABLE_FULL: |
3448 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_err_msg, 3449 "FCOE Async Event FCF Table Full %d:%d: received ", 3450 fcoe->ref_index, fcoe->fcf_count); | 3475 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 3476 "FCOE Async Event: FCFTAB_FULL %d:%d", 3477 cqe->un.fcoe.ref_index, cqe->un.fcoe.fcf_count); 3478 3479 (void) emlxs_fcf_full_notify(port); |
3451 break; 3452 case ASYNC_EVENT_FCF_DEAD: 3453 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, | 3480 break; 3481 case ASYNC_EVENT_FCF_DEAD: 3482 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, |
3454 "FCOE Async Event FCF Disappeared %d:%d: received ", 3455 fcoe->ref_index, fcoe->fcf_count); 3456 (void) emlxs_reset_link(hba, 1, 0); | 3483 "FCOE Async Event: FCF_LOST %d:%d", 3484 cqe->un.fcoe.ref_index, cqe->un.fcoe.fcf_count); 3485 3486 (void) emlxs_fcf_lost_notify(port, 3487 cqe->un.fcoe.ref_index); |
3457 break; 3458 case ASYNC_EVENT_VIRT_LINK_CLEAR: 3459 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, | 3488 break; 3489 case ASYNC_EVENT_VIRT_LINK_CLEAR: 3490 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, |
3460 "FCOE Async Event VLINK CLEAR %d: received ", 3461 fcoe->ref_index); 3462 if (fcoe->ref_index == hba->vpi_base) { 3463 /* 3464 * Bounce the link to force rediscovery for 3465 * VPI 0. We are ignoring this event for 3466 * all other VPIs for now. 3467 */ 3468 (void) emlxs_reset_link(hba, 1, 0); 3469 } | 3491 "FCOE Async Event: CVL %d", 3492 cqe->un.fcoe.ref_index); 3493 3494 (void) emlxs_fcf_cvl_notify(port, 3495 (cqe->un.fcoe.ref_index - hba->vpi_base)); |
3470 break; | 3496 break; |
3497 3498 case ASYNC_EVENT_FCF_MODIFIED: 3499 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 3500 "FCOE Async Event: FCF_CHANGED %d", 3501 cqe->un.fcoe.ref_index); 3502 3503 (void) emlxs_fcf_changed_notify(port, 3504 cqe->un.fcoe.ref_index); 3505 break; |
|
3471 } 3472 break; 3473 case ASYNC_EVENT_CODE_DCBX: 3474 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, | 3506 } 3507 break; 3508 case ASYNC_EVENT_CODE_DCBX: 3509 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, |
3475 "DCBX Async Event Code %d: Not supported ", | 3510 "DCBX Async Event Code %d: Not supported", |
3476 cqe->event_code); 3477 break; | 3511 cqe->event_code); 3512 break; |
3513 case ASYNC_EVENT_CODE_GRP_5: 3514 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 3515 "Group 5 Async Event type %d", cqe->event_type); 3516 if (cqe->event_type == ASYNC_EVENT_QOS_SPEED) { 3517 hba->qos_linkspeed = cqe->un.qos.qos_link_speed; 3518 } 3519 break; |
|
3478 default: 3479 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 3480 "Unknown Async Event Code %d", cqe->event_code); 3481 break; 3482 } 3483 3484} /* emlxs_sli4_process_async_event() */ 3485 3486 3487/*ARGSUSED*/ 3488static void 3489emlxs_sli4_process_mbox_event(emlxs_hba_t *hba, CQE_MBOX_t *cqe) 3490{ 3491 emlxs_port_t *port = &PPORT; 3492 MAILBOX4 *mb; 3493 MATCHMAP *mbox_bp; 3494 MATCHMAP *mbox_nonembed; | 3520 default: 3521 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 3522 "Unknown Async Event Code %d", cqe->event_code); 3523 break; 3524 } 3525 3526} /* emlxs_sli4_process_async_event() */ 3527 3528 3529/*ARGSUSED*/ 3530static void 3531emlxs_sli4_process_mbox_event(emlxs_hba_t *hba, CQE_MBOX_t *cqe) 3532{ 3533 emlxs_port_t *port = &PPORT; 3534 MAILBOX4 *mb; 3535 MATCHMAP *mbox_bp; 3536 MATCHMAP *mbox_nonembed; |
3495 MAILBOXQ *mbq; | 3537 MAILBOXQ *mbq = NULL; |
3496 uint32_t size; 3497 uint32_t *iptr; 3498 int rc; 3499 off_t offset; 3500 | 3538 uint32_t size; 3539 uint32_t *iptr; 3540 int rc; 3541 off_t offset; 3542 |
3501 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 3502 "CQ ENTRY: process mbox event"); 3503 | |
3504 if (cqe->consumed && !cqe->completed) { 3505 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, | 3543 if (cqe->consumed && !cqe->completed) { 3544 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, |
3506 "CQ ENTRY: Entry comsumed but not completed"); | 3545 "CQ ENTRY: Mbox event. Entry consumed but not completed"); |
3507 return; 3508 } 3509 | 3546 return; 3547 } 3548 |
3549 mutex_enter(&EMLXS_PORT_LOCK); |
|
3510 switch (hba->mbox_queue_flag) { 3511 case 0: 3512 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_stray_mbox_intr_msg, | 3550 switch (hba->mbox_queue_flag) { 3551 case 0: 3552 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_stray_mbox_intr_msg, |
3513 "No mailbox active."); | 3553 "CQ ENTRY: Mbox event. No mailbox active."); 3554 3555 mutex_exit(&EMLXS_PORT_LOCK); |
3514 return; 3515 3516 case MBX_POLL: 3517 3518 /* Mark mailbox complete, this should wake up any polling */ 3519 /* threads. This can happen if interrupts are enabled while */ 3520 /* a polled mailbox command is outstanding. If we don't set */ 3521 /* MBQ_COMPLETED here, the polling thread may wait until */ 3522 /* timeout error occurs */ 3523 3524 mutex_enter(&EMLXS_MBOX_LOCK); 3525 mbq = (MAILBOXQ *)hba->mbox_mbq; 3526 if (mbq) { | 3556 return; 3557 3558 case MBX_POLL: 3559 3560 /* Mark mailbox complete, this should wake up any polling */ 3561 /* threads. This can happen if interrupts are enabled while */ 3562 /* a polled mailbox command is outstanding. If we don't set */ 3563 /* MBQ_COMPLETED here, the polling thread may wait until */ 3564 /* timeout error occurs */ 3565 3566 mutex_enter(&EMLXS_MBOX_LOCK); 3567 mbq = (MAILBOXQ *)hba->mbox_mbq; 3568 if (mbq) { |
3569 port = (emlxs_port_t *)mbq->port; |
|
3527 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_mbox_detail_msg, | 3570 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_mbox_detail_msg, |
3528 "Mailbox event. Completing Polled command."); | 3571 "CQ ENTRY: Mbox event. Completing Polled command."); |
3529 mbq->flag |= MBQ_COMPLETED; 3530 } 3531 mutex_exit(&EMLXS_MBOX_LOCK); 3532 | 3572 mbq->flag |= MBQ_COMPLETED; 3573 } 3574 mutex_exit(&EMLXS_MBOX_LOCK); 3575 |
3576 mutex_exit(&EMLXS_PORT_LOCK); |
|
3533 return; 3534 3535 case MBX_SLEEP: 3536 case MBX_NOWAIT: | 3577 return; 3578 3579 case MBX_SLEEP: 3580 case MBX_NOWAIT: |
3537 mutex_enter(&EMLXS_MBOX_LOCK); 3538 mbq = (MAILBOXQ *)hba->mbox_mbq; 3539 mutex_exit(&EMLXS_MBOX_LOCK); | 3581 /* Check mbox_timer, it acts as a service flag too */ 3582 /* The first to service the mbox queue will clear the timer */ 3583 if (hba->mbox_timer) { 3584 hba->mbox_timer = 0; 3585 3586 mutex_enter(&EMLXS_MBOX_LOCK); 3587 mbq = (MAILBOXQ *)hba->mbox_mbq; 3588 mutex_exit(&EMLXS_MBOX_LOCK); 3589 } 3590 3591 if (!mbq) { 3592 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_mbox_detail_msg, 3593 "Mailbox event. No service required."); 3594 mutex_exit(&EMLXS_PORT_LOCK); 3595 return; 3596 } 3597 |
3540 mb = (MAILBOX4 *)mbq; | 3598 mb = (MAILBOX4 *)mbq; |
3599 mutex_exit(&EMLXS_PORT_LOCK); |
|
3541 break; 3542 3543 default: 3544 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_mbox_completion_error_msg, | 3600 break; 3601 3602 default: 3603 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_mbox_completion_error_msg, |
3545 "Invalid Mailbox flag (%x)."); | 3604 "CQ ENTRY: Mbox event. Invalid Mailbox flag (%x).", 3605 hba->mbox_queue_flag); 3606 3607 mutex_exit(&EMLXS_PORT_LOCK); |
3546 return; 3547 } 3548 | 3608 return; 3609 } 3610 |
3611 /* Set port context */ 3612 port = (emlxs_port_t *)mbq->port; 3613 |
|
3549 offset = (off_t)((uint64_t)((unsigned long) 3550 hba->sli.sli4.mq.addr.virt) - 3551 (uint64_t)((unsigned long) 3552 hba->sli.sli4.slim2.virt)); 3553 3554 /* Now that we are the owner, DMA Sync entire MQ if needed */ 3555 EMLXS_MPDATA_SYNC(hba->sli.sli4.mq.addr.dma_handle, offset, 3556 4096, DDI_DMA_SYNC_FORDEV); 3557 3558 BE_SWAP32_BCOPY((uint8_t *)hba->mbox_mqe, (uint8_t *)mb, 3559 MAILBOX_CMD_SLI4_BSIZE); 3560 | 3614 offset = (off_t)((uint64_t)((unsigned long) 3615 hba->sli.sli4.mq.addr.virt) - 3616 (uint64_t)((unsigned long) 3617 hba->sli.sli4.slim2.virt)); 3618 3619 /* Now that we are the owner, DMA Sync entire MQ if needed */ 3620 EMLXS_MPDATA_SYNC(hba->sli.sli4.mq.addr.dma_handle, offset, 3621 4096, DDI_DMA_SYNC_FORDEV); 3622 3623 BE_SWAP32_BCOPY((uint8_t *)hba->mbox_mqe, (uint8_t *)mb, 3624 MAILBOX_CMD_SLI4_BSIZE); 3625 |
3561 emlxs_data_dump(hba, "MBOX CMP", (uint32_t *)hba->mbox_mqe, 12, 0); | 3626 if (mb->mbxCommand != MBX_HEARTBEAT) { 3627 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 3628 "CQ ENTRY: Mbox event. Mbox complete. status=%x cmd=%x", 3629 mb->mbxStatus, mb->mbxCommand); |
3562 | 3630 |
3563 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 3564 "Mbox cmpl: %x cmd: %x", mb->mbxStatus, mb->mbxCommand); | 3631 emlxs_data_dump(port, "MBOX CMP", (uint32_t *)hba->mbox_mqe, 3632 12, 0); 3633 } 3634 |
3565 if (mb->mbxCommand == MBX_SLI_CONFIG) { 3566 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 3567 "Mbox sge_cnt: %d length: %d embed: %d", 3568 mb->un.varSLIConfig.be.sge_cnt, 3569 mb->un.varSLIConfig.be.payload_length, 3570 mb->un.varSLIConfig.be.embedded); 3571 } 3572 --- 30 unchanged lines hidden (view full) --- 3603 EMLXS_MSGF(EMLXS_CONTEXT, 3604 &emlxs_invalid_dma_handle_msg, 3605 "emlxs_sli4_process_mbox_event: hdl=%p", 3606 mbox_nonembed->dma_handle); 3607 3608 mb->mbxStatus = MBXERR_DMA_ERROR; 3609 } 3610#endif | 3635 if (mb->mbxCommand == MBX_SLI_CONFIG) { 3636 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 3637 "Mbox sge_cnt: %d length: %d embed: %d", 3638 mb->un.varSLIConfig.be.sge_cnt, 3639 mb->un.varSLIConfig.be.payload_length, 3640 mb->un.varSLIConfig.be.embedded); 3641 } 3642 --- 30 unchanged lines hidden (view full) --- 3673 EMLXS_MSGF(EMLXS_CONTEXT, 3674 &emlxs_invalid_dma_handle_msg, 3675 "emlxs_sli4_process_mbox_event: hdl=%p", 3676 mbox_nonembed->dma_handle); 3677 3678 mb->mbxStatus = MBXERR_DMA_ERROR; 3679 } 3680#endif |
3611emlxs_data_dump(hba, "EXT AREA", (uint32_t *)iptr, 24, 0); | 3681emlxs_data_dump(port, "EXT AREA", (uint32_t *)iptr, 24, 0); |
3612 } 3613 3614 /* Mailbox has been completely received at this point */ 3615 3616 if (mb->mbxCommand == MBX_HEARTBEAT) { 3617 hba->heartbeat_active = 0; 3618 goto done; 3619 } --- 42 unchanged lines hidden (view full) --- 3662 emlxs_mb_fini(hba, (MAILBOX *)mb, mb->mbxStatus); 3663 3664 /* Attempt to send pending mailboxes */ 3665 mbq = (MAILBOXQ *)emlxs_mb_get(hba); 3666 if (mbq) { 3667 /* Attempt to send pending mailboxes */ 3668 rc = emlxs_sli4_issue_mbox_cmd(hba, mbq, MBX_NOWAIT, 0); 3669 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) { | 3682 } 3683 3684 /* Mailbox has been completely received at this point */ 3685 3686 if (mb->mbxCommand == MBX_HEARTBEAT) { 3687 hba->heartbeat_active = 0; 3688 goto done; 3689 } --- 42 unchanged lines hidden (view full) --- 3732 emlxs_mb_fini(hba, (MAILBOX *)mb, mb->mbxStatus); 3733 3734 /* Attempt to send pending mailboxes */ 3735 mbq = (MAILBOXQ *)emlxs_mb_get(hba); 3736 if (mbq) { 3737 /* Attempt to send pending mailboxes */ 3738 rc = emlxs_sli4_issue_mbox_cmd(hba, mbq, MBX_NOWAIT, 0); 3739 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) { |
3670 (void) emlxs_mem_put(hba, MEM_MBOX, (uint8_t *)mbq); | 3740 emlxs_mem_put(hba, MEM_MBOX, (void *)mbq); |
3671 } 3672 } 3673 return; 3674 3675} /* emlxs_sli4_process_mbox_event() */ 3676 3677 3678/*ARGSUSED*/ 3679static void 3680emlxs_CQE_to_IOCB(emlxs_hba_t *hba, CQE_CmplWQ_t *cqe, emlxs_buf_t *sbp) 3681{ 3682#ifdef SLI4_FASTPATH_DEBUG 3683 emlxs_port_t *port = &PPORT; 3684#endif 3685 IOCBQ *iocbq; 3686 IOCB *iocb; | 3741 } 3742 } 3743 return; 3744 3745} /* emlxs_sli4_process_mbox_event() */ 3746 3747 3748/*ARGSUSED*/ 3749static void 3750emlxs_CQE_to_IOCB(emlxs_hba_t *hba, CQE_CmplWQ_t *cqe, emlxs_buf_t *sbp) 3751{ 3752#ifdef SLI4_FASTPATH_DEBUG 3753 emlxs_port_t *port = &PPORT; 3754#endif 3755 IOCBQ *iocbq; 3756 IOCB *iocb; |
3757 uint32_t *iptr; 3758 fc_packet_t *pkt; |
|
3687 emlxs_wqe_t *wqe; 3688 3689 iocbq = &sbp->iocbq; 3690 wqe = &iocbq->wqe; 3691 iocb = &iocbq->iocb; 3692 3693#ifdef SLI4_FASTPATH_DEBUG 3694 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, --- 27 unchanged lines hidden (view full) --- 3722 break; 3723 3724 case CMD_ELS_REQUEST64_CR: 3725 iocb->ULPCOMMAND = CMD_ELS_REQUEST64_CX; 3726 iocb->un.elsreq64.bdl.bdeSize = cqe->CmdSpecific; 3727 if (iocb->ULPSTATUS == 0) { 3728 iocb->unsli3.ext_iocb.rsplen = cqe->CmdSpecific; 3729 } | 3759 emlxs_wqe_t *wqe; 3760 3761 iocbq = &sbp->iocbq; 3762 wqe = &iocbq->wqe; 3763 iocb = &iocbq->iocb; 3764 3765#ifdef SLI4_FASTPATH_DEBUG 3766 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, --- 27 unchanged lines hidden (view full) --- 3794 break; 3795 3796 case CMD_ELS_REQUEST64_CR: 3797 iocb->ULPCOMMAND = CMD_ELS_REQUEST64_CX; 3798 iocb->un.elsreq64.bdl.bdeSize = cqe->CmdSpecific; 3799 if (iocb->ULPSTATUS == 0) { 3800 iocb->unsli3.ext_iocb.rsplen = cqe->CmdSpecific; 3801 } |
3802 if (iocb->ULPSTATUS == IOSTAT_LS_RJT) { 3803 /* For LS_RJT, the driver populates the rsp buffer */ 3804 pkt = PRIV2PKT(sbp); 3805 iptr = (uint32_t *)pkt->pkt_resp; 3806 *iptr++ = ELS_CMD_LS_RJT; 3807 *iptr = cqe->Parameter; 3808 } |
|
3730 break; 3731 3732 case CMD_GEN_REQUEST64_CR: 3733 iocb->ULPCOMMAND = CMD_GEN_REQUEST64_CX; 3734 iocb->unsli3.ext_iocb.rsplen = cqe->CmdSpecific; 3735 break; 3736 3737 case CMD_XMIT_SEQUENCE64_CR: --- 15 unchanged lines hidden (view full) --- 3753#ifdef SFCT_SUPPORT 3754#ifdef FCT_IO_TRACE 3755 emlxs_port_t *port = &PPORT; 3756#endif /* FCT_IO_TRACE */ 3757#endif /* SFCT_SUPPORT */ 3758 CHANNEL *cp; 3759 emlxs_buf_t *sbp; 3760 IOCBQ *iocbq; | 3809 break; 3810 3811 case CMD_GEN_REQUEST64_CR: 3812 iocb->ULPCOMMAND = CMD_GEN_REQUEST64_CX; 3813 iocb->unsli3.ext_iocb.rsplen = cqe->CmdSpecific; 3814 break; 3815 3816 case CMD_XMIT_SEQUENCE64_CR: --- 15 unchanged lines hidden (view full) --- 3832#ifdef SFCT_SUPPORT 3833#ifdef FCT_IO_TRACE 3834 emlxs_port_t *port = &PPORT; 3835#endif /* FCT_IO_TRACE */ 3836#endif /* SFCT_SUPPORT */ 3837 CHANNEL *cp; 3838 emlxs_buf_t *sbp; 3839 IOCBQ *iocbq; |
3761 uint32_t i; | 3840 uint16_t i; |
3762 uint32_t trigger; 3763 CQE_CmplWQ_t cqe; 3764 3765 mutex_enter(&EMLXS_FCTAB_LOCK); 3766 for (i = 0; i < hba->max_iotag; i++) { 3767 sbp = hba->fc_table[i]; 3768 if (sbp == NULL || sbp == STALE_PACKET) { 3769 continue; 3770 } | 3841 uint32_t trigger; 3842 CQE_CmplWQ_t cqe; 3843 3844 mutex_enter(&EMLXS_FCTAB_LOCK); 3845 for (i = 0; i < hba->max_iotag; i++) { 3846 sbp = hba->fc_table[i]; 3847 if (sbp == NULL || sbp == STALE_PACKET) { 3848 continue; 3849 } |
3771 hba->fc_table[i] = NULL; | 3850 hba->fc_table[i] = STALE_PACKET; |
3772 hba->io_count--; | 3851 hba->io_count--; |
3852 sbp->iotag = 0; |
|
3773 mutex_exit(&EMLXS_FCTAB_LOCK); 3774 3775 cp = sbp->channel; 3776 bzero(&cqe, sizeof (CQE_CmplWQ_t)); 3777 cqe.RequestTag = i; 3778 cqe.Status = IOSTAT_LOCAL_REJECT; 3779 cqe.Parameter = IOERR_SEQUENCE_TIMEOUT; 3780 --- 11 unchanged lines hidden (view full) --- 3792 atomic_add_32(&hba->io_active, -1); 3793 3794 /* Copy entry to sbp's iocbq */ 3795 iocbq = &sbp->iocbq; 3796 emlxs_CQE_to_IOCB(hba, &cqe, sbp); 3797 3798 iocbq->next = NULL; 3799 | 3853 mutex_exit(&EMLXS_FCTAB_LOCK); 3854 3855 cp = sbp->channel; 3856 bzero(&cqe, sizeof (CQE_CmplWQ_t)); 3857 cqe.RequestTag = i; 3858 cqe.Status = IOSTAT_LOCAL_REJECT; 3859 cqe.Parameter = IOERR_SEQUENCE_TIMEOUT; 3860 --- 11 unchanged lines hidden (view full) --- 3872 atomic_add_32(&hba->io_active, -1); 3873 3874 /* Copy entry to sbp's iocbq */ 3875 iocbq = &sbp->iocbq; 3876 emlxs_CQE_to_IOCB(hba, &cqe, sbp); 3877 3878 iocbq->next = NULL; 3879 |
3800 sbp->xp->state &= ~RESOURCE_XRI_PENDING_IO; 3801 | |
3802 /* Exchange is no longer busy on-chip, free it */ | 3880 /* Exchange is no longer busy on-chip, free it */ |
3803 emlxs_sli4_free_xri(hba, sbp, sbp->xp); | 3881 emlxs_sli4_free_xri(hba, sbp, sbp->xrip, 1); |
3804 3805 if (!(sbp->pkt_flags & 3806 (PACKET_POLLED | PACKET_ALLOCATED))) { 3807 /* Add the IOCB to the channel list */ 3808 mutex_enter(&cp->rsp_lock); 3809 if (cp->rsp_head == NULL) { 3810 cp->rsp_head = iocbq; 3811 cp->rsp_tail = iocbq; --- 26 unchanged lines hidden (view full) --- 3838/*ARGSUSED*/ 3839static void 3840emlxs_sli4_process_oor_wqe_cmpl(emlxs_hba_t *hba, 3841 CQ_DESC_t *cq, CQE_CmplWQ_t *cqe) 3842{ 3843 emlxs_port_t *port = &PPORT; 3844 CHANNEL *cp; 3845 uint16_t request_tag; | 3882 3883 if (!(sbp->pkt_flags & 3884 (PACKET_POLLED | PACKET_ALLOCATED))) { 3885 /* Add the IOCB to the channel list */ 3886 mutex_enter(&cp->rsp_lock); 3887 if (cp->rsp_head == NULL) { 3888 cp->rsp_head = iocbq; 3889 cp->rsp_tail = iocbq; --- 26 unchanged lines hidden (view full) --- 3916/*ARGSUSED*/ 3917static void 3918emlxs_sli4_process_oor_wqe_cmpl(emlxs_hba_t *hba, 3919 CQ_DESC_t *cq, CQE_CmplWQ_t *cqe) 3920{ 3921 emlxs_port_t *port = &PPORT; 3922 CHANNEL *cp; 3923 uint16_t request_tag; |
3924 CQE_u *cq_entry; |
|
3846 3847 request_tag = cqe->RequestTag; 3848 | 3925 3926 request_tag = cqe->RequestTag; 3927 |
3928 cq_entry = (CQE_u *)cqe; 3929 |
|
3849 /* 1 to 1 mapping between CQ and channel */ 3850 cp = cq->channelp; 3851 3852 cp->hbaCmplCmd++; 3853 3854 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 3855 "CQ ENTRY: OOR Cmpl: tag=%x", request_tag); 3856 | 3930 /* 1 to 1 mapping between CQ and channel */ 3931 cp = cq->channelp; 3932 3933 cp->hbaCmplCmd++; 3934 3935 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 3936 "CQ ENTRY: OOR Cmpl: tag=%x", request_tag); 3937 |
3938 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 3939 "CQ ENTRY: %08x %08x %08x %08x", cq_entry->word[0], 3940 cq_entry->word[1], cq_entry->word[2], cq_entry->word[3]); 3941 |
|
3857} /* emlxs_sli4_process_oor_wqe_cmpl() */ 3858 3859 3860/*ARGSUSED*/ 3861static void 3862emlxs_sli4_process_wqe_cmpl(emlxs_hba_t *hba, CQ_DESC_t *cq, CQE_CmplWQ_t *cqe) 3863{ 3864 emlxs_port_t *port = &PPORT; --- 6 unchanged lines hidden (view full) --- 3871 emlxs_buf_t *cmd_sbp; 3872#endif /* SFCT_SUPPORT */ 3873 3874 request_tag = cqe->RequestTag; 3875 3876 /* 1 to 1 mapping between CQ and channel */ 3877 cp = cq->channelp; 3878 | 3942} /* emlxs_sli4_process_oor_wqe_cmpl() */ 3943 3944 3945/*ARGSUSED*/ 3946static void 3947emlxs_sli4_process_wqe_cmpl(emlxs_hba_t *hba, CQ_DESC_t *cq, CQE_CmplWQ_t *cqe) 3948{ 3949 emlxs_port_t *port = &PPORT; --- 6 unchanged lines hidden (view full) --- 3956 emlxs_buf_t *cmd_sbp; 3957#endif /* SFCT_SUPPORT */ 3958 3959 request_tag = cqe->RequestTag; 3960 3961 /* 1 to 1 mapping between CQ and channel */ 3962 cp = cq->channelp; 3963 |
3964 mutex_enter(&EMLXS_FCTAB_LOCK); |
|
3879 sbp = hba->fc_table[request_tag]; 3880 atomic_add_32(&hba->io_active, -1); 3881 3882 if (sbp == STALE_PACKET) { 3883 cp->hbaCmplCmd_sbp++; | 3965 sbp = hba->fc_table[request_tag]; 3966 atomic_add_32(&hba->io_active, -1); 3967 3968 if (sbp == STALE_PACKET) { 3969 cp->hbaCmplCmd_sbp++; |
3970 mutex_exit(&EMLXS_FCTAB_LOCK); |
|
3884 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 3885 "CQ ENTRY: Stale sbp. tag=%x. Dropping...", request_tag); 3886 return; 3887 } 3888 | 3971 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 3972 "CQ ENTRY: Stale sbp. tag=%x. Dropping...", request_tag); 3973 return; 3974 } 3975 |
3889 if (!sbp || !(sbp->xp)) { | 3976 if (!sbp || !(sbp->xrip)) { |
3890 cp->hbaCmplCmd++; | 3977 cp->hbaCmplCmd++; |
3978 mutex_exit(&EMLXS_FCTAB_LOCK); |
|
3891 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 3892 "CQ ENTRY: NULL sbp %p. tag=%x. Dropping...", 3893 sbp, request_tag); 3894 return; 3895 } 3896 3897#ifdef SLI4_FASTPATH_DEBUG 3898 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 3899 "CQ ENTRY: process wqe compl"); 3900#endif 3901 3902 cp->hbaCmplCmd_sbp++; 3903 | 3979 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 3980 "CQ ENTRY: NULL sbp %p. tag=%x. Dropping...", 3981 sbp, request_tag); 3982 return; 3983 } 3984 3985#ifdef SLI4_FASTPATH_DEBUG 3986 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 3987 "CQ ENTRY: process wqe compl"); 3988#endif 3989 3990 cp->hbaCmplCmd_sbp++; 3991 |
3904#ifdef SFCT_SUPPORT 3905 fct_cmd = sbp->fct_cmd; 3906 if (fct_cmd) { 3907 cmd_sbp = (emlxs_buf_t *)fct_cmd->cmd_fca_private; 3908 mutex_enter(&cmd_sbp->fct_mtx); 3909 EMLXS_FCT_STATE_CHG(fct_cmd, cmd_sbp, EMLXS_FCT_IOCB_COMPLETE); 3910 mutex_exit(&cmd_sbp->fct_mtx); 3911 } 3912#endif /* SFCT_SUPPORT */ 3913 | |
3914 /* Copy entry to sbp's iocbq */ 3915 iocbq = &sbp->iocbq; 3916 emlxs_CQE_to_IOCB(hba, cqe, sbp); 3917 3918 iocbq->next = NULL; 3919 | 3992 /* Copy entry to sbp's iocbq */ 3993 iocbq = &sbp->iocbq; 3994 emlxs_CQE_to_IOCB(hba, cqe, sbp); 3995 3996 iocbq->next = NULL; 3997 |
3920 sbp->xp->state &= ~RESOURCE_XRI_PENDING_IO; | |
3921 if (cqe->XB) { 3922 /* Mark exchange as ABORT in progress */ | 3998 if (cqe->XB) { 3999 /* Mark exchange as ABORT in progress */ |
3923 sbp->xp->state |= RESOURCE_XRI_ABORT_INP; | 4000 sbp->xrip->flag &= ~EMLXS_XRI_PENDING_IO; 4001 sbp->xrip->flag |= EMLXS_XRI_ABORT_INP; |
3924 3925 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 3926 "CQ ENTRY: ABORT INP: tag=%x xri=%x", request_tag, | 4002 4003 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 4004 "CQ ENTRY: ABORT INP: tag=%x xri=%x", request_tag, |
3927 sbp->xp->XRI); | 4005 sbp->xrip->XRI); |
3928 | 4006 |
3929 emlxs_sli4_free_xri(hba, sbp, 0); | 4007 emlxs_sli4_free_xri(hba, sbp, 0, 0); |
3930 } else { 3931 /* Exchange is no longer busy on-chip, free it */ | 4008 } else { 4009 /* Exchange is no longer busy on-chip, free it */ |
3932 emlxs_sli4_free_xri(hba, sbp, sbp->xp); | 4010 emlxs_sli4_free_xri(hba, sbp, sbp->xrip, 0); |
3933 } 3934 | 4011 } 4012 |
4013 mutex_exit(&EMLXS_FCTAB_LOCK); 4014 4015#ifdef SFCT_SUPPORT 4016 fct_cmd = sbp->fct_cmd; 4017 if (fct_cmd) { 4018 cmd_sbp = (emlxs_buf_t *)fct_cmd->cmd_fca_private; 4019 mutex_enter(&cmd_sbp->fct_mtx); 4020 EMLXS_FCT_STATE_CHG(fct_cmd, cmd_sbp, EMLXS_FCT_IOCB_COMPLETE); 4021 mutex_exit(&cmd_sbp->fct_mtx); 4022 } 4023#endif /* SFCT_SUPPORT */ 4024 |
|
3935 /* 3936 * If this is NOT a polled command completion 3937 * or a driver allocated pkt, then defer pkt 3938 * completion. 3939 */ 3940 if (!(sbp->pkt_flags & 3941 (PACKET_POLLED | PACKET_ALLOCATED))) { 3942 /* Add the IOCB to the channel list */ --- 149 unchanged lines hidden (view full) --- 4092 mutex_exit(&rxq->lock); 4093 4094 return; 4095 4096} /* emlxs_sli4_rxq_put() */ 4097 4098 4099static void | 4025 /* 4026 * If this is NOT a polled command completion 4027 * or a driver allocated pkt, then defer pkt 4028 * completion. 4029 */ 4030 if (!(sbp->pkt_flags & 4031 (PACKET_POLLED | PACKET_ALLOCATED))) { 4032 /* Add the IOCB to the channel list */ --- 149 unchanged lines hidden (view full) --- 4182 mutex_exit(&rxq->lock); 4183 4184 return; 4185 4186} /* emlxs_sli4_rxq_put() */ 4187 4188 4189static void |
4100emlxs_sli4_rq_post(emlxs_hba_t *hba, uint16_t rqid) | 4190emlxs_sli4_rq_post(emlxs_port_t *port, uint16_t rqid) |
4101{ | 4191{ |
4102 emlxs_port_t *port = &PPORT; | 4192 emlxs_hba_t *hba = HBA; |
4103 emlxs_rqdbu_t rqdb; 4104 4105 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 4106 "RQ POST: rqid=%d count=1", rqid); 4107 4108 /* Ring the RQ doorbell once to repost the RQ buffer */ 4109 rqdb.word = 0; 4110 rqdb.db.Qid = rqid; --- 26 unchanged lines hidden (view full) --- 4137 uint32_t i; 4138 uint32_t seq_len; 4139 uint32_t seq_cnt; 4140 uint32_t buf_type; 4141 char label[32]; 4142 emlxs_wqe_t *wqe; 4143 CHANNEL *cp; 4144 uint16_t iotag; | 4193 emlxs_rqdbu_t rqdb; 4194 4195 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 4196 "RQ POST: rqid=%d count=1", rqid); 4197 4198 /* Ring the RQ doorbell once to repost the RQ buffer */ 4199 rqdb.word = 0; 4200 rqdb.db.Qid = rqid; --- 26 unchanged lines hidden (view full) --- 4227 uint32_t i; 4228 uint32_t seq_len; 4229 uint32_t seq_cnt; 4230 uint32_t buf_type; 4231 char label[32]; 4232 emlxs_wqe_t *wqe; 4233 CHANNEL *cp; 4234 uint16_t iotag; |
4145 XRIobj_t *xp; 4146 RPIobj_t *rp = NULL; 4147 FCFIobj_t *fp; | 4235 XRIobj_t *xrip; 4236 RPIobj_t *rpip = NULL; |
4148 uint32_t cmd; 4149 uint32_t posted = 0; 4150 uint32_t abort = 1; 4151 off_t offset; 4152 4153 hdr_rqi = hba->sli.sli4.rq_map[cqe->RQid]; 4154 hdr_rq = &hba->sli.sli4.rq[hdr_rqi]; 4155 data_rq = &hba->sli.sli4.rq[hdr_rqi + 1]; 4156 4157 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, | 4237 uint32_t cmd; 4238 uint32_t posted = 0; 4239 uint32_t abort = 1; 4240 off_t offset; 4241 4242 hdr_rqi = hba->sli.sli4.rq_map[cqe->RQid]; 4243 hdr_rq = &hba->sli.sli4.rq[hdr_rqi]; 4244 data_rq = &hba->sli.sli4.rq[hdr_rqi + 1]; 4245 4246 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, |
4158 "CQ ENTRY: Unsol Rcv: RQid=%d,%d index=%d status=%x " \ | 4247 "CQ ENTRY: Unsol Rcv: RQid=%d,%d index=%d status=%x " |
4159 "hdr_size=%d data_size=%d", 4160 cqe->RQid, hdr_rqi, hdr_rq->host_index, cqe->Status, cqe->hdr_size, 4161 cqe->data_size); 4162 4163 /* Validate the CQE */ 4164 4165 /* Check status */ 4166 switch (cqe->Status) { --- 47 unchanged lines hidden (view full) --- 4214 4215 EMLXS_MPDATA_SYNC(hdr_mp->dma_handle, offset, 4216 sizeof (fc_frame_hdr_t), DDI_DMA_SYNC_FORKERNEL); 4217 4218 LE_SWAP32_BCOPY(hdr_mp->virt, (uint8_t *)&fchdr, 4219 sizeof (fc_frame_hdr_t)); 4220 4221 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, | 4248 "hdr_size=%d data_size=%d", 4249 cqe->RQid, hdr_rqi, hdr_rq->host_index, cqe->Status, cqe->hdr_size, 4250 cqe->data_size); 4251 4252 /* Validate the CQE */ 4253 4254 /* Check status */ 4255 switch (cqe->Status) { --- 47 unchanged lines hidden (view full) --- 4303 4304 EMLXS_MPDATA_SYNC(hdr_mp->dma_handle, offset, 4305 sizeof (fc_frame_hdr_t), DDI_DMA_SYNC_FORKERNEL); 4306 4307 LE_SWAP32_BCOPY(hdr_mp->virt, (uint8_t *)&fchdr, 4308 sizeof (fc_frame_hdr_t)); 4309 4310 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, |
4222 "RQ HDR[%d]: rctl:%x type:%x " \ | 4311 "RQ HDR[%d]: rctl:%x type:%x " |
4223 "sid:%x did:%x oxid:%x rxid:%x", 4224 host_index, fchdr.r_ctl, fchdr.type, 4225 fchdr.s_id, fchdr.d_id, fchdr.ox_id, fchdr.rx_id); 4226 4227 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 4228 "RQ HDR[%d]: fctl:%x seq_id:%x seq_cnt:%x df_ctl:%x ro:%x", 4229 host_index, fchdr.f_ctl, fchdr.seq_id, fchdr.seq_cnt, 4230 fchdr.df_ctl, fchdr.ro); 4231 4232 /* Verify fc header type */ 4233 switch (fchdr.type) { 4234 case 0: /* BLS */ 4235 if (fchdr.r_ctl != 0x81) { 4236 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, | 4312 "sid:%x did:%x oxid:%x rxid:%x", 4313 host_index, fchdr.r_ctl, fchdr.type, 4314 fchdr.s_id, fchdr.d_id, fchdr.ox_id, fchdr.rx_id); 4315 4316 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 4317 "RQ HDR[%d]: fctl:%x seq_id:%x seq_cnt:%x df_ctl:%x ro:%x", 4318 host_index, fchdr.f_ctl, fchdr.seq_id, fchdr.seq_cnt, 4319 fchdr.df_ctl, fchdr.ro); 4320 4321 /* Verify fc header type */ 4322 switch (fchdr.type) { 4323 case 0: /* BLS */ 4324 if (fchdr.r_ctl != 0x81) { 4325 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, |
4237 "RQ ENTRY: Unexpected FC rctl (0x%x) " \ | 4326 "RQ ENTRY: Unexpected FC rctl (0x%x) " |
4238 "received. Dropping...", 4239 fchdr.r_ctl); 4240 4241 goto done; 4242 } 4243 4244 /* Make sure there is no payload */ 4245 if (cqe->data_size != 0) { --- 7 unchanged lines hidden (view full) --- 4253 (void) strcpy(label, "ABTS"); 4254 cp = &hba->chan[hba->channel_els]; 4255 break; 4256 4257 case 0x01: /* ELS */ 4258 /* Make sure there is a payload */ 4259 if (cqe->data_size == 0) { 4260 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_err_msg, | 4327 "received. Dropping...", 4328 fchdr.r_ctl); 4329 4330 goto done; 4331 } 4332 4333 /* Make sure there is no payload */ 4334 if (cqe->data_size != 0) { --- 7 unchanged lines hidden (view full) --- 4342 (void) strcpy(label, "ABTS"); 4343 cp = &hba->chan[hba->channel_els]; 4344 break; 4345 4346 case 0x01: /* ELS */ 4347 /* Make sure there is a payload */ 4348 if (cqe->data_size == 0) { 4349 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_err_msg, |
4261 "RQ ENTRY: Unsol Rcv: No ELS payload provided. " \ | 4350 "RQ ENTRY: Unsol Rcv: No ELS payload provided. " |
4262 "Dropping..."); 4263 4264 goto done; 4265 } 4266 4267 buf_type = MEM_ELSBUF; 4268 (void) strcpy(label, "Unsol ELS"); 4269 cp = &hba->chan[hba->channel_els]; 4270 break; 4271 4272 case 0x20: /* CT */ 4273 /* Make sure there is a payload */ 4274 if (cqe->data_size == 0) { 4275 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_err_msg, | 4351 "Dropping..."); 4352 4353 goto done; 4354 } 4355 4356 buf_type = MEM_ELSBUF; 4357 (void) strcpy(label, "Unsol ELS"); 4358 cp = &hba->chan[hba->channel_els]; 4359 break; 4360 4361 case 0x20: /* CT */ 4362 /* Make sure there is a payload */ 4363 if (cqe->data_size == 0) { 4364 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_err_msg, |
4276 "RQ ENTRY: Unsol Rcv: No CT payload provided. " \ | 4365 "RQ ENTRY: Unsol Rcv: No CT payload provided. " |
4277 "Dropping..."); 4278 4279 goto done; 4280 } 4281 4282 buf_type = MEM_CTBUF; 4283 (void) strcpy(label, "Unsol CT"); 4284 cp = &hba->chan[hba->channel_ct]; --- 10 unchanged lines hidden (view full) --- 4295 4296 /* Check if this is an active sequence */ 4297 iocbq = emlxs_sli4_rxq_get(hba, &fchdr); 4298 4299 if (!iocbq) { 4300 if (fchdr.type != 0) { 4301 if (!(fchdr.f_ctl & F_CTL_FIRST_SEQ)) { 4302 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, | 4366 "Dropping..."); 4367 4368 goto done; 4369 } 4370 4371 buf_type = MEM_CTBUF; 4372 (void) strcpy(label, "Unsol CT"); 4373 cp = &hba->chan[hba->channel_ct]; --- 10 unchanged lines hidden (view full) --- 4384 4385 /* Check if this is an active sequence */ 4386 iocbq = emlxs_sli4_rxq_get(hba, &fchdr); 4387 4388 if (!iocbq) { 4389 if (fchdr.type != 0) { 4390 if (!(fchdr.f_ctl & F_CTL_FIRST_SEQ)) { 4391 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, |
4303 "RQ ENTRY: %s: First of sequence not" \ | 4392 "RQ ENTRY: %s: First of sequence not" |
4304 " set. Dropping...", 4305 label); 4306 4307 goto done; 4308 } 4309 } 4310 4311 if (fchdr.seq_cnt != 0) { 4312 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, | 4393 " set. Dropping...", 4394 label); 4395 4396 goto done; 4397 } 4398 } 4399 4400 if (fchdr.seq_cnt != 0) { 4401 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, |
4313 "RQ ENTRY: %s: Sequence count not zero (%d). " \ | 4402 "RQ ENTRY: %s: Sequence count not zero (%d). " |
4314 "Dropping...", 4315 label, fchdr.seq_cnt); 4316 4317 goto done; 4318 } 4319 4320 /* Find vport (defaults to physical port) */ 4321 for (i = 0; i < MAX_VPORTS; i++) { --- 6 unchanged lines hidden (view full) --- 4328 } 4329 4330 /* Allocate an IOCBQ */ 4331 iocbq = (emlxs_iocbq_t *)emlxs_mem_get(hba, 4332 MEM_IOCB, 1); 4333 4334 if (!iocbq) { 4335 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, | 4403 "Dropping...", 4404 label, fchdr.seq_cnt); 4405 4406 goto done; 4407 } 4408 4409 /* Find vport (defaults to physical port) */ 4410 for (i = 0; i < MAX_VPORTS; i++) { --- 6 unchanged lines hidden (view full) --- 4417 } 4418 4419 /* Allocate an IOCBQ */ 4420 iocbq = (emlxs_iocbq_t *)emlxs_mem_get(hba, 4421 MEM_IOCB, 1); 4422 4423 if (!iocbq) { 4424 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, |
4336 "RQ ENTRY: %s: Out of IOCB " \ | 4425 "RQ ENTRY: %s: Out of IOCB " |
4337 "resources. Dropping...", 4338 label); 4339 4340 goto done; 4341 } 4342 4343 seq_mp = NULL; 4344 if (fchdr.type != 0) { 4345 /* Allocate a buffer */ 4346 seq_mp = (MATCHMAP *)emlxs_mem_get(hba, buf_type, 1); 4347 4348 if (!seq_mp) { 4349 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, | 4426 "resources. Dropping...", 4427 label); 4428 4429 goto done; 4430 } 4431 4432 seq_mp = NULL; 4433 if (fchdr.type != 0) { 4434 /* Allocate a buffer */ 4435 seq_mp = (MATCHMAP *)emlxs_mem_get(hba, buf_type, 1); 4436 4437 if (!seq_mp) { 4438 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, |
4350 "RQ ENTRY: %s: Out of buffer " \ | 4439 "RQ ENTRY: %s: Out of buffer " |
4351 "resources. Dropping...", 4352 label); 4353 4354 goto done; 4355 } 4356 4357 iocbq->bp = (uint8_t *)seq_mp; 4358 } --- 25 unchanged lines hidden (view full) --- 4384 4385 seq_mp = (MATCHMAP *)iocbq->bp; 4386 seq_len = iocb->RXSEQLEN; 4387 seq_cnt = iocb->RXSEQCNT; 4388 4389 /* Check sequence order */ 4390 if (fchdr.seq_cnt != seq_cnt) { 4391 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, | 4440 "resources. Dropping...", 4441 label); 4442 4443 goto done; 4444 } 4445 4446 iocbq->bp = (uint8_t *)seq_mp; 4447 } --- 25 unchanged lines hidden (view full) --- 4473 4474 seq_mp = (MATCHMAP *)iocbq->bp; 4475 seq_len = iocb->RXSEQLEN; 4476 seq_cnt = iocb->RXSEQCNT; 4477 4478 /* Check sequence order */ 4479 if (fchdr.seq_cnt != seq_cnt) { 4480 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, |
4392 "RQ ENTRY: %s: Out of order frame received " \ | 4481 "RQ ENTRY: %s: Out of order frame received " |
4393 "(%d != %d). Dropping...", 4394 label, fchdr.seq_cnt, seq_cnt); 4395 4396 goto done; 4397 } 4398 } 4399 4400 /* We now have an iocbq */ 4401 | 4482 "(%d != %d). Dropping...", 4483 label, fchdr.seq_cnt, seq_cnt); 4484 4485 goto done; 4486 } 4487 } 4488 4489 /* We now have an iocbq */ 4490 |
4491 if (!port->VPIobj.vfip) { 4492 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 4493 "RQ ENTRY: %s: No fabric connection. " 4494 "Dropping...", 4495 label); 4496 4497 goto done; 4498 } 4499 |
|
4402 /* Save the frame data to our seq buffer */ 4403 if (cqe->data_size && seq_mp) { 4404 /* Get the next data rqb */ 4405 data_mp = &data_rq->rqb[host_index]; 4406 4407 offset = (off_t)((uint64_t)((unsigned long) 4408 data_mp->virt) - 4409 (uint64_t)((unsigned long) --- 7 unchanged lines hidden (view full) --- 4417 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 4418 "RQ DAT[%d]: %08x %08x %08x %08x %08x %08x ...", 4419 host_index, data[0], data[1], data[2], data[3], 4420 data[4], data[5]); 4421 4422 /* Check sequence length */ 4423 if ((seq_len + cqe->data_size) > seq_mp->size) { 4424 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_err_msg, | 4500 /* Save the frame data to our seq buffer */ 4501 if (cqe->data_size && seq_mp) { 4502 /* Get the next data rqb */ 4503 data_mp = &data_rq->rqb[host_index]; 4504 4505 offset = (off_t)((uint64_t)((unsigned long) 4506 data_mp->virt) - 4507 (uint64_t)((unsigned long) --- 7 unchanged lines hidden (view full) --- 4515 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 4516 "RQ DAT[%d]: %08x %08x %08x %08x %08x %08x ...", 4517 host_index, data[0], data[1], data[2], data[3], 4518 data[4], data[5]); 4519 4520 /* Check sequence length */ 4521 if ((seq_len + cqe->data_size) > seq_mp->size) { 4522 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_err_msg, |
4425 "RQ ENTRY: %s: Sequence buffer overflow. " \ | 4523 "RQ ENTRY: %s: Sequence buffer overflow. " |
4426 "(%d > %d). Dropping...", 4427 label, (seq_len + cqe->data_size), seq_mp->size); 4428 4429 goto done; 4430 } 4431 4432 /* Copy data to local receive buffer */ 4433 bcopy((uint8_t *)data, ((uint8_t *)seq_mp->virt + --- 21 unchanged lines hidden (view full) --- 4455 iocbq = NULL; 4456 4457 /* No need to abort */ 4458 abort = 0; 4459 4460 goto done; 4461 } 4462 | 4524 "(%d > %d). Dropping...", 4525 label, (seq_len + cqe->data_size), seq_mp->size); 4526 4527 goto done; 4528 } 4529 4530 /* Copy data to local receive buffer */ 4531 bcopy((uint8_t *)data, ((uint8_t *)seq_mp->virt + --- 21 unchanged lines hidden (view full) --- 4553 iocbq = NULL; 4554 4555 /* No need to abort */ 4556 abort = 0; 4557 4558 goto done; 4559 } 4560 |
4463 emlxs_sli4_rq_post(hba, hdr_rq->qid); | 4561 emlxs_sli4_rq_post(port, hdr_rq->qid); |
4464 posted = 1; 4465 4466 /* End of sequence found. Process request now. */ 4467 4468 if (seq_cnt > 0) { 4469 /* Retrieve first frame of sequence */ 4470 bcopy((uint8_t *)iocb->RXFCHDR, (uint8_t *)&fchdr, 4471 sizeof (fc_frame_hdr_t)); --- 36 unchanged lines hidden (view full) --- 4508 wqe->un.BlsRsp.SeqCntHigh = 0xFFFF; 4509 4510 wqe->un.BlsRsp.XO = 0; 4511 wqe->un.BlsRsp.AR = 0; 4512 wqe->un.BlsRsp.PT = 1; 4513 wqe->un.BlsRsp.RemoteId = fchdr.s_id; 4514 4515 wqe->PU = 0x3; | 4562 posted = 1; 4563 4564 /* End of sequence found. Process request now. */ 4565 4566 if (seq_cnt > 0) { 4567 /* Retrieve first frame of sequence */ 4568 bcopy((uint8_t *)iocb->RXFCHDR, (uint8_t *)&fchdr, 4569 sizeof (fc_frame_hdr_t)); --- 36 unchanged lines hidden (view full) --- 4606 wqe->un.BlsRsp.SeqCntHigh = 0xFFFF; 4607 4608 wqe->un.BlsRsp.XO = 0; 4609 wqe->un.BlsRsp.AR = 0; 4610 wqe->un.BlsRsp.PT = 1; 4611 wqe->un.BlsRsp.RemoteId = fchdr.s_id; 4612 4613 wqe->PU = 0x3; |
4516 wqe->ContextTag = port->vpi + hba->vpi_base; | 4614 wqe->ContextTag = port->VPIobj.VPI; |
4517 wqe->ContextType = WQE_VPI_CONTEXT; 4518 wqe->OXId = (volatile uint16_t) fchdr.ox_id; 4519 wqe->XRITag = 0xffff; 4520 4521 if (fchdr.f_ctl & F_CTL_CHAINED_SEQ) { 4522 wqe->CCPE = 1; 4523 wqe->CCP = fchdr.rsvd; 4524 } 4525 4526 wqe->Class = CLASS3; 4527 wqe->RequestTag = iotag; 4528 wqe->CQId = 0x3ff; 4529 4530 emlxs_sli4_issue_iocb_cmd(hba, iocbq->channel, iocbq); 4531 4532 break; 4533 4534 case 1: /* ELS */ | 4615 wqe->ContextType = WQE_VPI_CONTEXT; 4616 wqe->OXId = (volatile uint16_t) fchdr.ox_id; 4617 wqe->XRITag = 0xffff; 4618 4619 if (fchdr.f_ctl & F_CTL_CHAINED_SEQ) { 4620 wqe->CCPE = 1; 4621 wqe->CCP = fchdr.rsvd; 4622 } 4623 4624 wqe->Class = CLASS3; 4625 wqe->RequestTag = iotag; 4626 wqe->CQId = 0x3ff; 4627 4628 emlxs_sli4_issue_iocb_cmd(hba, iocbq->channel, iocbq); 4629 4630 break; 4631 4632 case 1: /* ELS */ |
4633 if (!(port->VPIobj.flag & EMLXS_VPI_PORT_ENABLED)) { 4634 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 4635 "RQ ENTRY: %s: Port not yet enabled. " 4636 "Dropping...", 4637 label); 4638 4639 goto done; 4640 } 4641 |
|
4535 cmd = *((uint32_t *)seq_mp->virt); 4536 cmd &= ELS_CMD_MASK; | 4642 cmd = *((uint32_t *)seq_mp->virt); 4643 cmd &= ELS_CMD_MASK; |
4537 rp = NULL; | 4644 rpip = NULL; |
4538 4539 if (cmd != ELS_CMD_LOGO) { | 4645 4646 if (cmd != ELS_CMD_LOGO) { |
4540 rp = EMLXS_NODE_TO_RPI(hba, node); | 4647 rpip = EMLXS_NODE_TO_RPI(port, node); |
4541 } 4542 | 4648 } 4649 |
4543 if (!rp) { 4544 fp = hba->sli.sli4.FCFIp; 4545 rp = &fp->scratch_rpi; | 4650 if (!rpip) { 4651 rpip = port->VPIobj.rpip; |
4546 } 4547 | 4652 } 4653 |
4548 xp = emlxs_sli4_reserve_xri(hba, rp); | 4654 xrip = emlxs_sli4_reserve_xri(hba, rpip); |
4549 | 4655 |
4550 if (!xp) { | 4656 if (!xrip) { |
4551 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, | 4657 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, |
4552 "RQ ENTRY: %s: Out of exchange " \ | 4658 "RQ ENTRY: %s: Out of exchange " |
4553 "resources. Dropping...", 4554 label); 4555 4556 goto done; 4557 } 4558 | 4659 "resources. Dropping...", 4660 label); 4661 4662 goto done; 4663 } 4664 |
4559 xp->rx_id = fchdr.ox_id; | 4665 xrip->rx_id = fchdr.ox_id; |
4560 4561 /* Build CMD_RCV_ELS64_CX */ 4562 iocb->un.rcvels64.elsReq.tus.f.bdeFlags = 0; 4563 iocb->un.rcvels64.elsReq.tus.f.bdeSize = seq_len; 4564 iocb->un.rcvels64.elsReq.addrLow = PADDR_LO(seq_mp->phys); 4565 iocb->un.rcvels64.elsReq.addrHigh = PADDR_HI(seq_mp->phys); 4566 iocb->ULPBDECOUNT = 1; 4567 4568 iocb->un.rcvels64.remoteID = fchdr.s_id; 4569 iocb->un.rcvels64.parmRo = fchdr.d_id; 4570 4571 iocb->ULPPU = 0x3; | 4666 4667 /* Build CMD_RCV_ELS64_CX */ 4668 iocb->un.rcvels64.elsReq.tus.f.bdeFlags = 0; 4669 iocb->un.rcvels64.elsReq.tus.f.bdeSize = seq_len; 4670 iocb->un.rcvels64.elsReq.addrLow = PADDR_LO(seq_mp->phys); 4671 iocb->un.rcvels64.elsReq.addrHigh = PADDR_HI(seq_mp->phys); 4672 iocb->ULPBDECOUNT = 1; 4673 4674 iocb->un.rcvels64.remoteID = fchdr.s_id; 4675 iocb->un.rcvels64.parmRo = fchdr.d_id; 4676 4677 iocb->ULPPU = 0x3; |
4572 iocb->ULPCONTEXT = xp->XRI; | 4678 iocb->ULPCONTEXT = xrip->XRI; |
4573 iocb->ULPIOTAG = ((node)? node->nlp_Rpi:0); 4574 iocb->ULPCLASS = CLASS3; 4575 iocb->ULPCOMMAND = CMD_RCV_ELS64_CX; 4576 4577 iocb->unsli3.ext_rcv.seq_len = seq_len; | 4679 iocb->ULPIOTAG = ((node)? node->nlp_Rpi:0); 4680 iocb->ULPCLASS = CLASS3; 4681 iocb->ULPCOMMAND = CMD_RCV_ELS64_CX; 4682 4683 iocb->unsli3.ext_rcv.seq_len = seq_len; |
4578 iocb->unsli3.ext_rcv.vpi = port->vpi + hba->vpi_base; | 4684 iocb->unsli3.ext_rcv.vpi = port->VPIobj.VPI; |
4579 4580 if (fchdr.f_ctl & F_CTL_CHAINED_SEQ) { 4581 iocb->unsli3.ext_rcv.ccpe = 1; 4582 iocb->unsli3.ext_rcv.ccp = fchdr.rsvd; 4583 } 4584 4585 (void) emlxs_els_handle_unsol_req(port, iocbq->channel, 4586 iocbq, seq_mp, seq_len); 4587 4588 break; 4589 4590 case 0x20: /* CT */ | 4685 4686 if (fchdr.f_ctl & F_CTL_CHAINED_SEQ) { 4687 iocb->unsli3.ext_rcv.ccpe = 1; 4688 iocb->unsli3.ext_rcv.ccp = fchdr.rsvd; 4689 } 4690 4691 (void) emlxs_els_handle_unsol_req(port, iocbq->channel, 4692 iocbq, seq_mp, seq_len); 4693 4694 break; 4695 4696 case 0x20: /* CT */ |
4697 if (!(port->VPIobj.flag & EMLXS_VPI_PORT_ENABLED)) { 4698 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 4699 "RQ ENTRY: %s: Port not yet enabled. " 4700 "Dropping...", 4701 label); |
|
4591 | 4702 |
4703 goto done; 4704 } 4705 |
|
4592 if (!node) { 4593 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, | 4706 if (!node) { 4707 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, |
4594 "RQ ENTRY: %s: Node not found (did=%x). " \ | 4708 "RQ ENTRY: %s: Node not found (did=%x). " |
4595 "Dropping...", 4596 label, fchdr.d_id); 4597 4598 goto done; 4599 } 4600 | 4709 "Dropping...", 4710 label, fchdr.d_id); 4711 4712 goto done; 4713 } 4714 |
4601 rp = EMLXS_NODE_TO_RPI(hba, node); | 4715 rpip = EMLXS_NODE_TO_RPI(port, node); |
4602 | 4716 |
4603 if (!rp) { | 4717 if (!rpip) { |
4604 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, | 4718 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, |
4605 "RQ ENTRY: %s: RPI not found (did=%x rpi=%x). " \ | 4719 "RQ ENTRY: %s: RPI not found (did=%x rpi=%x). " |
4606 "Dropping...", 4607 label, fchdr.d_id, node->nlp_Rpi); 4608 4609 goto done; 4610 } 4611 | 4720 "Dropping...", 4721 label, fchdr.d_id, node->nlp_Rpi); 4722 4723 goto done; 4724 } 4725 |
4612 xp = emlxs_sli4_reserve_xri(hba, rp); | 4726 xrip = emlxs_sli4_reserve_xri(hba, rpip); |
4613 | 4727 |
4614 if (!xp) { | 4728 if (!xrip) { |
4615 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, | 4729 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, |
4616 "RQ ENTRY: %s: Out of exchange " \ | 4730 "RQ ENTRY: %s: Out of exchange " |
4617 "resources. Dropping...", 4618 label); 4619 4620 goto done; 4621 } 4622 | 4731 "resources. Dropping...", 4732 label); 4733 4734 goto done; 4735 } 4736 |
4623 xp->rx_id = fchdr.ox_id; | 4737 xrip->rx_id = fchdr.ox_id; |
4624 4625 /* Build CMD_RCV_SEQ64_CX */ 4626 iocb->un.rcvseq64.rcvBde.tus.f.bdeFlags = 0; 4627 iocb->un.rcvseq64.rcvBde.tus.f.bdeSize = seq_len; 4628 iocb->un.rcvseq64.rcvBde.addrLow = PADDR_LO(seq_mp->phys); 4629 iocb->un.rcvseq64.rcvBde.addrHigh = PADDR_HI(seq_mp->phys); 4630 iocb->ULPBDECOUNT = 1; 4631 4632 iocb->un.rcvseq64.xrsqRo = 0; 4633 iocb->un.rcvseq64.w5.hcsw.Rctl = fchdr.r_ctl; 4634 iocb->un.rcvseq64.w5.hcsw.Type = fchdr.type; 4635 iocb->un.rcvseq64.w5.hcsw.Dfctl = fchdr.df_ctl; 4636 iocb->un.rcvseq64.w5.hcsw.Fctl = fchdr.f_ctl; 4637 4638 iocb->ULPPU = 0x3; | 4738 4739 /* Build CMD_RCV_SEQ64_CX */ 4740 iocb->un.rcvseq64.rcvBde.tus.f.bdeFlags = 0; 4741 iocb->un.rcvseq64.rcvBde.tus.f.bdeSize = seq_len; 4742 iocb->un.rcvseq64.rcvBde.addrLow = PADDR_LO(seq_mp->phys); 4743 iocb->un.rcvseq64.rcvBde.addrHigh = PADDR_HI(seq_mp->phys); 4744 iocb->ULPBDECOUNT = 1; 4745 4746 iocb->un.rcvseq64.xrsqRo = 0; 4747 iocb->un.rcvseq64.w5.hcsw.Rctl = fchdr.r_ctl; 4748 iocb->un.rcvseq64.w5.hcsw.Type = fchdr.type; 4749 iocb->un.rcvseq64.w5.hcsw.Dfctl = fchdr.df_ctl; 4750 iocb->un.rcvseq64.w5.hcsw.Fctl = fchdr.f_ctl; 4751 4752 iocb->ULPPU = 0x3; |
4639 iocb->ULPCONTEXT = xp->XRI; 4640 iocb->ULPIOTAG = rp->RPI; | 4753 iocb->ULPCONTEXT = xrip->XRI; 4754 iocb->ULPIOTAG = rpip->RPI; |
4641 iocb->ULPCLASS = CLASS3; 4642 iocb->ULPCOMMAND = CMD_RCV_SEQ64_CX; 4643 4644 iocb->unsli3.ext_rcv.seq_len = seq_len; | 4755 iocb->ULPCLASS = CLASS3; 4756 iocb->ULPCOMMAND = CMD_RCV_SEQ64_CX; 4757 4758 iocb->unsli3.ext_rcv.seq_len = seq_len; |
4645 iocb->unsli3.ext_rcv.vpi = port->vpi + hba->vpi_base; | 4759 iocb->unsli3.ext_rcv.vpi = port->VPIobj.VPI; |
4646 4647 if (fchdr.f_ctl & F_CTL_CHAINED_SEQ) { 4648 iocb->unsli3.ext_rcv.ccpe = 1; 4649 iocb->unsli3.ext_rcv.ccp = fchdr.rsvd; 4650 } 4651 4652 (void) emlxs_ct_handle_unsol_req(port, iocbq->channel, 4653 iocbq, seq_mp, seq_len); 4654 4655 break; 4656 } 4657 4658 /* Sequence handled, no need to abort */ 4659 abort = 0; 4660 4661done: 4662 4663 if (!posted) { | 4760 4761 if (fchdr.f_ctl & F_CTL_CHAINED_SEQ) { 4762 iocb->unsli3.ext_rcv.ccpe = 1; 4763 iocb->unsli3.ext_rcv.ccp = fchdr.rsvd; 4764 } 4765 4766 (void) emlxs_ct_handle_unsol_req(port, iocbq->channel, 4767 iocbq, seq_mp, seq_len); 4768 4769 break; 4770 } 4771 4772 /* Sequence handled, no need to abort */ 4773 abort = 0; 4774 4775done: 4776 4777 if (!posted) { |
4664 emlxs_sli4_rq_post(hba, hdr_rq->qid); | 4778 emlxs_sli4_rq_post(port, hdr_rq->qid); |
4665 } 4666 4667 if (abort) { 4668 /* Send ABTS for this exchange */ 4669 /* !!! Currently, we have no implementation for this !!! */ 4670 abort = 0; 4671 } 4672 4673 /* Return memory resources to pools */ 4674 if (iocbq) { 4675 if (iocbq->bp) { | 4779 } 4780 4781 if (abort) { 4782 /* Send ABTS for this exchange */ 4783 /* !!! Currently, we have no implementation for this !!! */ 4784 abort = 0; 4785 } 4786 4787 /* Return memory resources to pools */ 4788 if (iocbq) { 4789 if (iocbq->bp) { |
4676 (void) emlxs_mem_put(hba, buf_type, 4677 (uint8_t *)iocbq->bp); | 4790 emlxs_mem_put(hba, buf_type, (void *)iocbq->bp); |
4678 } 4679 | 4791 } 4792 |
4680 (void) emlxs_mem_put(hba, MEM_IOCB, (uint8_t *)iocbq); | 4793 emlxs_mem_put(hba, MEM_IOCB, (void *)iocbq); |
4681 } 4682 4683#ifdef FMA_SUPPORT 4684 if (emlxs_fm_check_dma_handle(hba, 4685 hba->sli.sli4.slim2.dma_handle) 4686 != DDI_FM_OK) { 4687 EMLXS_MSGF(EMLXS_CONTEXT, 4688 &emlxs_invalid_dma_handle_msg, 4689 "emlxs_sli4_process_unsol_rcv: hdl=%p", 4690 hba->sli.sli4.slim2.dma_handle); 4691 4692 emlxs_thread_spawn(hba, emlxs_restart_thread, | 4794 } 4795 4796#ifdef FMA_SUPPORT 4797 if (emlxs_fm_check_dma_handle(hba, 4798 hba->sli.sli4.slim2.dma_handle) 4799 != DDI_FM_OK) { 4800 EMLXS_MSGF(EMLXS_CONTEXT, 4801 &emlxs_invalid_dma_handle_msg, 4802 "emlxs_sli4_process_unsol_rcv: hdl=%p", 4803 hba->sli.sli4.slim2.dma_handle); 4804 4805 emlxs_thread_spawn(hba, emlxs_restart_thread, |
4693 NULL, NULL); | 4806 0, 0); |
4694 } 4695#endif 4696 return; 4697 4698} /* emlxs_sli4_process_unsol_rcv() */ 4699 4700 4701/*ARGSUSED*/ 4702static void 4703emlxs_sli4_process_xri_aborted(emlxs_hba_t *hba, CQ_DESC_t *cq, 4704 CQE_XRI_Abort_t *cqe) 4705{ 4706 emlxs_port_t *port = &PPORT; | 4807 } 4808#endif 4809 return; 4810 4811} /* emlxs_sli4_process_unsol_rcv() */ 4812 4813 4814/*ARGSUSED*/ 4815static void 4816emlxs_sli4_process_xri_aborted(emlxs_hba_t *hba, CQ_DESC_t *cq, 4817 CQE_XRI_Abort_t *cqe) 4818{ 4819 emlxs_port_t *port = &PPORT; |
4707 XRIobj_t *xp; | 4820 XRIobj_t *xrip; |
4708 | 4821 |
4709 xp = emlxs_sli4_find_xri(hba, cqe->XRI); 4710 if (xp == NULL) { | 4822 mutex_enter(&EMLXS_FCTAB_LOCK); 4823 4824 xrip = emlxs_sli4_find_xri(hba, cqe->XRI); 4825 if (xrip == NULL) { |
4711 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_err_msg, 4712 "CQ ENTRY: process xri aborted ignored"); | 4826 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_err_msg, 4827 "CQ ENTRY: process xri aborted ignored"); |
4828 4829 mutex_exit(&EMLXS_FCTAB_LOCK); |
|
4713 return; 4714 } 4715 4716 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 4717 "CQ ENTRY: process xri x%x aborted: IA %d EO %d BR %d", 4718 cqe->XRI, cqe->IA, cqe->EO, cqe->BR); 4719 | 4830 return; 4831 } 4832 4833 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 4834 "CQ ENTRY: process xri x%x aborted: IA %d EO %d BR %d", 4835 cqe->XRI, cqe->IA, cqe->EO, cqe->BR); 4836 |
4720 if (!(xp->state & RESOURCE_XRI_ABORT_INP)) { | 4837 if (!(xrip->flag & EMLXS_XRI_ABORT_INP)) { |
4721 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_err_msg, 4722 "XRI Aborted: Bad state: x%x xri x%x", | 4838 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_err_msg, 4839 "XRI Aborted: Bad state: x%x xri x%x", |
4723 xp->state, xp->XRI); | 4840 xrip->flag, xrip->XRI); 4841 4842 mutex_exit(&EMLXS_FCTAB_LOCK); |
4724 return; 4725 } 4726 4727 /* Exchange is no longer busy on-chip, free it */ | 4843 return; 4844 } 4845 4846 /* Exchange is no longer busy on-chip, free it */ |
4728 emlxs_sli4_free_xri(hba, 0, xp); | 4847 emlxs_sli4_free_xri(hba, 0, xrip, 0); |
4729 | 4848 |
4849 mutex_exit(&EMLXS_FCTAB_LOCK); 4850 4851 return; 4852 |
|
4730} /* emlxs_sli4_process_xri_aborted () */ 4731 4732 4733/*ARGSUSED*/ 4734static void 4735emlxs_sli4_process_cq(emlxs_hba_t *hba, CQ_DESC_t *cq) 4736{ 4737 emlxs_port_t *port = &PPORT; --- 220 unchanged lines hidden (view full) --- 4958 4959 /* Get MSI message id */ 4960 msgid = (uint16_t)((unsigned long)arg2); 4961 4962 /* Validate the message id */ 4963 if (msgid >= hba->intr_count) { 4964 msgid = 0; 4965 } | 4853} /* emlxs_sli4_process_xri_aborted () */ 4854 4855 4856/*ARGSUSED*/ 4857static void 4858emlxs_sli4_process_cq(emlxs_hba_t *hba, CQ_DESC_t *cq) 4859{ 4860 emlxs_port_t *port = &PPORT; --- 220 unchanged lines hidden (view full) --- 5081 5082 /* Get MSI message id */ 5083 msgid = (uint16_t)((unsigned long)arg2); 5084 5085 /* Validate the message id */ 5086 if (msgid >= hba->intr_count) { 5087 msgid = 0; 5088 } |
4966 4967 mutex_enter(&EMLXS_INTR_LOCK(msgid)); 4968 | |
4969 mutex_enter(&EMLXS_PORT_LOCK); 4970 4971 if ((hba->state == FC_KILLED) || (hba->flag & FC_OFFLINE_MODE)) { 4972 mutex_exit(&EMLXS_PORT_LOCK); | 5089 mutex_enter(&EMLXS_PORT_LOCK); 5090 5091 if ((hba->state == FC_KILLED) || (hba->flag & FC_OFFLINE_MODE)) { 5092 mutex_exit(&EMLXS_PORT_LOCK); |
4973 mutex_exit(&EMLXS_INTR_LOCK(msgid)); | |
4974 return (DDI_INTR_UNCLAIMED); 4975 } 4976 4977 /* The eq[] index == the MSI vector number */ 4978 emlxs_sli4_process_eq(hba, &hba->sli.sli4.eq[msgid]); 4979 4980 mutex_exit(&EMLXS_PORT_LOCK); | 5093 return (DDI_INTR_UNCLAIMED); 5094 } 5095 5096 /* The eq[] index == the MSI vector number */ 5097 emlxs_sli4_process_eq(hba, &hba->sli.sli4.eq[msgid]); 5098 5099 mutex_exit(&EMLXS_PORT_LOCK); |
4981 mutex_exit(&EMLXS_INTR_LOCK(msgid)); | |
4982 return (DDI_INTR_CLAIMED); 4983 4984} /* emlxs_sli4_msi_intr() */ 4985#endif /* MSI_SUPPORT */ 4986 4987 4988/*ARGSUSED*/ 4989static int --- 107 unchanged lines hidden (view full) --- 5097 5098static void 5099emlxs_sli4_resource_free(emlxs_hba_t *hba) 5100{ 5101 emlxs_port_t *port = &PPORT; 5102 MBUF_INFO *buf_info; 5103 uint32_t i; 5104 | 5100 return (DDI_INTR_CLAIMED); 5101 5102} /* emlxs_sli4_msi_intr() */ 5103#endif /* MSI_SUPPORT */ 5104 5105 5106/*ARGSUSED*/ 5107static int --- 107 unchanged lines hidden (view full) --- 5215 5216static void 5217emlxs_sli4_resource_free(emlxs_hba_t *hba) 5218{ 5219 emlxs_port_t *port = &PPORT; 5220 MBUF_INFO *buf_info; 5221 uint32_t i; 5222 |
5105 if (hba->sli.sli4.FCFIp) { 5106 kmem_free(hba->sli.sli4.FCFIp, 5107 (sizeof (FCFIobj_t) * hba->sli.sli4.FCFICount)); 5108 hba->sli.sli4.FCFIp = NULL; 5109 } 5110 if (hba->sli.sli4.VFIp) { 5111 kmem_free(hba->sli.sli4.VFIp, 5112 (sizeof (VFIobj_t) * hba->sli.sli4.VFICount)); 5113 hba->sli.sli4.VFIp = NULL; 5114 } 5115 if (hba->sli.sli4.RPIp) { 5116 kmem_free(hba->sli.sli4.RPIp, 5117 (sizeof (RPIobj_t) * hba->sli.sli4.RPICount)); 5118 hba->sli.sli4.RPIp = NULL; 5119 } | 5223 emlxs_fcf_fini(hba); |
5120 5121 buf_info = &hba->sli.sli4.HeaderTmplate; 5122 if (buf_info->virt) { 5123 bzero(buf_info, sizeof (MBUF_INFO)); 5124 } 5125 5126 if (hba->sli.sli4.XRIp) { 5127 if ((hba->sli.sli4.XRIinuse_f != 5128 (XRIobj_t *)&hba->sli.sli4.XRIinuse_f) || 5129 (hba->sli.sli4.XRIinuse_b != 5130 (XRIobj_t *)&hba->sli.sli4.XRIinuse_f)) { | 5224 5225 buf_info = &hba->sli.sli4.HeaderTmplate; 5226 if (buf_info->virt) { 5227 bzero(buf_info, sizeof (MBUF_INFO)); 5228 } 5229 5230 if (hba->sli.sli4.XRIp) { 5231 if ((hba->sli.sli4.XRIinuse_f != 5232 (XRIobj_t *)&hba->sli.sli4.XRIinuse_f) || 5233 (hba->sli.sli4.XRIinuse_b != 5234 (XRIobj_t *)&hba->sli.sli4.XRIinuse_f)) { |
5131 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_err_msg, | 5235 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_debug_msg, |
5132 "XRIs inuse during free!: %p %p != %p\n", 5133 hba->sli.sli4.XRIinuse_f, 5134 hba->sli.sli4.XRIinuse_b, 5135 &hba->sli.sli4.XRIinuse_f); 5136 } 5137 kmem_free(hba->sli.sli4.XRIp, 5138 (sizeof (XRIobj_t) * hba->sli.sli4.XRICount)); 5139 hba->sli.sli4.XRIp = NULL; --- 38 unchanged lines hidden (view full) --- 5178 } 5179 for (i = 0; i < EMLXS_MAX_CQ_IDS; i++) { 5180 hba->sli.sli4.cq_map[i] = 0xffff; 5181 } 5182 for (i = 0; i < EMLXS_MAX_WQ_IDS; i++) { 5183 hba->sli.sli4.wq_map[i] = 0xffff; 5184 } 5185 | 5236 "XRIs inuse during free!: %p %p != %p\n", 5237 hba->sli.sli4.XRIinuse_f, 5238 hba->sli.sli4.XRIinuse_b, 5239 &hba->sli.sli4.XRIinuse_f); 5240 } 5241 kmem_free(hba->sli.sli4.XRIp, 5242 (sizeof (XRIobj_t) * hba->sli.sli4.XRICount)); 5243 hba->sli.sli4.XRIp = NULL; --- 38 unchanged lines hidden (view full) --- 5282 } 5283 for (i = 0; i < EMLXS_MAX_CQ_IDS; i++) { 5284 hba->sli.sli4.cq_map[i] = 0xffff; 5285 } 5286 for (i = 0; i < EMLXS_MAX_WQ_IDS; i++) { 5287 hba->sli.sli4.wq_map[i] = 0xffff; 5288 } 5289 |
5186 mutex_destroy(&hba->sli.sli4.id_lock); 5187 | |
5188} /* emlxs_sli4_resource_free() */ 5189 5190 5191static int 5192emlxs_sli4_resource_alloc(emlxs_hba_t *hba) 5193{ 5194 emlxs_port_t *port = &PPORT; 5195 emlxs_config_t *cfg = &CFG; 5196 MBUF_INFO *buf_info; 5197 uint16_t index; 5198 int num_eq; 5199 int num_wq; | 5290} /* emlxs_sli4_resource_free() */ 5291 5292 5293static int 5294emlxs_sli4_resource_alloc(emlxs_hba_t *hba) 5295{ 5296 emlxs_port_t *port = &PPORT; 5297 emlxs_config_t *cfg = &CFG; 5298 MBUF_INFO *buf_info; 5299 uint16_t index; 5300 int num_eq; 5301 int num_wq; |
5200 uint32_t i; | 5302 uint16_t i; |
5201 uint32_t j; 5202 uint32_t k; 5203 uint32_t word; | 5303 uint32_t j; 5304 uint32_t k; 5305 uint32_t word; |
5204 FCFIobj_t *fp; 5205 VFIobj_t *vp; 5206 RPIobj_t *rp; 5207 XRIobj_t *xp; | 5306 XRIobj_t *xrip; |
5208 char buf[64]; 5209 RQE_t *rqe; 5210 MBUF_INFO *rqb; 5211 uint64_t phys; 5212 uint64_t tmp_phys; 5213 char *virt; 5214 char *tmp_virt; 5215 void *data_handle; 5216 void *dma_handle; 5217 int32_t size; 5218 off_t offset; 5219 uint32_t count = 0; 5220 | 5307 char buf[64]; 5308 RQE_t *rqe; 5309 MBUF_INFO *rqb; 5310 uint64_t phys; 5311 uint64_t tmp_phys; 5312 char *virt; 5313 char *tmp_virt; 5314 void *data_handle; 5315 void *dma_handle; 5316 int32_t size; 5317 off_t offset; 5318 uint32_t count = 0; 5319 |
5221 (void) sprintf(buf, "%s_id_lock mutex", DRIVER_NAME); 5222 mutex_init(&hba->sli.sli4.id_lock, buf, MUTEX_DRIVER, NULL); | 5320 emlxs_fcf_init(hba); |
5223 | 5321 |
5224 if ((!hba->sli.sli4.FCFIp) && (hba->sli.sli4.FCFICount)) { 5225 hba->sli.sli4.FCFIp = (FCFIobj_t *)kmem_zalloc( 5226 (sizeof (FCFIobj_t) * hba->sli.sli4.FCFICount), KM_SLEEP); 5227 5228 fp = hba->sli.sli4.FCFIp; 5229 index = 0; /* Start FCFIs at 0 */ 5230 for (i = 0; i < hba->sli.sli4.FCFICount; i++) { 5231 fp->FCFI = index; 5232 fp->index = i; 5233 fp++; 5234 index++; 5235 } 5236 } 5237 5238 if ((!hba->sli.sli4.VFIp) && (hba->sli.sli4.VFICount)) { 5239 hba->sli.sli4.VFIp = (VFIobj_t *)kmem_zalloc( 5240 (sizeof (VFIobj_t) * hba->sli.sli4.VFICount), KM_SLEEP); 5241 5242 vp = hba->sli.sli4.VFIp; 5243 index = hba->sli.sli4.VFIBase; 5244 for (i = 0; i < hba->sli.sli4.VFICount; i++) { 5245 vp->VFI = index; 5246 vp->index = i; 5247 vp++; 5248 index++; 5249 } 5250 } 5251 5252 if ((!hba->sli.sli4.RPIp) && (hba->sli.sli4.RPICount)) { 5253 hba->sli.sli4.RPIp = (RPIobj_t *)kmem_zalloc( 5254 (sizeof (RPIobj_t) * hba->sli.sli4.RPICount), KM_SLEEP); 5255 5256 rp = hba->sli.sli4.RPIp; 5257 index = hba->sli.sli4.RPIBase; 5258 for (i = 0; i < hba->sli.sli4.RPICount; i++) { 5259 rp->RPI = index; 5260 rp->index = i; /* offset into HdrTmplate */ 5261 rp++; 5262 index++; 5263 } 5264 } 5265 | |
5266 /* EQs - 1 per Interrupt vector */ 5267 num_eq = hba->intr_count; 5268 /* CQs - number of WQs + 1 for RQs + 1 for mbox/async events */ 5269 num_wq = cfg[CFG_NUM_WQ].current * num_eq; 5270 5271 /* Calculate total dmable memory we need */ 5272 /* EQ */ 5273 count += num_eq * 4096; --- 43 unchanged lines hidden (view full) --- 5317 buf_info = &hba->sli.sli4.eq[i].addr; 5318 if (buf_info->virt == NULL) { 5319 bzero(&hba->sli.sli4.eq[i], sizeof (EQ_DESC_t)); 5320 buf_info->size = size; 5321 buf_info->flags = 5322 FC_MBUF_DMA | FC_MBUF_SNGLSG | FC_MBUF_DMA32; 5323 buf_info->align = ddi_ptob(hba->dip, 1L); 5324 buf_info->phys = phys; | 5322 /* EQs - 1 per Interrupt vector */ 5323 num_eq = hba->intr_count; 5324 /* CQs - number of WQs + 1 for RQs + 1 for mbox/async events */ 5325 num_wq = cfg[CFG_NUM_WQ].current * num_eq; 5326 5327 /* Calculate total dmable memory we need */ 5328 /* EQ */ 5329 count += num_eq * 4096; --- 43 unchanged lines hidden (view full) --- 5373 buf_info = &hba->sli.sli4.eq[i].addr; 5374 if (buf_info->virt == NULL) { 5375 bzero(&hba->sli.sli4.eq[i], sizeof (EQ_DESC_t)); 5376 buf_info->size = size; 5377 buf_info->flags = 5378 FC_MBUF_DMA | FC_MBUF_SNGLSG | FC_MBUF_DMA32; 5379 buf_info->align = ddi_ptob(hba->dip, 1L); 5380 buf_info->phys = phys; |
5325 buf_info->virt = virt; | 5381 buf_info->virt = (void *)virt; |
5326 buf_info->data_handle = data_handle; 5327 buf_info->dma_handle = dma_handle; 5328 5329 phys += size; 5330 virt += size; 5331 5332 hba->sli.sli4.eq[i].max_index = EQ_DEPTH; 5333 } --- 9 unchanged lines hidden (view full) --- 5343 buf_info = &hba->sli.sli4.cq[i].addr; 5344 if (buf_info->virt == NULL) { 5345 bzero(&hba->sli.sli4.cq[i], sizeof (CQ_DESC_t)); 5346 buf_info->size = size; 5347 buf_info->flags = 5348 FC_MBUF_DMA | FC_MBUF_SNGLSG | FC_MBUF_DMA32; 5349 buf_info->align = ddi_ptob(hba->dip, 1L); 5350 buf_info->phys = phys; | 5382 buf_info->data_handle = data_handle; 5383 buf_info->dma_handle = dma_handle; 5384 5385 phys += size; 5386 virt += size; 5387 5388 hba->sli.sli4.eq[i].max_index = EQ_DEPTH; 5389 } --- 9 unchanged lines hidden (view full) --- 5399 buf_info = &hba->sli.sli4.cq[i].addr; 5400 if (buf_info->virt == NULL) { 5401 bzero(&hba->sli.sli4.cq[i], sizeof (CQ_DESC_t)); 5402 buf_info->size = size; 5403 buf_info->flags = 5404 FC_MBUF_DMA | FC_MBUF_SNGLSG | FC_MBUF_DMA32; 5405 buf_info->align = ddi_ptob(hba->dip, 1L); 5406 buf_info->phys = phys; |
5351 buf_info->virt = virt; | 5407 buf_info->virt = (void *)virt; |
5352 buf_info->data_handle = data_handle; 5353 buf_info->dma_handle = dma_handle; 5354 5355 phys += size; 5356 virt += size; 5357 5358 hba->sli.sli4.cq[i].max_index = CQ_DEPTH; 5359 } --- 5 unchanged lines hidden (view full) --- 5365 buf_info = &hba->sli.sli4.wq[i].addr; 5366 if (buf_info->virt == NULL) { 5367 bzero(&hba->sli.sli4.wq[i], sizeof (WQ_DESC_t)); 5368 buf_info->size = size; 5369 buf_info->flags = 5370 FC_MBUF_DMA | FC_MBUF_SNGLSG | FC_MBUF_DMA32; 5371 buf_info->align = ddi_ptob(hba->dip, 1L); 5372 buf_info->phys = phys; | 5408 buf_info->data_handle = data_handle; 5409 buf_info->dma_handle = dma_handle; 5410 5411 phys += size; 5412 virt += size; 5413 5414 hba->sli.sli4.cq[i].max_index = CQ_DEPTH; 5415 } --- 5 unchanged lines hidden (view full) --- 5421 buf_info = &hba->sli.sli4.wq[i].addr; 5422 if (buf_info->virt == NULL) { 5423 bzero(&hba->sli.sli4.wq[i], sizeof (WQ_DESC_t)); 5424 buf_info->size = size; 5425 buf_info->flags = 5426 FC_MBUF_DMA | FC_MBUF_SNGLSG | FC_MBUF_DMA32; 5427 buf_info->align = ddi_ptob(hba->dip, 1L); 5428 buf_info->phys = phys; |
5373 buf_info->virt = virt; | 5429 buf_info->virt = (void *)virt; |
5374 buf_info->data_handle = data_handle; 5375 buf_info->dma_handle = dma_handle; 5376 5377 phys += size; 5378 virt += size; 5379 5380 hba->sli.sli4.wq[i].max_index = WQ_DEPTH; 5381 hba->sli.sli4.wq[i].release_depth = WQE_RELEASE_DEPTH; --- 5 unchanged lines hidden (view full) --- 5387 buf_info = &hba->sli.sli4.mq.addr; 5388 if (!buf_info->virt) { 5389 bzero(&hba->sli.sli4.mq, sizeof (MQ_DESC_t)); 5390 buf_info->size = size; 5391 buf_info->flags = 5392 FC_MBUF_DMA | FC_MBUF_SNGLSG | FC_MBUF_DMA32; 5393 buf_info->align = ddi_ptob(hba->dip, 1L); 5394 buf_info->phys = phys; | 5430 buf_info->data_handle = data_handle; 5431 buf_info->dma_handle = dma_handle; 5432 5433 phys += size; 5434 virt += size; 5435 5436 hba->sli.sli4.wq[i].max_index = WQ_DEPTH; 5437 hba->sli.sli4.wq[i].release_depth = WQE_RELEASE_DEPTH; --- 5 unchanged lines hidden (view full) --- 5443 buf_info = &hba->sli.sli4.mq.addr; 5444 if (!buf_info->virt) { 5445 bzero(&hba->sli.sli4.mq, sizeof (MQ_DESC_t)); 5446 buf_info->size = size; 5447 buf_info->flags = 5448 FC_MBUF_DMA | FC_MBUF_SNGLSG | FC_MBUF_DMA32; 5449 buf_info->align = ddi_ptob(hba->dip, 1L); 5450 buf_info->phys = phys; |
5395 buf_info->virt = virt; | 5451 buf_info->virt = (void *)virt; |
5396 buf_info->data_handle = data_handle; 5397 buf_info->dma_handle = dma_handle; 5398 5399 phys += size; 5400 virt += size; 5401 5402 hba->sli.sli4.mq.max_index = MQ_DEPTH; 5403 } --- 15 unchanged lines hidden (view full) --- 5419 } 5420 5421 bzero(&hba->sli.sli4.rq[i], sizeof (RQ_DESC_t)); 5422 buf_info->size = size; 5423 buf_info->flags = 5424 FC_MBUF_DMA | FC_MBUF_SNGLSG | FC_MBUF_DMA32; 5425 buf_info->align = ddi_ptob(hba->dip, 1L); 5426 buf_info->phys = phys; | 5452 buf_info->data_handle = data_handle; 5453 buf_info->dma_handle = dma_handle; 5454 5455 phys += size; 5456 virt += size; 5457 5458 hba->sli.sli4.mq.max_index = MQ_DEPTH; 5459 } --- 15 unchanged lines hidden (view full) --- 5475 } 5476 5477 bzero(&hba->sli.sli4.rq[i], sizeof (RQ_DESC_t)); 5478 buf_info->size = size; 5479 buf_info->flags = 5480 FC_MBUF_DMA | FC_MBUF_SNGLSG | FC_MBUF_DMA32; 5481 buf_info->align = ddi_ptob(hba->dip, 1L); 5482 buf_info->phys = phys; |
5427 buf_info->virt = virt; | 5483 buf_info->virt = (void *)virt; |
5428 buf_info->data_handle = data_handle; 5429 buf_info->dma_handle = dma_handle; 5430 5431 phys += size; 5432 virt += size; 5433 5434 hba->sli.sli4.rq[i].max_index = RQ_DEPTH; 5435 --- 21 unchanged lines hidden (view full) --- 5457 5458 rqb = &hba->sli.sli4.rq[i]. 5459 rqb[k + (j * RQB_COUNT)]; 5460 rqb->size = size; 5461 rqb->flags = FC_MBUF_DMA | 5462 FC_MBUF_SNGLSG | FC_MBUF_DMA32; 5463 rqb->align = ddi_ptob(hba->dip, 1L); 5464 rqb->phys = phys; | 5484 buf_info->data_handle = data_handle; 5485 buf_info->dma_handle = dma_handle; 5486 5487 phys += size; 5488 virt += size; 5489 5490 hba->sli.sli4.rq[i].max_index = RQ_DEPTH; 5491 --- 21 unchanged lines hidden (view full) --- 5513 5514 rqb = &hba->sli.sli4.rq[i]. 5515 rqb[k + (j * RQB_COUNT)]; 5516 rqb->size = size; 5517 rqb->flags = FC_MBUF_DMA | 5518 FC_MBUF_SNGLSG | FC_MBUF_DMA32; 5519 rqb->align = ddi_ptob(hba->dip, 1L); 5520 rqb->phys = phys; |
5465 rqb->virt = virt; | 5521 rqb->virt = (void *)virt; |
5466 rqb->data_handle = data_handle; 5467 rqb->dma_handle = dma_handle; 5468 5469 phys += size; 5470 virt += size; 5471#ifdef RQ_DEBUG 5472 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 5473 "RQ_ALLOC: rq[%d] rqb[%d,%d]=%p tag=%08x", --- 26 unchanged lines hidden (view full) --- 5500 (XRIobj_t *)&hba->sli.sli4.XRIfree_f; 5501 hba->sli.sli4.XRIfree_b = 5502 (XRIobj_t *)&hba->sli.sli4.XRIfree_f; 5503 hba->sli.sli4.xria_count = 0; 5504 5505 hba->sli.sli4.XRIp = (XRIobj_t *)kmem_zalloc( 5506 (sizeof (XRIobj_t) * hba->sli.sli4.XRICount), KM_SLEEP); 5507 | 5522 rqb->data_handle = data_handle; 5523 rqb->dma_handle = dma_handle; 5524 5525 phys += size; 5526 virt += size; 5527#ifdef RQ_DEBUG 5528 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 5529 "RQ_ALLOC: rq[%d] rqb[%d,%d]=%p tag=%08x", --- 26 unchanged lines hidden (view full) --- 5556 (XRIobj_t *)&hba->sli.sli4.XRIfree_f; 5557 hba->sli.sli4.XRIfree_b = 5558 (XRIobj_t *)&hba->sli.sli4.XRIfree_f; 5559 hba->sli.sli4.xria_count = 0; 5560 5561 hba->sli.sli4.XRIp = (XRIobj_t *)kmem_zalloc( 5562 (sizeof (XRIobj_t) * hba->sli.sli4.XRICount), KM_SLEEP); 5563 |
5508 xp = hba->sli.sli4.XRIp; | 5564 xrip = hba->sli.sli4.XRIp; |
5509 index = hba->sli.sli4.XRIBase; 5510 size = hba->sli.sli4.mem_sgl_size; 5511 for (i = 0; i < hba->sli.sli4.XRICount; i++) { | 5565 index = hba->sli.sli4.XRIBase; 5566 size = hba->sli.sli4.mem_sgl_size; 5567 for (i = 0; i < hba->sli.sli4.XRICount; i++) { |
5512 xp->sge_count = | 5568 xrip->sge_count = |
5513 (hba->sli.sli4.mem_sgl_size / sizeof (ULP_SGE64)); | 5569 (hba->sli.sli4.mem_sgl_size / sizeof (ULP_SGE64)); |
5514 xp->XRI = index; 5515 xp->iotag = i; 5516 if ((xp->XRI == 0) || (xp->iotag == 0)) { | 5570 xrip->XRI = index; 5571 xrip->iotag = i; 5572 if ((xrip->XRI == 0) || (xrip->iotag == 0)) { |
5517 index++; /* Skip XRI 0 or IOTag 0 */ | 5573 index++; /* Skip XRI 0 or IOTag 0 */ |
5518 xp++; | 5574 xrip++; |
5519 continue; 5520 } | 5575 continue; 5576 } |
5521 /* Add xp to end of free list */ 5522 xp->_b = hba->sli.sli4.XRIfree_b; 5523 hba->sli.sli4.XRIfree_b->_f = xp; 5524 xp->_f = (XRIobj_t *)&hba->sli.sli4.XRIfree_f; 5525 hba->sli.sli4.XRIfree_b = xp; | 5577 /* Add xrip to end of free list */ 5578 xrip->_b = hba->sli.sli4.XRIfree_b; 5579 hba->sli.sli4.XRIfree_b->_f = xrip; 5580 xrip->_f = (XRIobj_t *)&hba->sli.sli4.XRIfree_f; 5581 hba->sli.sli4.XRIfree_b = xrip; |
5526 hba->sli.sli4.xrif_count++; 5527 | 5582 hba->sli.sli4.xrif_count++; 5583 |
5528 /* Allocate SGL for this xp */ 5529 buf_info = &xp->SGList; | 5584 /* Allocate SGL for this xrip */ 5585 buf_info = &xrip->SGList; |
5530 buf_info->size = size; 5531 buf_info->flags = 5532 FC_MBUF_DMA | FC_MBUF_SNGLSG | FC_MBUF_DMA32; 5533 buf_info->align = size; 5534 buf_info->phys = phys; | 5586 buf_info->size = size; 5587 buf_info->flags = 5588 FC_MBUF_DMA | FC_MBUF_SNGLSG | FC_MBUF_DMA32; 5589 buf_info->align = size; 5590 buf_info->phys = phys; |
5535 buf_info->virt = virt; | 5591 buf_info->virt = (void *)virt; |
5536 buf_info->data_handle = data_handle; 5537 buf_info->dma_handle = dma_handle; 5538 5539 phys += size; 5540 virt += size; 5541 | 5592 buf_info->data_handle = data_handle; 5593 buf_info->dma_handle = dma_handle; 5594 5595 phys += size; 5596 virt += size; 5597 |
5542 xp++; | 5598 xrip++; |
5543 index++; 5544 } 5545 } 5546 5547 size = sizeof (RPIHdrTmplate_t) * hba->sli.sli4.RPICount; 5548 buf_info = &hba->sli.sli4.HeaderTmplate; 5549 if ((buf_info->virt == NULL) && (hba->sli.sli4.RPICount)) { 5550 bzero(buf_info, sizeof (MBUF_INFO)); 5551 buf_info->size = size; 5552 buf_info->flags = FC_MBUF_DMA | FC_MBUF_DMA32; 5553 buf_info->align = ddi_ptob(hba->dip, 1L); 5554 buf_info->phys = phys; | 5599 index++; 5600 } 5601 } 5602 5603 size = sizeof (RPIHdrTmplate_t) * hba->sli.sli4.RPICount; 5604 buf_info = &hba->sli.sli4.HeaderTmplate; 5605 if ((buf_info->virt == NULL) && (hba->sli.sli4.RPICount)) { 5606 bzero(buf_info, sizeof (MBUF_INFO)); 5607 buf_info->size = size; 5608 buf_info->flags = FC_MBUF_DMA | FC_MBUF_DMA32; 5609 buf_info->align = ddi_ptob(hba->dip, 1L); 5610 buf_info->phys = phys; |
5555 buf_info->virt = virt; | 5611 buf_info->virt = (void *)virt; |
5556 buf_info->data_handle = data_handle; 5557 buf_info->dma_handle = dma_handle; 5558 } 5559 5560#ifdef FMA_SUPPORT 5561 if (hba->sli.sli4.slim2.dma_handle) { 5562 if (emlxs_fm_check_dma_handle(hba, 5563 hba->sli.sli4.slim2.dma_handle) --- 12 unchanged lines hidden (view full) --- 5576failed: 5577 5578 (void) emlxs_sli4_resource_free(hba); 5579 return (ENOMEM); 5580 5581} /* emlxs_sli4_resource_alloc */ 5582 5583 | 5612 buf_info->data_handle = data_handle; 5613 buf_info->dma_handle = dma_handle; 5614 } 5615 5616#ifdef FMA_SUPPORT 5617 if (hba->sli.sli4.slim2.dma_handle) { 5618 if (emlxs_fm_check_dma_handle(hba, 5619 hba->sli.sli4.slim2.dma_handle) --- 12 unchanged lines hidden (view full) --- 5632failed: 5633 5634 (void) emlxs_sli4_resource_free(hba); 5635 return (ENOMEM); 5636 5637} /* emlxs_sli4_resource_alloc */ 5638 5639 |
5584static FCFIobj_t * 5585emlxs_sli4_alloc_fcfi(emlxs_hba_t *hba) 5586{ 5587 emlxs_port_t *port = &PPORT; 5588 uint32_t i; 5589 FCFIobj_t *fp; 5590 5591 mutex_enter(&hba->sli.sli4.id_lock); 5592 fp = hba->sli.sli4.FCFIp; 5593 for (i = 0; i < hba->sli.sli4.FCFICount; i++) { 5594 if (fp->state == RESOURCE_FREE) { 5595 fp->state = RESOURCE_ALLOCATED; 5596 mutex_exit(&hba->sli.sli4.id_lock); 5597 return (fp); 5598 } 5599 fp++; 5600 } 5601 mutex_exit(&hba->sli.sli4.id_lock); 5602 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 5603 "Unable to Alloc FCFI"); 5604 return (NULL); 5605 5606} /* emlxs_sli4_alloc_fcfi() */ 5607 5608 5609static FCFIobj_t * 5610emlxs_sli4_find_fcfi_fcfrec(emlxs_hba_t *hba, FCF_RECORD_t *fcfrec) 5611{ 5612 emlxs_port_t *port = &PPORT; 5613 uint32_t i; 5614 FCFIobj_t *fp; 5615 5616 /* Check for BOTH a matching FCF index and mac address */ 5617 mutex_enter(&hba->sli.sli4.id_lock); 5618 fp = hba->sli.sli4.FCFIp; 5619 for (i = 0; i < hba->sli.sli4.FCFICount; i++) { 5620 if (fp->state & RESOURCE_ALLOCATED) { 5621 if ((fp->FCF_index == fcfrec->fcf_index) && 5622 (bcmp((char *)fcfrec->fcf_mac_address_hi, 5623 fp->fcf_rec.fcf_mac_address_hi, 4) == 0) && 5624 (bcmp((char *)fcfrec->fcf_mac_address_low, 5625 fp->fcf_rec.fcf_mac_address_low, 2) == 0)) { 5626 mutex_exit(&hba->sli.sli4.id_lock); 5627 return (fp); 5628 } 5629 } 5630 fp++; 5631 } 5632 mutex_exit(&hba->sli.sli4.id_lock); 5633 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 5634 "Unable to Find FCF Index %d", fcfrec->fcf_index); 5635 return (0); 5636 5637} /* emlxs_sli4_find_fcfi_fcfrec() */ 5638 5639 5640extern VFIobj_t * 5641emlxs_sli4_alloc_vfi(emlxs_hba_t *hba, FCFIobj_t *fp) 5642{ 5643 emlxs_port_t *port = &PPORT; 5644 uint32_t i; 5645 VFIobj_t *vp; 5646 5647 mutex_enter(&hba->sli.sli4.id_lock); 5648 vp = hba->sli.sli4.VFIp; 5649 for (i = 0; i < hba->sli.sli4.VFICount; i++) { 5650 if (vp->state == RESOURCE_FREE) { 5651 vp->state = RESOURCE_ALLOCATED; 5652 vp->FCFIp = fp; 5653 fp->outstandingVFIs++; 5654 mutex_exit(&hba->sli.sli4.id_lock); 5655 return (vp); 5656 } 5657 vp++; 5658 } 5659 mutex_exit(&hba->sli.sli4.id_lock); 5660 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 5661 "Unable to Alloc VFI"); 5662 return (NULL); 5663 5664} /* emlxs_sli4_alloc_vfi() */ 5665 5666 5667extern RPIobj_t * 5668emlxs_sli4_alloc_rpi(emlxs_port_t *port) 5669{ 5670 emlxs_hba_t *hba = HBA; 5671 uint32_t i; 5672 RPIobj_t *rp; 5673 5674 mutex_enter(&hba->sli.sli4.id_lock); 5675 rp = hba->sli.sli4.RPIp; 5676 for (i = 0; i < hba->sli.sli4.RPICount; i++) { 5677 /* To be consistent with SLI3, the RPI assignment */ 5678 /* starts with 1. ONLY one SLI4 HBA in the entire */ 5679 /* system will be sacrificed by one RPI and that */ 5680 /* is the one having RPI base equal 0. */ 5681 if ((rp->state == RESOURCE_FREE) && (rp->RPI != 0)) { 5682 rp->state = RESOURCE_ALLOCATED; 5683 rp->VPIp = port; 5684 port->outstandingRPIs++; 5685 mutex_exit(&hba->sli.sli4.id_lock); 5686 return (rp); 5687 } 5688 rp++; 5689 } 5690 mutex_exit(&hba->sli.sli4.id_lock); 5691 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 5692 "Unable to Alloc RPI"); 5693 return (NULL); 5694 5695} /* emlxs_sli4_alloc_rpi() */ 5696 5697 5698extern RPIobj_t * 5699emlxs_sli4_find_rpi(emlxs_hba_t *hba, uint16_t rpi) 5700{ 5701 emlxs_port_t *port = &PPORT; 5702 RPIobj_t *rp; 5703 int index; 5704 5705 rp = hba->sli.sli4.RPIp; 5706 index = rpi - hba->sli.sli4.RPIBase; 5707 if ((rpi == 0xffff) || (index >= hba->sli.sli4.RPICount)) { 5708 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 5709 "RPI %d out of range: Count = %d", 5710 index, hba->sli.sli4.RPICount); 5711 return (NULL); 5712 } 5713 rp += index; 5714 mutex_enter(&hba->sli.sli4.id_lock); 5715 if ((index < 0) || !(rp->state & RESOURCE_ALLOCATED)) { 5716 mutex_exit(&hba->sli.sli4.id_lock); 5717 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 5718 "Unable to find RPI %d", index); 5719 return (NULL); 5720 } 5721 mutex_exit(&hba->sli.sli4.id_lock); 5722 return (rp); 5723 5724} /* emlxs_sli4_find_rpi() */ 5725 5726 | |
5727static XRIobj_t * | 5640static XRIobj_t * |
5728emlxs_sli4_reserve_xri(emlxs_hba_t *hba, RPIobj_t *rp) | 5641emlxs_sli4_reserve_xri(emlxs_hba_t *hba, RPIobj_t *rpip) |
5729{ 5730 emlxs_port_t *port = &PPORT; | 5642{ 5643 emlxs_port_t *port = &PPORT; |
5731 XRIobj_t *xp; | 5644 XRIobj_t *xrip; |
5732 uint16_t iotag; 5733 5734 mutex_enter(&EMLXS_FCTAB_LOCK); 5735 | 5645 uint16_t iotag; 5646 5647 mutex_enter(&EMLXS_FCTAB_LOCK); 5648 |
5736 xp = hba->sli.sli4.XRIfree_f; | 5649 xrip = hba->sli.sli4.XRIfree_f; |
5737 | 5650 |
5738 if (xp == (XRIobj_t *)&hba->sli.sli4.XRIfree_f) { | 5651 if (xrip == (XRIobj_t *)&hba->sli.sli4.XRIfree_f) { |
5739 mutex_exit(&EMLXS_FCTAB_LOCK); 5740 5741 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_err_msg, 5742 "Unable to reserve XRI"); 5743 5744 return (NULL); 5745 } 5746 | 5652 mutex_exit(&EMLXS_FCTAB_LOCK); 5653 5654 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_err_msg, 5655 "Unable to reserve XRI"); 5656 5657 return (NULL); 5658 } 5659 |
5747 iotag = xp->iotag; | 5660 iotag = xrip->iotag; |
5748 5749 if ((!iotag) || | 5661 5662 if ((!iotag) || |
5750 (hba->fc_table[iotag] != NULL && 5751 hba->fc_table[iotag] != STALE_PACKET)) { | 5663 ((hba->fc_table[iotag] != NULL) && 5664 (hba->fc_table[iotag] != STALE_PACKET))) { |
5752 /* 5753 * No more command slots available, retry later 5754 */ 5755 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_pkt_trans_msg, 5756 "Adapter Busy. Unable to reserve iotag"); 5757 5758 mutex_exit(&EMLXS_FCTAB_LOCK); 5759 return (NULL); 5760 } 5761 | 5665 /* 5666 * No more command slots available, retry later 5667 */ 5668 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_pkt_trans_msg, 5669 "Adapter Busy. Unable to reserve iotag"); 5670 5671 mutex_exit(&EMLXS_FCTAB_LOCK); 5672 return (NULL); 5673 } 5674 |
5762 xp->state = (RESOURCE_ALLOCATED | RESOURCE_XRI_RESERVED); 5763 xp->RPIp = rp; 5764 xp->sbp = NULL; | 5675 xrip->state = XRI_STATE_ALLOCATED; 5676 xrip->flag = EMLXS_XRI_RESERVED; 5677 xrip->rpip = rpip; 5678 xrip->sbp = NULL; |
5765 | 5679 |
5766 if (rp) { 5767 rp->outstandingXRIs++; | 5680 if (rpip) { 5681 rpip->xri_count++; |
5768 } 5769 5770 /* Take it off free list */ | 5682 } 5683 5684 /* Take it off free list */ |
5771 (xp->_b)->_f = xp->_f; 5772 (xp->_f)->_b = xp->_b; 5773 xp->_f = NULL; 5774 xp->_b = NULL; | 5685 (xrip->_b)->_f = xrip->_f; 5686 (xrip->_f)->_b = xrip->_b; 5687 xrip->_f = NULL; 5688 xrip->_b = NULL; |
5775 hba->sli.sli4.xrif_count--; 5776 5777 /* Add it to end of inuse list */ | 5689 hba->sli.sli4.xrif_count--; 5690 5691 /* Add it to end of inuse list */ |
5778 xp->_b = hba->sli.sli4.XRIinuse_b; 5779 hba->sli.sli4.XRIinuse_b->_f = xp; 5780 xp->_f = (XRIobj_t *)&hba->sli.sli4.XRIinuse_f; 5781 hba->sli.sli4.XRIinuse_b = xp; | 5692 xrip->_b = hba->sli.sli4.XRIinuse_b; 5693 hba->sli.sli4.XRIinuse_b->_f = xrip; 5694 xrip->_f = (XRIobj_t *)&hba->sli.sli4.XRIinuse_f; 5695 hba->sli.sli4.XRIinuse_b = xrip; |
5782 hba->sli.sli4.xria_count++; 5783 5784 mutex_exit(&EMLXS_FCTAB_LOCK); | 5696 hba->sli.sli4.xria_count++; 5697 5698 mutex_exit(&EMLXS_FCTAB_LOCK); |
5785 return (xp); | 5699 return (xrip); |
5786 5787} /* emlxs_sli4_reserve_xri() */ 5788 5789 5790extern uint32_t | 5700 5701} /* emlxs_sli4_reserve_xri() */ 5702 5703 5704extern uint32_t |
5791emlxs_sli4_unreserve_xri(emlxs_hba_t *hba, uint16_t xri) | 5705emlxs_sli4_unreserve_xri(emlxs_hba_t *hba, uint16_t xri, uint32_t lock) |
5792{ 5793 emlxs_port_t *port = &PPORT; | 5706{ 5707 emlxs_port_t *port = &PPORT; |
5794 XRIobj_t *xp; | 5708 XRIobj_t *xrip; |
5795 | 5709 |
5796 xp = emlxs_sli4_find_xri(hba, xri); | 5710 if (lock) { 5711 mutex_enter(&EMLXS_FCTAB_LOCK); 5712 } |
5797 | 5713 |
5798 mutex_enter(&EMLXS_FCTAB_LOCK); | 5714 xrip = emlxs_sli4_find_xri(hba, xri); |
5799 | 5715 |
5800 if (!xp || xp->state == RESOURCE_FREE) { 5801 mutex_exit(&EMLXS_FCTAB_LOCK); | 5716 if (!xrip || xrip->state == XRI_STATE_FREE) { 5717 if (lock) { 5718 mutex_exit(&EMLXS_FCTAB_LOCK); 5719 } 5720 |
5802 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, | 5721 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, |
5803 "emlxs_sli4_unreserve_xri: xri=%x already freed.", xp->XRI); | 5722 "emlxs_sli4_unreserve_xri: xri=%x already freed.", 5723 xrip->XRI); |
5804 return (0); 5805 } 5806 | 5724 return (0); 5725 } 5726 |
5807 if (!(xp->state & RESOURCE_XRI_RESERVED)) { 5808 mutex_exit(&EMLXS_FCTAB_LOCK); | 5727 if (!(xrip->flag & EMLXS_XRI_RESERVED)) { 5728 if (lock) { 5729 mutex_exit(&EMLXS_FCTAB_LOCK); 5730 } 5731 |
5809 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, | 5732 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, |
5810 "emlxs_sli4_unreserve_xri: xri=%x in use.", xp->XRI); | 5733 "emlxs_sli4_unreserve_xri: xri=%x in use.", xrip->XRI); |
5811 return (1); 5812 } 5813 | 5734 return (1); 5735 } 5736 |
5814 if (hba->fc_table[xp->iotag]) { 5815 hba->fc_table[xp->iotag] = NULL; | 5737 if (xrip->iotag && 5738 (hba->fc_table[xrip->iotag] != NULL) && 5739 (hba->fc_table[xrip->iotag] != STALE_PACKET)) { 5740 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_err_msg, 5741 "emlxs_sli4_unreserve_xri:%x sbp dropped:%p", 5742 xrip->XRI, hba->fc_table[xrip->iotag]); 5743 5744 hba->fc_table[xrip->iotag] = NULL; |
5816 hba->io_count--; 5817 } 5818 | 5745 hba->io_count--; 5746 } 5747 |
5819 xp->state = RESOURCE_FREE; | 5748 xrip->state = XRI_STATE_FREE; |
5820 | 5749 |
5821 if (xp->RPIp) { 5822 xp->RPIp->outstandingXRIs--; 5823 xp->RPIp = NULL; | 5750 if (xrip->rpip) { 5751 xrip->rpip->xri_count--; 5752 xrip->rpip = NULL; |
5824 } 5825 5826 /* Take it off inuse list */ | 5753 } 5754 5755 /* Take it off inuse list */ |
5827 (xp->_b)->_f = xp->_f; 5828 (xp->_f)->_b = xp->_b; 5829 xp->_f = NULL; 5830 xp->_b = NULL; | 5756 (xrip->_b)->_f = xrip->_f; 5757 (xrip->_f)->_b = xrip->_b; 5758 xrip->_f = NULL; 5759 xrip->_b = NULL; |
5831 hba->sli.sli4.xria_count--; 5832 5833 /* Add it to end of free list */ | 5760 hba->sli.sli4.xria_count--; 5761 5762 /* Add it to end of free list */ |
5834 xp->_b = hba->sli.sli4.XRIfree_b; 5835 hba->sli.sli4.XRIfree_b->_f = xp; 5836 xp->_f = (XRIobj_t *)&hba->sli.sli4.XRIfree_f; 5837 hba->sli.sli4.XRIfree_b = xp; | 5763 xrip->_b = hba->sli.sli4.XRIfree_b; 5764 hba->sli.sli4.XRIfree_b->_f = xrip; 5765 xrip->_f = (XRIobj_t *)&hba->sli.sli4.XRIfree_f; 5766 hba->sli.sli4.XRIfree_b = xrip; |
5838 hba->sli.sli4.xrif_count++; 5839 5840 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, | 5767 hba->sli.sli4.xrif_count++; 5768 5769 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, |
5841 "emlxs_sli4_unreserve_xri: xri=%x unreserved.", xp->XRI); | 5770 "emlxs_sli4_unreserve_xri: xri=%x unreserved.", xrip->XRI); |
5842 | 5771 |
5843 mutex_exit(&EMLXS_FCTAB_LOCK); | 5772 if (lock) { 5773 mutex_exit(&EMLXS_FCTAB_LOCK); 5774 } |
5844 5845 return (0); 5846 5847} /* emlxs_sli4_unreserve_xri() */ 5848 5849 5850static XRIobj_t * 5851emlxs_sli4_register_xri(emlxs_hba_t *hba, emlxs_buf_t *sbp, uint16_t xri) 5852{ 5853 emlxs_port_t *port = &PPORT; 5854 uint16_t iotag; | 5775 5776 return (0); 5777 5778} /* emlxs_sli4_unreserve_xri() */ 5779 5780 5781static XRIobj_t * 5782emlxs_sli4_register_xri(emlxs_hba_t *hba, emlxs_buf_t *sbp, uint16_t xri) 5783{ 5784 emlxs_port_t *port = &PPORT; 5785 uint16_t iotag; |
5855 XRIobj_t *xp; | 5786 XRIobj_t *xrip; |
5856 | 5787 |
5857 xp = emlxs_sli4_find_xri(hba, xri); 5858 | |
5859 mutex_enter(&EMLXS_FCTAB_LOCK); 5860 | 5788 mutex_enter(&EMLXS_FCTAB_LOCK); 5789 |
5861 if (!xp) { | 5790 xrip = emlxs_sli4_find_xri(hba, xri); 5791 5792 if (!xrip) { |
5862 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_pkt_trans_msg, 5863 "emlxs_sli4_register_xri: XRI not found."); 5864 5865 5866 mutex_exit(&EMLXS_FCTAB_LOCK); 5867 return (NULL); 5868 } 5869 | 5793 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_pkt_trans_msg, 5794 "emlxs_sli4_register_xri: XRI not found."); 5795 5796 5797 mutex_exit(&EMLXS_FCTAB_LOCK); 5798 return (NULL); 5799 } 5800 |
5870 if (!(xp->state & RESOURCE_ALLOCATED) || 5871 !(xp->state & RESOURCE_XRI_RESERVED)) { | 5801 if ((xrip->state == XRI_STATE_FREE) || 5802 !(xrip->flag & EMLXS_XRI_RESERVED)) { |
5872 5873 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_pkt_trans_msg, | 5803 5804 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_pkt_trans_msg, |
5874 "emlxs_sli4_register_xri: Invalid XRI. xp=%p state=%x", 5875 xp, xp->state); | 5805 "emlxs_sli4_register_xri: Invalid XRI. xrip=%p " 5806 "state=%x flag=%x", 5807 xrip, xrip->state, xrip->flag); |
5876 5877 mutex_exit(&EMLXS_FCTAB_LOCK); 5878 return (NULL); 5879 } 5880 | 5808 5809 mutex_exit(&EMLXS_FCTAB_LOCK); 5810 return (NULL); 5811 } 5812 |
5881 iotag = xp->iotag; | 5813 iotag = xrip->iotag; |
5882 5883 if ((!iotag) || | 5814 5815 if ((!iotag) || |
5884 (hba->fc_table[iotag] != NULL && 5885 hba->fc_table[iotag] != STALE_PACKET)) { | 5816 ((hba->fc_table[iotag] != NULL) && 5817 (hba->fc_table[iotag] != STALE_PACKET))) { |
5886 5887 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_pkt_trans_msg, | 5818 5819 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_pkt_trans_msg, |
5888 "emlxs_sli4_register_xri: Invalid fc_table entry. " \ | 5820 "emlxs_sli4_register_xri: Invalid fc_table entry. " |
5889 "iotag=%x entry=%p", 5890 iotag, hba->fc_table[iotag]); 5891 5892 mutex_exit(&EMLXS_FCTAB_LOCK); 5893 return (NULL); 5894 } 5895 5896 hba->fc_table[iotag] = sbp; 5897 hba->io_count++; 5898 5899 sbp->iotag = iotag; | 5821 "iotag=%x entry=%p", 5822 iotag, hba->fc_table[iotag]); 5823 5824 mutex_exit(&EMLXS_FCTAB_LOCK); 5825 return (NULL); 5826 } 5827 5828 hba->fc_table[iotag] = sbp; 5829 hba->io_count++; 5830 5831 sbp->iotag = iotag; |
5900 sbp->xp = xp; | 5832 sbp->xrip = xrip; |
5901 | 5833 |
5902 xp->state &= ~RESOURCE_XRI_RESERVED; 5903 xp->sbp = sbp; | 5834 xrip->flag &= ~EMLXS_XRI_RESERVED; 5835 xrip->sbp = sbp; |
5904 5905 mutex_exit(&EMLXS_FCTAB_LOCK); 5906 | 5836 5837 mutex_exit(&EMLXS_FCTAB_LOCK); 5838 |
5907 return (xp); | 5839 return (xrip); |
5908 5909} /* emlxs_sli4_register_xri() */ 5910 5911 5912/* Performs both reserve and register functions for XRI */ 5913static XRIobj_t * | 5840 5841} /* emlxs_sli4_register_xri() */ 5842 5843 5844/* Performs both reserve and register functions for XRI */ 5845static XRIobj_t * |
5914emlxs_sli4_alloc_xri(emlxs_hba_t *hba, emlxs_buf_t *sbp, RPIobj_t *rp) | 5846emlxs_sli4_alloc_xri(emlxs_hba_t *hba, emlxs_buf_t *sbp, RPIobj_t *rpip) |
5915{ 5916 emlxs_port_t *port = &PPORT; | 5847{ 5848 emlxs_port_t *port = &PPORT; |
5917 XRIobj_t *xp; | 5849 XRIobj_t *xrip; |
5918 uint16_t iotag; 5919 5920 mutex_enter(&EMLXS_FCTAB_LOCK); 5921 | 5850 uint16_t iotag; 5851 5852 mutex_enter(&EMLXS_FCTAB_LOCK); 5853 |
5922 xp = hba->sli.sli4.XRIfree_f; | 5854 xrip = hba->sli.sli4.XRIfree_f; |
5923 | 5855 |
5924 if (xp == (XRIobj_t *)&hba->sli.sli4.XRIfree_f) { | 5856 if (xrip == (XRIobj_t *)&hba->sli.sli4.XRIfree_f) { |
5925 mutex_exit(&EMLXS_FCTAB_LOCK); 5926 | 5857 mutex_exit(&EMLXS_FCTAB_LOCK); 5858 |
5927 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_err_msg, 5928 "Unable to allocate XRI"); 5929 | |
5930 return (NULL); 5931 } 5932 5933 /* Get the iotag by registering the packet */ | 5859 return (NULL); 5860 } 5861 5862 /* Get the iotag by registering the packet */ |
5934 iotag = xp->iotag; | 5863 iotag = xrip->iotag; |
5935 5936 if ((!iotag) || | 5864 5865 if ((!iotag) || |
5937 (hba->fc_table[iotag] != NULL && 5938 hba->fc_table[iotag] != STALE_PACKET)) { | 5866 ((hba->fc_table[iotag] != NULL) && 5867 (hba->fc_table[iotag] != STALE_PACKET))) { |
5939 /* 5940 * No more command slots available, retry later 5941 */ 5942 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_pkt_trans_msg, | 5868 /* 5869 * No more command slots available, retry later 5870 */ 5871 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_pkt_trans_msg, |
5943 "Adapter Busy. Unable to allocate iotag"); | 5872 "Adapter Busy. Unable to alloc iotag:(0x%x)(%p)", 5873 iotag, hba->fc_table[iotag]); |
5944 5945 mutex_exit(&EMLXS_FCTAB_LOCK); 5946 return (NULL); 5947 } 5948 5949 hba->fc_table[iotag] = sbp; 5950 hba->io_count++; 5951 5952 sbp->iotag = iotag; | 5874 5875 mutex_exit(&EMLXS_FCTAB_LOCK); 5876 return (NULL); 5877 } 5878 5879 hba->fc_table[iotag] = sbp; 5880 hba->io_count++; 5881 5882 sbp->iotag = iotag; |
5953 sbp->xp = xp; | 5883 sbp->xrip = xrip; |
5954 | 5884 |
5955 xp->state = RESOURCE_ALLOCATED; 5956 xp->RPIp = rp; 5957 xp->sbp = sbp; | 5885 xrip->state = XRI_STATE_ALLOCATED; 5886 xrip->flag = 0; 5887 xrip->rpip = rpip; 5888 xrip->sbp = sbp; |
5958 | 5889 |
5959 if (rp) { 5960 rp->outstandingXRIs++; | 5890 if (rpip) { 5891 rpip->xri_count++; |
5961 } 5962 5963 /* Take it off free list */ | 5892 } 5893 5894 /* Take it off free list */ |
5964 (xp->_b)->_f = xp->_f; 5965 (xp->_f)->_b = xp->_b; 5966 xp->_f = NULL; 5967 xp->_b = NULL; | 5895 (xrip->_b)->_f = xrip->_f; 5896 (xrip->_f)->_b = xrip->_b; 5897 xrip->_f = NULL; 5898 xrip->_b = NULL; |
5968 hba->sli.sli4.xrif_count--; 5969 5970 /* Add it to end of inuse list */ | 5899 hba->sli.sli4.xrif_count--; 5900 5901 /* Add it to end of inuse list */ |
5971 xp->_b = hba->sli.sli4.XRIinuse_b; 5972 hba->sli.sli4.XRIinuse_b->_f = xp; 5973 xp->_f = (XRIobj_t *)&hba->sli.sli4.XRIinuse_f; 5974 hba->sli.sli4.XRIinuse_b = xp; | 5902 xrip->_b = hba->sli.sli4.XRIinuse_b; 5903 hba->sli.sli4.XRIinuse_b->_f = xrip; 5904 xrip->_f = (XRIobj_t *)&hba->sli.sli4.XRIinuse_f; 5905 hba->sli.sli4.XRIinuse_b = xrip; |
5975 hba->sli.sli4.xria_count++; 5976 5977 mutex_exit(&EMLXS_FCTAB_LOCK); 5978 | 5906 hba->sli.sli4.xria_count++; 5907 5908 mutex_exit(&EMLXS_FCTAB_LOCK); 5909 |
5979 return (xp); | 5910 return (xrip); |
5980 5981} /* emlxs_sli4_alloc_xri() */ 5982 5983 | 5911 5912} /* emlxs_sli4_alloc_xri() */ 5913 5914 |
5915/* EMLXS_FCTAB_LOCK must be held to enter */ |
|
5984extern XRIobj_t * 5985emlxs_sli4_find_xri(emlxs_hba_t *hba, uint16_t xri) 5986{ 5987 emlxs_port_t *port = &PPORT; | 5916extern XRIobj_t * 5917emlxs_sli4_find_xri(emlxs_hba_t *hba, uint16_t xri) 5918{ 5919 emlxs_port_t *port = &PPORT; |
5988 XRIobj_t *xp; | 5920 XRIobj_t *xrip; |
5989 | 5921 |
5990 mutex_enter(&EMLXS_FCTAB_LOCK); 5991 xp = (XRIobj_t *)hba->sli.sli4.XRIinuse_f; 5992 while (xp != (XRIobj_t *)&hba->sli.sli4.XRIinuse_f) { 5993 if ((xp->state & RESOURCE_ALLOCATED) && 5994 (xp->XRI == xri)) { 5995 break; | 5922 xrip = (XRIobj_t *)hba->sli.sli4.XRIinuse_f; 5923 while (xrip != (XRIobj_t *)&hba->sli.sli4.XRIinuse_f) { 5924 if ((xrip->state >= XRI_STATE_ALLOCATED) && 5925 (xrip->XRI == xri)) { 5926 return (xrip); |
5996 } | 5927 } |
5997 xp = xp->_f; | 5928 xrip = xrip->_f; |
5998 } | 5929 } |
5999 mutex_exit(&EMLXS_FCTAB_LOCK); | |
6000 | 5930 |
6001 if (xp == (XRIobj_t *)&hba->sli.sli4.XRIinuse_f) { 6002 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 6003 "Unable to find XRI x%x", xri); 6004 return (NULL); 6005 } 6006 return (xp); | 5931 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 5932 "Unable to find XRI x%x", xri); |
6007 | 5933 |
5934 return (NULL); 5935 |
|
6008} /* emlxs_sli4_find_xri() */ 6009 | 5936} /* emlxs_sli4_find_xri() */ 5937 |
6010extern void 6011emlxs_sli4_free_fcfi(emlxs_hba_t *hba, FCFIobj_t *fp) 6012{ 6013 emlxs_port_t *port = &PPORT; | |
6014 | 5938 |
6015 mutex_enter(&hba->sli.sli4.id_lock); 6016 if (fp->state == RESOURCE_FREE) { 6017 mutex_exit(&hba->sli.sli4.id_lock); 6018 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 6019 "Free FCFI:%d idx:%d, Already freed", 6020 fp->FCFI, fp->FCF_index); 6021 return; 6022 } | |
6023 | 5939 |
6024 if (fp->outstandingVFIs) { 6025 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 6026 "Free FCFI:%d, %d outstanding VFIs", fp->FCFI, 6027 fp->outstandingVFIs); 6028 } 6029 fp->state = RESOURCE_FREE; 6030 fp->FCF_index = 0; 6031 bzero(&fp->fcf_rec, sizeof (FCF_RECORD_t)); 6032 fp->fcf_vfi = 0; 6033 fp->fcf_vpi = 0; | |
6034 | 5940 |
6035 mutex_exit(&hba->sli.sli4.id_lock); 6036 6037} /* emlxs_sli4_free_fcfi() */ 6038 6039 | |
6040extern void | 5941extern void |
6041emlxs_sli4_free_vfi(emlxs_hba_t *hba, VFIobj_t *fp) | 5942emlxs_sli4_free_xri(emlxs_hba_t *hba, emlxs_buf_t *sbp, XRIobj_t *xrip, 5943 uint8_t lock) |
6042{ 6043 emlxs_port_t *port = &PPORT; 6044 | 5944{ 5945 emlxs_port_t *port = &PPORT; 5946 |
6045 mutex_enter(&hba->sli.sli4.id_lock); 6046 if (fp->state == RESOURCE_FREE) { 6047 mutex_exit(&hba->sli.sli4.id_lock); 6048 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 6049 "Free VFI:%d, Already freed", fp->VFI); 6050 return; | 5947 if (lock) { 5948 mutex_enter(&EMLXS_FCTAB_LOCK); |
6051 } 6052 | 5949 } 5950 |
6053 if (fp->outstandingVPIs) { 6054 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 6055 "Free VFI:%d, %d outstanding VPIs", fp->VFI, 6056 fp->outstandingVPIs); 6057 } 6058 fp->state = RESOURCE_FREE; 6059 fp->FCFIp->outstandingVFIs--; 6060 mutex_exit(&hba->sli.sli4.id_lock); 6061 6062 if ((fp->FCFIp->outstandingVFIs == 0) && 6063 (hba->state == FC_LINK_DOWN)) { 6064 6065 /* No more VPIs so unreg the VFI */ 6066 (void) emlxs_mb_unreg_fcfi(hba, fp->FCFIp); 6067 } 6068 fp->FCFIp = NULL; 6069 6070 6071} /* emlxs_sli4_free_vfi() */ 6072 6073 6074static void 6075emlxs_sli4_free_vpi(emlxs_hba_t *hba, emlxs_port_t *pp) 6076{ 6077 emlxs_port_t *port = &PPORT; 6078 6079 if (!(pp->flag & EMLXS_PORT_ENABLE)) { 6080 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 6081 "Free VPI:%d, Already freed", pp->vpi); 6082 return; 6083 } 6084 6085 mutex_enter(&hba->sli.sli4.id_lock); 6086 if (pp->outstandingRPIs) { 6087 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 6088 "Free VPI:%d, %d outstanding RPIs", pp->vpi, 6089 pp->outstandingRPIs); 6090 } 6091 pp->VFIp->outstandingVPIs--; 6092 if (pp->VFIp->outstandingVPIs == 0) { 6093 /* No more VPIs so unreg the VFI */ 6094 (void) emlxs_mb_unreg_vfi(hba, pp->VFIp); 6095 } 6096 6097 pp->VFIp = NULL; 6098 mutex_exit(&hba->sli.sli4.id_lock); 6099 6100} /* emlxs_sli4_free_vpi() */ 6101 6102 6103static void 6104emlxs_sli4_cmpl_io(emlxs_hba_t *hba, emlxs_buf_t *sbp) 6105{ 6106 CHANNEL *cp; 6107 IOCBQ *iocbq; 6108 CQE_u cq_entry; 6109 6110 cp = sbp->channel; 6111 iocbq = &sbp->iocbq; 6112 6113 bzero((void *) &cq_entry, sizeof (CQE_u)); 6114 cq_entry.cqCmplEntry.Status = IOSTAT_LOCAL_REJECT; 6115 cq_entry.cqCmplEntry.Parameter = IOERR_SEQUENCE_TIMEOUT; 6116 cq_entry.cqCmplEntry.RequestTag = sbp->iotag; 6117 emlxs_CQE_to_IOCB(hba, &cq_entry.cqCmplEntry, sbp); 6118 6119 /* 6120 * If this is NOT a polled command completion 6121 * or a driver allocated pkt, then defer pkt 6122 * completion. 6123 */ 6124 if (!(sbp->pkt_flags & 6125 (PACKET_POLLED | PACKET_ALLOCATED))) { 6126 /* Add the IOCB to the channel list */ 6127 mutex_enter(&cp->rsp_lock); 6128 if (cp->rsp_head == NULL) { 6129 cp->rsp_head = iocbq; 6130 cp->rsp_tail = iocbq; 6131 } else { 6132 cp->rsp_tail->next = iocbq; 6133 cp->rsp_tail = iocbq; 6134 } 6135 mutex_exit(&cp->rsp_lock); 6136 6137 /* Delay triggering thread till end of ISR */ 6138 cp->chan_flag |= EMLXS_NEEDS_TRIGGER; 6139 } else { 6140 emlxs_proc_channel_event(hba, cp, iocbq); 6141 } 6142} /* emlxs_sli4_cmpl_io() */ 6143 6144extern void 6145emlxs_sli4_free_rpi(emlxs_hba_t *hba, RPIobj_t *rp) 6146{ 6147 emlxs_port_t *port = &PPORT; 6148 XRIobj_t *xp; 6149 XRIobj_t *next_xp; 6150 6151 mutex_enter(&hba->sli.sli4.id_lock); 6152 if (rp->state == RESOURCE_FREE) { 6153 mutex_exit(&hba->sli.sli4.id_lock); 6154 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 6155 "Free RPI:%d, Already freed", rp->RPI); 6156 return; 6157 } 6158 if (rp->outstandingXRIs) { 6159 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 6160 "Free RPI:%d, %d outstanding XRIs", rp->RPI, 6161 rp->outstandingXRIs); 6162 } 6163 rp->state = RESOURCE_FREE; 6164 rp->VPIp = NULL; 6165 mutex_exit(&hba->sli.sli4.id_lock); 6166 6167 /* Break node/RPI binding */ 6168 if (rp->node) { 6169 rw_enter(&port->node_rwlock, RW_WRITER); 6170 rp->node->RPIp = NULL; 6171 rp->node = NULL; 6172 rw_exit(&port->node_rwlock); 6173 } 6174 6175 mutex_enter(&EMLXS_FCTAB_LOCK); 6176 /* Remove all XRIs under this RPI */ 6177 xp = (XRIobj_t *)hba->sli.sli4.XRIinuse_f; 6178 while (xp != (XRIobj_t *)&hba->sli.sli4.XRIinuse_f) { 6179 next_xp = xp->_f; 6180 if ((xp->state & RESOURCE_ALLOCATED) && 6181 (xp->RPIp == rp)) { 6182 xp->RPIp->outstandingXRIs--; 6183 xp->RPIp = NULL; 6184 } 6185 xp = next_xp; 6186 } 6187 mutex_exit(&EMLXS_FCTAB_LOCK); 6188 6189} /* emlxs_sli4_free_rpi() */ 6190 6191 6192extern void 6193emlxs_sli4_free_xri(emlxs_hba_t *hba, emlxs_buf_t *sbp, XRIobj_t *xp) 6194{ 6195 emlxs_port_t *port = &PPORT; 6196 6197 mutex_enter(&EMLXS_FCTAB_LOCK); 6198 if (xp) { 6199 if (xp->state == RESOURCE_FREE) { 6200 mutex_exit(&EMLXS_FCTAB_LOCK); | 5951 if (xrip) { 5952 if (xrip->state == XRI_STATE_FREE) { 5953 if (lock) { 5954 mutex_exit(&EMLXS_FCTAB_LOCK); 5955 } |
6201 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, | 5956 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, |
6202 "Free XRI:%x, Already freed", xp->XRI); | 5957 "Free XRI:%x, Already freed", xrip->XRI); |
6203 return; 6204 } 6205 | 5958 return; 5959 } 5960 |
6206 if (hba->fc_table[xp->iotag]) { 6207 hba->fc_table[xp->iotag] = NULL; | 5961 if (xrip->iotag && 5962 (hba->fc_table[xrip->iotag] != NULL) && 5963 (hba->fc_table[xrip->iotag] != STALE_PACKET)) { 5964 hba->fc_table[xrip->iotag] = NULL; |
6208 hba->io_count--; 6209 } 6210 | 5965 hba->io_count--; 5966 } 5967 |
6211 xp->state = RESOURCE_FREE; | 5968 xrip->state = XRI_STATE_FREE; 5969 xrip->flag = 0; |
6212 | 5970 |
6213 if (xp->RPIp) { 6214 xp->RPIp->outstandingXRIs--; 6215 xp->RPIp = NULL; | 5971 if (xrip->rpip) { 5972 xrip->rpip->xri_count--; 5973 xrip->rpip = NULL; |
6216 } 6217 6218 /* Take it off inuse list */ | 5974 } 5975 5976 /* Take it off inuse list */ |
6219 (xp->_b)->_f = xp->_f; 6220 (xp->_f)->_b = xp->_b; 6221 xp->_f = NULL; 6222 xp->_b = NULL; | 5977 (xrip->_b)->_f = xrip->_f; 5978 (xrip->_f)->_b = xrip->_b; 5979 xrip->_f = NULL; 5980 xrip->_b = NULL; |
6223 hba->sli.sli4.xria_count--; 6224 6225 /* Add it to end of free list */ | 5981 hba->sli.sli4.xria_count--; 5982 5983 /* Add it to end of free list */ |
6226 xp->_b = hba->sli.sli4.XRIfree_b; 6227 hba->sli.sli4.XRIfree_b->_f = xp; 6228 xp->_f = (XRIobj_t *)&hba->sli.sli4.XRIfree_f; 6229 hba->sli.sli4.XRIfree_b = xp; | 5984 xrip->_b = hba->sli.sli4.XRIfree_b; 5985 hba->sli.sli4.XRIfree_b->_f = xrip; 5986 xrip->_f = (XRIobj_t *)&hba->sli.sli4.XRIfree_f; 5987 hba->sli.sli4.XRIfree_b = xrip; |
6230 hba->sli.sli4.xrif_count++; 6231 } 6232 6233 if (sbp) { | 5988 hba->sli.sli4.xrif_count++; 5989 } 5990 5991 if (sbp) { |
6234 sbp->xp = 0; | 5992 if (!(sbp->pkt_flags & PACKET_VALID) || 5993 (sbp->pkt_flags & 5994 (PACKET_ULP_OWNED|PACKET_COMPLETED|PACKET_IN_COMPLETION))) { 5995 if (lock) { 5996 mutex_exit(&EMLXS_FCTAB_LOCK); 5997 } 5998 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 5999 "Free XRI: sbp invalid. sbp=%p flags=%x xri=%x", 6000 sbp, sbp->pkt_flags, ((xrip)? xrip->XRI:0)); 6001 return; 6002 } |
6235 | 6003 |
6236 if (xp && (xp->iotag != sbp->iotag)) { 6237 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_err_msg, | 6004 sbp->xrip = 0; 6005 6006 if (xrip && (xrip->iotag != sbp->iotag)) { 6007 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_debug_msg, |
6238 "sbp / iotag mismatch %p iotag:%d %d", sbp, | 6008 "sbp / iotag mismatch %p iotag:%d %d", sbp, |
6239 sbp->iotag, xp->iotag); | 6009 sbp->iotag, xrip->iotag); |
6240 } 6241 6242 if (sbp->iotag) { | 6010 } 6011 6012 if (sbp->iotag) { |
6243 if (hba->fc_table[sbp->iotag]) { | 6013 if (sbp == hba->fc_table[sbp->iotag]) { |
6244 hba->fc_table[sbp->iotag] = NULL; 6245 hba->io_count--; 6246 } 6247 sbp->iotag = 0; 6248 } 6249 | 6014 hba->fc_table[sbp->iotag] = NULL; 6015 hba->io_count--; 6016 } 6017 sbp->iotag = 0; 6018 } 6019 |
6250 mutex_exit(&EMLXS_FCTAB_LOCK); | 6020 if (lock) { 6021 mutex_exit(&EMLXS_FCTAB_LOCK); 6022 } |
6251 6252 /* Clean up the sbp */ 6253 mutex_enter(&sbp->mtx); 6254 6255 if (sbp->pkt_flags & PACKET_IN_TXQ) { 6256 sbp->pkt_flags &= ~PACKET_IN_TXQ; 6257 hba->channel_tx_count--; 6258 } 6259 6260 if (sbp->pkt_flags & PACKET_IN_CHIPQ) { 6261 sbp->pkt_flags &= ~PACKET_IN_CHIPQ; 6262 } 6263 6264 mutex_exit(&sbp->mtx); 6265 } else { | 6023 6024 /* Clean up the sbp */ 6025 mutex_enter(&sbp->mtx); 6026 6027 if (sbp->pkt_flags & PACKET_IN_TXQ) { 6028 sbp->pkt_flags &= ~PACKET_IN_TXQ; 6029 hba->channel_tx_count--; 6030 } 6031 6032 if (sbp->pkt_flags & PACKET_IN_CHIPQ) { 6033 sbp->pkt_flags &= ~PACKET_IN_CHIPQ; 6034 } 6035 6036 mutex_exit(&sbp->mtx); 6037 } else { |
6266 mutex_exit(&EMLXS_FCTAB_LOCK); | 6038 if (lock) { 6039 mutex_exit(&EMLXS_FCTAB_LOCK); 6040 } |
6267 } 6268 6269} /* emlxs_sli4_free_xri() */ 6270 6271 6272static int 6273emlxs_sli4_post_sgl_pages(emlxs_hba_t *hba, MAILBOXQ *mbq) 6274{ 6275 MAILBOX4 *mb = (MAILBOX4 *)mbq; 6276 emlxs_port_t *port = &PPORT; | 6041 } 6042 6043} /* emlxs_sli4_free_xri() */ 6044 6045 6046static int 6047emlxs_sli4_post_sgl_pages(emlxs_hba_t *hba, MAILBOXQ *mbq) 6048{ 6049 MAILBOX4 *mb = (MAILBOX4 *)mbq; 6050 emlxs_port_t *port = &PPORT; |
6277 XRIobj_t *xp; | 6051 XRIobj_t *xrip; |
6278 MATCHMAP *mp; 6279 mbox_req_hdr_t *hdr_req; 6280 uint32_t i, cnt, xri_cnt; 6281 uint32_t size; 6282 IOCTL_FCOE_CFG_POST_SGL_PAGES *post_sgl; 6283 6284 bzero((void *) mb, MAILBOX_CMD_SLI4_BSIZE); 6285 mbq->bp = NULL; 6286 mbq->mbox_cmpl = NULL; 6287 6288 if ((mp = emlxs_mem_buf_alloc(hba, EMLXS_MAX_NONEMBED_SIZE)) == 0) { 6289 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 6290 "Unable to POST_SGL. Mailbox cmd=%x ", 6291 mb->mbxCommand); 6292 return (EIO); 6293 } | 6052 MATCHMAP *mp; 6053 mbox_req_hdr_t *hdr_req; 6054 uint32_t i, cnt, xri_cnt; 6055 uint32_t size; 6056 IOCTL_FCOE_CFG_POST_SGL_PAGES *post_sgl; 6057 6058 bzero((void *) mb, MAILBOX_CMD_SLI4_BSIZE); 6059 mbq->bp = NULL; 6060 mbq->mbox_cmpl = NULL; 6061 6062 if ((mp = emlxs_mem_buf_alloc(hba, EMLXS_MAX_NONEMBED_SIZE)) == 0) { 6063 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 6064 "Unable to POST_SGL. Mailbox cmd=%x ", 6065 mb->mbxCommand); 6066 return (EIO); 6067 } |
6294 mbq->nonembed = (uint8_t *)mp; | 6068 mbq->nonembed = (void *)mp; |
6295 6296 /* 6297 * Signifies a non embedded command 6298 */ 6299 mb->un.varSLIConfig.be.embedded = 0; 6300 mb->mbxCommand = MBX_SLI_CONFIG; 6301 mb->mbxOwner = OWN_HOST; 6302 6303 hdr_req = (mbox_req_hdr_t *)mp->virt; 6304 post_sgl = 6305 (IOCTL_FCOE_CFG_POST_SGL_PAGES *)(hdr_req + 1); 6306 6307 | 6069 6070 /* 6071 * Signifies a non embedded command 6072 */ 6073 mb->un.varSLIConfig.be.embedded = 0; 6074 mb->mbxCommand = MBX_SLI_CONFIG; 6075 mb->mbxOwner = OWN_HOST; 6076 6077 hdr_req = (mbox_req_hdr_t *)mp->virt; 6078 post_sgl = 6079 (IOCTL_FCOE_CFG_POST_SGL_PAGES *)(hdr_req + 1); 6080 6081 |
6308 xp = hba->sli.sli4.XRIp; | 6082 xrip = hba->sli.sli4.XRIp; |
6309 cnt = hba->sli.sli4.XRICount; 6310 while (cnt) { 6311 bzero((void *) hdr_req, mp->size); 6312 size = mp->size - IOCTL_HEADER_SZ; 6313 6314 mb->un.varSLIConfig.be.payload_length = 6315 mp->size; 6316 mb->un.varSLIConfig.be.un_hdr.hdr_req.subsystem = --- 4 unchanged lines hidden (view full) --- 6321 mb->un.varSLIConfig.be.un_hdr.hdr_req.req_length = size; 6322 6323 hdr_req->subsystem = IOCTL_SUBSYSTEM_FCOE; 6324 hdr_req->opcode = FCOE_OPCODE_CFG_POST_SGL_PAGES; 6325 hdr_req->timeout = 0; 6326 hdr_req->req_length = size; 6327 6328 post_sgl->params.request.xri_count = 0; | 6083 cnt = hba->sli.sli4.XRICount; 6084 while (cnt) { 6085 bzero((void *) hdr_req, mp->size); 6086 size = mp->size - IOCTL_HEADER_SZ; 6087 6088 mb->un.varSLIConfig.be.payload_length = 6089 mp->size; 6090 mb->un.varSLIConfig.be.un_hdr.hdr_req.subsystem = --- 4 unchanged lines hidden (view full) --- 6095 mb->un.varSLIConfig.be.un_hdr.hdr_req.req_length = size; 6096 6097 hdr_req->subsystem = IOCTL_SUBSYSTEM_FCOE; 6098 hdr_req->opcode = FCOE_OPCODE_CFG_POST_SGL_PAGES; 6099 hdr_req->timeout = 0; 6100 hdr_req->req_length = size; 6101 6102 post_sgl->params.request.xri_count = 0; |
6329 post_sgl->params.request.xri_start = xp->XRI; | 6103 post_sgl->params.request.xri_start = xrip->XRI; |
6330 xri_cnt = (size - sizeof (IOCTL_FCOE_CFG_POST_SGL_PAGES)) / 6331 sizeof (FCOE_SGL_PAGES); 6332 for (i = 0; i < xri_cnt; i++) { 6333 6334 post_sgl->params.request.xri_count++; 6335 post_sgl->params.request.pages[i].sgl_page0.addrLow = | 6104 xri_cnt = (size - sizeof (IOCTL_FCOE_CFG_POST_SGL_PAGES)) / 6105 sizeof (FCOE_SGL_PAGES); 6106 for (i = 0; i < xri_cnt; i++) { 6107 6108 post_sgl->params.request.xri_count++; 6109 post_sgl->params.request.pages[i].sgl_page0.addrLow = |
6336 PADDR_LO(xp->SGList.phys); | 6110 PADDR_LO(xrip->SGList.phys); |
6337 post_sgl->params.request.pages[i].sgl_page0.addrHigh = | 6111 post_sgl->params.request.pages[i].sgl_page0.addrHigh = |
6338 PADDR_HI(xp->SGList.phys); | 6112 PADDR_HI(xrip->SGList.phys); |
6339 cnt--; | 6113 cnt--; |
6340 xp++; | 6114 xrip++; |
6341 if (cnt == 0) { 6342 break; 6343 } 6344 } 6345 if (emlxs_sli4_issue_mbox_cmd(hba, mbq, MBX_WAIT, 0) != 6346 MBX_SUCCESS) { 6347 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 6348 "Unable to POST_SGL. Mailbox cmd=%x status=%x " 6349 "XRI cnt:%d start:%d", 6350 mb->mbxCommand, mb->mbxStatus, 6351 post_sgl->params.request.xri_count, 6352 post_sgl->params.request.xri_start); | 6115 if (cnt == 0) { 6116 break; 6117 } 6118 } 6119 if (emlxs_sli4_issue_mbox_cmd(hba, mbq, MBX_WAIT, 0) != 6120 MBX_SUCCESS) { 6121 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 6122 "Unable to POST_SGL. Mailbox cmd=%x status=%x " 6123 "XRI cnt:%d start:%d", 6124 mb->mbxCommand, mb->mbxStatus, 6125 post_sgl->params.request.xri_count, 6126 post_sgl->params.request.xri_start); |
6353 (void) emlxs_mem_buf_free(hba, mp); 6354 mbq->nonembed = (uint8_t *)NULL; | 6127 emlxs_mem_buf_free(hba, mp); 6128 mbq->nonembed = NULL; |
6355 return (EIO); 6356 } 6357 } | 6129 return (EIO); 6130 } 6131 } |
6358 (void) emlxs_mem_buf_free(hba, mp); 6359 mbq->nonembed = (uint8_t *)NULL; | 6132 emlxs_mem_buf_free(hba, mp); 6133 mbq->nonembed = NULL; |
6360 return (0); 6361 6362} /* emlxs_sli4_post_sgl_pages() */ 6363 6364 6365static int 6366emlxs_sli4_post_hdr_tmplates(emlxs_hba_t *hba, MAILBOXQ *mbq) 6367{ --- 41 unchanged lines hidden (view full) --- 6409 6410 if (emlxs_sli4_issue_mbox_cmd(hba, mbq, MBX_WAIT, 0) != 6411 MBX_SUCCESS) { 6412 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 6413 "Unable to POST_HDR_TEMPLATES. Mailbox cmd=%x status=%x ", 6414 mb->mbxCommand, mb->mbxStatus); 6415 return (EIO); 6416 } | 6134 return (0); 6135 6136} /* emlxs_sli4_post_sgl_pages() */ 6137 6138 6139static int 6140emlxs_sli4_post_hdr_tmplates(emlxs_hba_t *hba, MAILBOXQ *mbq) 6141{ --- 41 unchanged lines hidden (view full) --- 6183 6184 if (emlxs_sli4_issue_mbox_cmd(hba, mbq, MBX_WAIT, 0) != 6185 MBX_SUCCESS) { 6186 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 6187 "Unable to POST_HDR_TEMPLATES. Mailbox cmd=%x status=%x ", 6188 mb->mbxCommand, mb->mbxStatus); 6189 return (EIO); 6190 } |
6417emlxs_data_dump(hba, "POST_HDR", (uint32_t *)mb, 18, 0); | 6191emlxs_data_dump(port, "POST_HDR", (uint32_t *)mb, 18, 0); |
6418 return (0); 6419 6420} /* emlxs_sli4_post_hdr_tmplates() */ 6421 6422 6423static int 6424emlxs_sli4_create_queues(emlxs_hba_t *hba, MAILBOXQ *mbq) 6425{ 6426 MAILBOX4 *mb = (MAILBOX4 *)mbq; 6427 emlxs_port_t *port = &PPORT; 6428 emlxs_config_t *cfg = &CFG; 6429 IOCTL_COMMON_EQ_CREATE *eq; 6430 IOCTL_COMMON_CQ_CREATE *cq; 6431 IOCTL_FCOE_WQ_CREATE *wq; 6432 IOCTL_FCOE_RQ_CREATE *rq; 6433 IOCTL_COMMON_MQ_CREATE *mq; | 6192 return (0); 6193 6194} /* emlxs_sli4_post_hdr_tmplates() */ 6195 6196 6197static int 6198emlxs_sli4_create_queues(emlxs_hba_t *hba, MAILBOXQ *mbq) 6199{ 6200 MAILBOX4 *mb = (MAILBOX4 *)mbq; 6201 emlxs_port_t *port = &PPORT; 6202 emlxs_config_t *cfg = &CFG; 6203 IOCTL_COMMON_EQ_CREATE *eq; 6204 IOCTL_COMMON_CQ_CREATE *cq; 6205 IOCTL_FCOE_WQ_CREATE *wq; 6206 IOCTL_FCOE_RQ_CREATE *rq; 6207 IOCTL_COMMON_MQ_CREATE *mq; |
6208 IOCTL_COMMON_MCC_CREATE_EXT *mcc_ext; |
|
6434 emlxs_rqdbu_t rqdb; | 6209 emlxs_rqdbu_t rqdb; |
6435 int i, j; 6436 int num_cq, total_cq; 6437 int num_wq, total_wq; | 6210 uint16_t i, j; 6211 uint16_t num_cq, total_cq; 6212 uint16_t num_wq, total_wq; |
6438 6439 /* 6440 * The first CQ is reserved for ASYNC events, 6441 * the second is reserved for unsol rcv, the rest 6442 * correspond to WQs. (WQ0 -> CQ2, WQ1 -> CQ3, ...) 6443 */ 6444 6445 /* First initialize queue ordinal mapping */ --- 23 unchanged lines hidden (view full) --- 6469 i, mb->mbxCommand, mb->mbxStatus); 6470 return (EIO); 6471 } 6472 eq = (IOCTL_COMMON_EQ_CREATE *)&mb->un.varSLIConfig.payload; 6473 hba->sli.sli4.eq[i].qid = eq->params.response.EQId; 6474 hba->sli.sli4.eq_map[eq->params.response.EQId] = i; 6475 hba->sli.sli4.eq[i].lastwq = total_wq; 6476 | 6213 6214 /* 6215 * The first CQ is reserved for ASYNC events, 6216 * the second is reserved for unsol rcv, the rest 6217 * correspond to WQs. (WQ0 -> CQ2, WQ1 -> CQ3, ...) 6218 */ 6219 6220 /* First initialize queue ordinal mapping */ --- 23 unchanged lines hidden (view full) --- 6244 i, mb->mbxCommand, mb->mbxStatus); 6245 return (EIO); 6246 } 6247 eq = (IOCTL_COMMON_EQ_CREATE *)&mb->un.varSLIConfig.payload; 6248 hba->sli.sli4.eq[i].qid = eq->params.response.EQId; 6249 hba->sli.sli4.eq_map[eq->params.response.EQId] = i; 6250 hba->sli.sli4.eq[i].lastwq = total_wq; 6251 |
6477emlxs_data_dump(hba, "EQ0_CREATE", (uint32_t *)mb, 18, 0); | 6252emlxs_data_dump(port, "EQ0_CREATE", (uint32_t *)mb, 18, 0); |
6478 num_wq = cfg[CFG_NUM_WQ].current; 6479 num_cq = num_wq; 6480 if (i == 0) { 6481 /* One for RQ handling, one for mbox/event handling */ 6482 num_cq += EMLXS_CQ_OFFSET_WQ; 6483 } 6484 6485 for (j = 0; j < num_cq; j++) { --- 35 unchanged lines hidden (view full) --- 6521 default: 6522 /* Setup CQ to channel mapping */ 6523 hba->sli.sli4.cq[total_cq].type = 6524 EMLXS_CQ_TYPE_GROUP2; 6525 hba->sli.sli4.cq[total_cq].channelp = 6526 &hba->chan[total_cq - EMLXS_CQ_OFFSET_WQ]; 6527 break; 6528 } | 6253 num_wq = cfg[CFG_NUM_WQ].current; 6254 num_cq = num_wq; 6255 if (i == 0) { 6256 /* One for RQ handling, one for mbox/event handling */ 6257 num_cq += EMLXS_CQ_OFFSET_WQ; 6258 } 6259 6260 for (j = 0; j < num_cq; j++) { --- 35 unchanged lines hidden (view full) --- 6296 default: 6297 /* Setup CQ to channel mapping */ 6298 hba->sli.sli4.cq[total_cq].type = 6299 EMLXS_CQ_TYPE_GROUP2; 6300 hba->sli.sli4.cq[total_cq].channelp = 6301 &hba->chan[total_cq - EMLXS_CQ_OFFSET_WQ]; 6302 break; 6303 } |
6529emlxs_data_dump(hba, "CQX_CREATE", (uint32_t *)mb, 18, 0); | 6304emlxs_data_dump(port, "CQX_CREATE", (uint32_t *)mb, 18, 0); |
6530 total_cq++; 6531 } 6532 6533 for (j = 0; j < num_wq; j++) { 6534 /* Reuse mbq from previous mbox */ 6535 bzero(mbq, sizeof (MAILBOXQ)); 6536 6537 hba->sli.sli4.wq[total_wq].cqid = --- 12 unchanged lines hidden (view full) --- 6550 &mb->un.varSLIConfig.payload; 6551 hba->sli.sli4.wq[total_wq].qid = 6552 wq->params.response.WQId; 6553 hba->sli.sli4.wq_map[wq->params.response.WQId] = 6554 total_wq; 6555 6556 hba->sli.sli4.wq[total_wq].cqid = 6557 hba->sli.sli4.cq[total_wq+EMLXS_CQ_OFFSET_WQ].qid; | 6305 total_cq++; 6306 } 6307 6308 for (j = 0; j < num_wq; j++) { 6309 /* Reuse mbq from previous mbox */ 6310 bzero(mbq, sizeof (MAILBOXQ)); 6311 6312 hba->sli.sli4.wq[total_wq].cqid = --- 12 unchanged lines hidden (view full) --- 6325 &mb->un.varSLIConfig.payload; 6326 hba->sli.sli4.wq[total_wq].qid = 6327 wq->params.response.WQId; 6328 hba->sli.sli4.wq_map[wq->params.response.WQId] = 6329 total_wq; 6330 6331 hba->sli.sli4.wq[total_wq].cqid = 6332 hba->sli.sli4.cq[total_wq+EMLXS_CQ_OFFSET_WQ].qid; |
6558emlxs_data_dump(hba, "WQ_CREATE", (uint32_t *)mb, 18, 0); | 6333emlxs_data_dump(port, "WQ_CREATE", (uint32_t *)mb, 18, 0); |
6559 total_wq++; 6560 } | 6334 total_wq++; 6335 } |
6336 hba->last_msiid = i; |
|
6561 } 6562 6563 /* We assume 1 RQ pair will handle ALL incoming data */ 6564 /* Create RQs */ 6565 for (i = 0; i < EMLXS_MAX_RQS; i++) { 6566 /* Personalize the RQ */ 6567 switch (i) { 6568 case 0: --- 17 unchanged lines hidden (view full) --- 6586 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_init_failed_msg, 6587 "Unable to Create RQ %d: Mailbox cmd=%x status=%x ", 6588 i, mb->mbxCommand, mb->mbxStatus); 6589 return (EIO); 6590 } 6591 rq = (IOCTL_FCOE_RQ_CREATE *)&mb->un.varSLIConfig.payload; 6592 hba->sli.sli4.rq[i].qid = rq->params.response.RQId; 6593 hba->sli.sli4.rq_map[rq->params.response.RQId] = i; | 6337 } 6338 6339 /* We assume 1 RQ pair will handle ALL incoming data */ 6340 /* Create RQs */ 6341 for (i = 0; i < EMLXS_MAX_RQS; i++) { 6342 /* Personalize the RQ */ 6343 switch (i) { 6344 case 0: --- 17 unchanged lines hidden (view full) --- 6362 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_init_failed_msg, 6363 "Unable to Create RQ %d: Mailbox cmd=%x status=%x ", 6364 i, mb->mbxCommand, mb->mbxStatus); 6365 return (EIO); 6366 } 6367 rq = (IOCTL_FCOE_RQ_CREATE *)&mb->un.varSLIConfig.payload; 6368 hba->sli.sli4.rq[i].qid = rq->params.response.RQId; 6369 hba->sli.sli4.rq_map[rq->params.response.RQId] = i; |
6594emlxs_data_dump(hba, "RQ CREATE", (uint32_t *)mb, 18, 0); | 6370emlxs_data_dump(port, "RQ CREATE", (uint32_t *)mb, 18, 0); |
6595 6596 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 6597 "RQ CREATE: rq[%d].qid=%d cqid=%d", 6598 i, hba->sli.sli4.rq[i].qid, hba->sli.sli4.rq[i].cqid); 6599 6600 /* Initialize the host_index */ 6601 hba->sli.sli4.rq[i].host_index = 0; 6602 --- 16 unchanged lines hidden (view full) --- 6619 /* Create MQ */ 6620 6621 /* Personalize the MQ */ 6622 hba->sli.sli4.mq.cqid = hba->sli.sli4.cq[EMLXS_CQ_MBOX].qid; 6623 6624 /* Reuse mbq from previous mbox */ 6625 bzero(mbq, sizeof (MAILBOXQ)); 6626 | 6371 6372 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 6373 "RQ CREATE: rq[%d].qid=%d cqid=%d", 6374 i, hba->sli.sli4.rq[i].qid, hba->sli.sli4.rq[i].cqid); 6375 6376 /* Initialize the host_index */ 6377 hba->sli.sli4.rq[i].host_index = 0; 6378 --- 16 unchanged lines hidden (view full) --- 6395 /* Create MQ */ 6396 6397 /* Personalize the MQ */ 6398 hba->sli.sli4.mq.cqid = hba->sli.sli4.cq[EMLXS_CQ_MBOX].qid; 6399 6400 /* Reuse mbq from previous mbox */ 6401 bzero(mbq, sizeof (MAILBOXQ)); 6402 |
6627 emlxs_mb_mq_create(hba, mbq); | 6403 emlxs_mb_mcc_create_ext(hba, mbq); |
6628 if (emlxs_sli4_issue_mbox_cmd(hba, mbq, MBX_WAIT, 0) != 6629 MBX_SUCCESS) { 6630 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_init_failed_msg, | 6404 if (emlxs_sli4_issue_mbox_cmd(hba, mbq, MBX_WAIT, 0) != 6405 MBX_SUCCESS) { 6406 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_init_failed_msg, |
6631 "Unable to Create MQ %d: Mailbox cmd=%x status=%x ", | 6407 "Unable to Create MCC_EXT %d: Mailbox cmd=%x status=%x ", |
6632 i, mb->mbxCommand, mb->mbxStatus); | 6408 i, mb->mbxCommand, mb->mbxStatus); |
6633 return (EIO); 6634 } 6635 mq = (IOCTL_COMMON_MQ_CREATE *)&mb->un.varSLIConfig.payload; 6636 hba->sli.sli4.mq.qid = mq->params.response.MQId; 6637 return (0); | |
6638 | 6409 |
6639} /* emlxs_sli4_create_queues() */ | 6410 /* Reuse mbq from previous mbox */ 6411 bzero(mbq, sizeof (MAILBOXQ)); |
6640 | 6412 |
6413 emlxs_mb_mq_create(hba, mbq); 6414 if (emlxs_sli4_issue_mbox_cmd(hba, mbq, MBX_WAIT, 0) != 6415 MBX_SUCCESS) { 6416 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_init_failed_msg, 6417 "Unable to Create MQ %d: Mailbox cmd=%x status=%x ", 6418 i, mb->mbxCommand, mb->mbxStatus); 6419 return (EIO); 6420 } |
|
6641 | 6421 |
6642static int 6643emlxs_fcf_bind(emlxs_hba_t *hba) 6644{ 6645 MAILBOXQ *mbq; 6646 int rc; 6647 6648 if (!(mbq = (MAILBOXQ *)emlxs_mem_get(hba, MEM_MBOX, 1))) { | 6422 mq = (IOCTL_COMMON_MQ_CREATE *)&mb->un.varSLIConfig.payload; 6423 hba->sli.sli4.mq.qid = mq->params.response.MQId; |
6649 return (0); 6650 } | 6424 return (0); 6425 } |
6651 if (!(hba->flag & FC_FIP_SUPPORTED)) { 6652 /* 6653 * If the firmware donesn't support FIP, we must 6654 * build the fcf table manually first. 6655 */ 6656 rc = emlxs_mbext_add_fcf_table(hba, mbq, 0); 6657 } else { 6658 rc = emlxs_mbext_read_fcf_table(hba, mbq, -1); 6659 } | |
6660 | 6426 |
6661 if (rc == 0) { 6662 (void) emlxs_mem_put(hba, MEM_MBOX, (uint8_t *)mbq); 6663 return (0); 6664 } 6665 6666 rc = emlxs_sli4_issue_mbox_cmd(hba, mbq, MBX_NOWAIT, 0); 6667 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) { 6668 (void) emlxs_mem_put(hba, MEM_MBOX, (uint8_t *)mbq); 6669 } 6670 return (1); 6671 6672} /* emlxs_fcf_bind() */ 6673 6674 6675static int 6676emlxs_fcf_unbind(emlxs_hba_t *hba, uint32_t index) 6677{ 6678 FCFIobj_t *fp; 6679 int i; 6680 6681 mutex_enter(&hba->sli.sli4.id_lock); 6682 /* Loop thru all FCFIs */ 6683 fp = hba->sli.sli4.FCFIp; 6684 for (i = 0; i < hba->sli.sli4.FCFICount; i++) { 6685 if ((index == MAX_FCFCONNECTLIST_ENTRIES) || 6686 (index == fp->FCF_index)) { 6687 if (fp->state & RESOURCE_ALLOCATED) { 6688 mutex_exit(&hba->sli.sli4.id_lock); 6689 if (hba->state > FC_LINK_DOWN) { 6690 fp->state &= ~RESOURCE_FCFI_DISC; 6691 /* Declare link down here */ 6692 emlxs_linkdown(hba); 6693 } 6694 /* There should only be 1 FCF for now */ 6695 return (1); 6696 } 6697 } 6698 } 6699 mutex_exit(&hba->sli.sli4.id_lock); | 6427 mcc_ext = (IOCTL_COMMON_MCC_CREATE_EXT *)&mb->un.varSLIConfig.payload; 6428 hba->sli.sli4.mq.qid = mcc_ext->params.response.id; |
6700 return (0); 6701 | 6429 return (0); 6430 |
6702} /* emlxs_fcf_unbind() */ | 6431} /* emlxs_sli4_create_queues() */ |
6703 6704 6705/*ARGSUSED*/ 6706extern int 6707emlxs_sli4_check_fcf_config(emlxs_hba_t *hba, FCF_RECORD_t *fcfrec) 6708{ 6709 int i; | 6432 6433 6434/*ARGSUSED*/ 6435extern int 6436emlxs_sli4_check_fcf_config(emlxs_hba_t *hba, FCF_RECORD_t *fcfrec) 6437{ 6438 int i; |
6710 uint32_t rval = 1; | |
6711 6712 if (!(hba->flag & FC_FIP_SUPPORTED)) { 6713 if (!hba->sli.sli4.cfgFCOE.length) { 6714 /* Nothing specified, so everything matches */ 6715 /* For nonFIP only use index 0 */ 6716 if (fcfrec->fcf_index == 0) { 6717 return (1); /* success */ 6718 } --- 13 unchanged lines hidden (view full) --- 6732 if (!hba->sli.sli4.cfgFCF.length) { 6733 /* Nothing specified, so everything matches */ 6734 return (1); /* success */ 6735 } 6736 6737 /* Just check FabricName for now */ 6738 for (i = 0; i < MAX_FCFCONNECTLIST_ENTRIES; i++) { 6739 if ((hba->sli.sli4.cfgFCF.entry[i].FabricNameValid) && | 6439 6440 if (!(hba->flag & FC_FIP_SUPPORTED)) { 6441 if (!hba->sli.sli4.cfgFCOE.length) { 6442 /* Nothing specified, so everything matches */ 6443 /* For nonFIP only use index 0 */ 6444 if (fcfrec->fcf_index == 0) { 6445 return (1); /* success */ 6446 } --- 13 unchanged lines hidden (view full) --- 6460 if (!hba->sli.sli4.cfgFCF.length) { 6461 /* Nothing specified, so everything matches */ 6462 return (1); /* success */ 6463 } 6464 6465 /* Just check FabricName for now */ 6466 for (i = 0; i < MAX_FCFCONNECTLIST_ENTRIES; i++) { 6467 if ((hba->sli.sli4.cfgFCF.entry[i].FabricNameValid) && |
6740 (hba->sli.sli4.cfgFCF.entry[i].Valid)) { 6741 rval = 0; 6742 if (bcmp((char *)fcfrec->fabric_name_identifier, 6743 hba->sli.sli4.cfgFCF.entry[i].FabricName, 8) == 0) { 6744 return (1); /* success */ 6745 } | 6468 (bcmp((char *)fcfrec->fabric_name_identifier, 6469 hba->sli.sli4.cfgFCF.entry[i].FabricName, 8) == 0)) { 6470 return (1); /* success */ |
6746 } 6747 } | 6471 } 6472 } |
6748 return (rval); 6749} | 6473 return (0); |
6750 | 6474 |
6475} /* emlxs_sli4_check_fcf_config() */ |
|
6751 | 6476 |
6752extern FCFIobj_t * 6753emlxs_sli4_assign_fcfi(emlxs_hba_t *hba, FCF_RECORD_t *fcfrec) 6754{ 6755 emlxs_port_t *port = &PPORT; 6756 FCFIobj_t *fcfp; 6757 int i; | |
6758 | 6477 |
6759 fcfp = emlxs_sli4_find_fcfi_fcfrec(hba, fcfrec); 6760 if (!fcfp) { 6761 fcfp = emlxs_sli4_alloc_fcfi(hba); 6762 if (!fcfp) { 6763 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_init_failed_msg, 6764 "Unable to alloc FCFI for fcf index %d", 6765 fcfrec->fcf_index); 6766 return (0); 6767 } 6768 fcfp->FCF_index = fcfrec->fcf_index; 6769 } 6770 6771 bcopy((char *)fcfrec, &fcfp->fcf_rec, sizeof (FCF_RECORD_t)); 6772 6773 for (i = 0; i < 512; i++) { 6774 if (fcfrec->vlan_bitmap[i / 8] == (1 << (i % 8))) { 6775 fcfp->vlan_id = i; 6776 fcfp->state |= RESOURCE_FCFI_VLAN_ID; 6777 break; 6778 } 6779 } 6780 6781 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 6782 "FCFI %d: idx %x av %x val %x ste %x macp %x vid %x " 6783 "addr: %02x:%02x:%02x:%02x:%02x:%02x", 6784 fcfp->FCFI, 6785 fcfrec->fcf_index, 6786 fcfrec->fcf_available, 6787 fcfrec->fcf_valid, 6788 fcfrec->fcf_state, 6789 fcfrec->mac_address_provider, 6790 fcfp->vlan_id, 6791 fcfrec->fcf_mac_address_hi[0], 6792 fcfrec->fcf_mac_address_hi[1], 6793 fcfrec->fcf_mac_address_hi[2], 6794 fcfrec->fcf_mac_address_hi[3], 6795 fcfrec->fcf_mac_address_low[0], 6796 fcfrec->fcf_mac_address_low[1]); 6797 6798 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 6799 "fabric: %02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x", 6800 fcfrec->fabric_name_identifier[0], 6801 fcfrec->fabric_name_identifier[1], 6802 fcfrec->fabric_name_identifier[2], 6803 fcfrec->fabric_name_identifier[3], 6804 fcfrec->fabric_name_identifier[4], 6805 fcfrec->fabric_name_identifier[5], 6806 fcfrec->fabric_name_identifier[6], 6807 fcfrec->fabric_name_identifier[7]); 6808 6809 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 6810 "switch: %02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x", 6811 fcfrec->switch_name_identifier[0], 6812 fcfrec->switch_name_identifier[1], 6813 fcfrec->switch_name_identifier[2], 6814 fcfrec->switch_name_identifier[3], 6815 fcfrec->switch_name_identifier[4], 6816 fcfrec->switch_name_identifier[5], 6817 fcfrec->switch_name_identifier[6], 6818 fcfrec->switch_name_identifier[7]); 6819 6820 return (fcfp); 6821 6822} /* emlxs_sli4_assign_fcfi() */ 6823 6824 6825extern FCFIobj_t * 6826emlxs_sli4_bind_fcfi(emlxs_hba_t *hba) 6827{ 6828 emlxs_port_t *port = &PPORT; 6829 FCFIobj_t *fp; 6830 VFIobj_t *vfip; 6831 MAILBOXQ *mbq; 6832 int rc; 6833 uint32_t i; 6834 6835 mutex_enter(&hba->sli.sli4.id_lock); 6836 /* Loop thru all FCFIs */ 6837 fp = hba->sli.sli4.FCFIp; 6838 for (i = 0; i < hba->sli.sli4.FCFICount; i++) { 6839 if (fp->state & RESOURCE_ALLOCATED) { 6840 /* 6841 * Look for one thats valid, available 6842 * and matches our FCF configuration info. 6843 */ 6844 if (fp->fcf_rec.fcf_valid && 6845 fp->fcf_rec.fcf_available && 6846 emlxs_sli4_check_fcf_config(hba, &fp->fcf_rec)) { 6847 /* Since we only support one FCF */ 6848 break; 6849 } 6850 } 6851 fp++; 6852 } 6853 mutex_exit(&hba->sli.sli4.id_lock); 6854 6855 if (i == hba->sli.sli4.FCFICount) { 6856 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 6857 "Not a valid FCF"); 6858 return (0); 6859 } 6860 6861 if (fp->state & RESOURCE_FCFI_REG) { 6862 6863 if (!fp->fcf_vfi) { 6864 vfip = emlxs_sli4_alloc_vfi(hba, fp); 6865 if (!vfip) { 6866 EMLXS_MSGF(EMLXS_CONTEXT, 6867 &emlxs_init_failed_msg, 6868 "Fabric VFI alloc failure, fcf index %d", 6869 fp->FCF_index); 6870 (void) emlxs_sli4_free_fcfi(hba, fp); 6871 return (0); 6872 } 6873 fp->fcf_vfi = vfip; 6874 } 6875 6876 if (!fp->fcf_vpi) { 6877 fp->fcf_vpi = port; 6878 port->VFIp = fp->fcf_vfi; 6879 port->VFIp->outstandingVPIs++; 6880 } 6881 6882 if (!(fp->state & RESOURCE_FCFI_DISC)) { 6883 fp->state |= RESOURCE_FCFI_DISC; 6884 emlxs_linkup(hba); 6885 } 6886 return (fp); 6887 } 6888 6889 if ((mbq = (MAILBOXQ *) emlxs_mem_get(hba, MEM_MBOX, 1)) == 0) { 6890 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_init_failed_msg, 6891 "Unable to alloc mbox for fcf index %d", 6892 fp->fcf_rec.fcf_index); 6893 return (0); 6894 } 6895 emlxs_mb_reg_fcfi(hba, mbq, fp); 6896 6897 rc = emlxs_sli4_issue_mbox_cmd(hba, mbq, MBX_NOWAIT, 0); 6898 if ((rc != MBX_BUSY) && (rc != MBX_SUCCESS)) { 6899 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_init_failed_msg, 6900 "Unable to issue mbox for fcf index %d", 6901 fp->fcf_rec.fcf_index); 6902 (void) emlxs_mem_put(hba, MEM_MBOX, (uint8_t *)mbq); 6903 } 6904 6905 return (fp); 6906 6907} /* emlxs_sli4_bind_fcfi() */ 6908 6909 | |
6910extern void 6911emlxs_sli4_timer(emlxs_hba_t *hba) 6912{ 6913 /* Perform SLI4 level timer checks */ 6914 | 6478extern void 6479emlxs_sli4_timer(emlxs_hba_t *hba) 6480{ 6481 /* Perform SLI4 level timer checks */ 6482 |
6483 emlxs_fcf_timer_notify(hba); 6484 |
|
6915 emlxs_sli4_timer_check_mbox(hba); 6916 6917 return; 6918 6919} /* emlxs_sli4_timer() */ 6920 6921 6922static void --- 9 unchanged lines hidden (view full) --- 6932 6933 mutex_enter(&EMLXS_PORT_LOCK); 6934 6935 /* Return if timer hasn't expired */ 6936 if (!hba->mbox_timer || (hba->timer_tics < hba->mbox_timer)) { 6937 mutex_exit(&EMLXS_PORT_LOCK); 6938 return; 6939 } | 6485 emlxs_sli4_timer_check_mbox(hba); 6486 6487 return; 6488 6489} /* emlxs_sli4_timer() */ 6490 6491 6492static void --- 9 unchanged lines hidden (view full) --- 6502 6503 mutex_enter(&EMLXS_PORT_LOCK); 6504 6505 /* Return if timer hasn't expired */ 6506 if (!hba->mbox_timer || (hba->timer_tics < hba->mbox_timer)) { 6507 mutex_exit(&EMLXS_PORT_LOCK); 6508 return; 6509 } |
6510 6511 /* The first to service the mbox queue will clear the timer */ |
|
6940 hba->mbox_timer = 0; 6941 6942 if (hba->mbox_queue_flag) { 6943 if (hba->mbox_mbq) { 6944 mb = (MAILBOX *)hba->mbox_mbq; 6945 } 6946 } 6947 --- 35 unchanged lines hidden (view full) --- 6983 6984 mutex_exit(&EMLXS_PORT_LOCK); 6985 6986 /* Perform mailbox cleanup */ 6987 /* This will wake any sleeping or polling threads */ 6988 emlxs_mb_fini(hba, NULL, MBX_TIMEOUT); 6989 6990 /* Trigger adapter shutdown */ | 6512 hba->mbox_timer = 0; 6513 6514 if (hba->mbox_queue_flag) { 6515 if (hba->mbox_mbq) { 6516 mb = (MAILBOX *)hba->mbox_mbq; 6517 } 6518 } 6519 --- 35 unchanged lines hidden (view full) --- 6555 6556 mutex_exit(&EMLXS_PORT_LOCK); 6557 6558 /* Perform mailbox cleanup */ 6559 /* This will wake any sleeping or polling threads */ 6560 emlxs_mb_fini(hba, NULL, MBX_TIMEOUT); 6561 6562 /* Trigger adapter shutdown */ |
6991 emlxs_thread_spawn(hba, emlxs_shutdown_thread, NULL, NULL); | 6563 emlxs_thread_spawn(hba, emlxs_shutdown_thread, 0, 0); |
6992 6993 return; 6994 6995} /* emlxs_sli4_timer_check_mbox() */ 6996 6997 6998extern void | 6564 6565 return; 6566 6567} /* emlxs_sli4_timer_check_mbox() */ 6568 6569 6570extern void |
6999emlxs_data_dump(emlxs_hba_t *hba, char *str, uint32_t *iptr, int cnt, int err) | 6571emlxs_data_dump(emlxs_port_t *port, char *str, uint32_t *iptr, int cnt, int err) |
7000{ | 6572{ |
7001 emlxs_port_t *port = &PPORT; | |
7002 void *msg; 7003 7004 if (err) { 7005 msg = &emlxs_sli_err_msg; 7006 } else { 7007 msg = &emlxs_sli_detail_msg; 7008 } 7009 --- 61 unchanged lines hidden (view full) --- 7071#ifdef FMA_SUPPORT 7072 /* Access handle validation */ 7073 EMLXS_CHK_ACC_HANDLE(hba, hba->pci_acc_handle); 7074#endif /* FMA_SUPPORT */ 7075 7076} /* emlxs_ue_dump() */ 7077 7078 | 6573 void *msg; 6574 6575 if (err) { 6576 msg = &emlxs_sli_err_msg; 6577 } else { 6578 msg = &emlxs_sli_detail_msg; 6579 } 6580 --- 61 unchanged lines hidden (view full) --- 6642#ifdef FMA_SUPPORT 6643 /* Access handle validation */ 6644 EMLXS_CHK_ACC_HANDLE(hba, hba->pci_acc_handle); 6645#endif /* FMA_SUPPORT */ 6646 6647} /* emlxs_ue_dump() */ 6648 6649 |
7079void | 6650static void |
7080emlxs_sli4_poll_erratt(emlxs_hba_t *hba) 7081{ 7082 emlxs_port_t *port = &PPORT; 7083 uint32_t ue_h; 7084 uint32_t ue_l; 7085 7086 if (hba->flag & FC_HARDWARE_ERROR) { 7087 return; 7088 } 7089 7090 ue_l = ddi_get32(hba->pci_acc_handle, 7091 (uint32_t *)(hba->pci_addr + PCICFG_UE_STATUS_LO_OFFSET)); 7092 ue_h = ddi_get32(hba->pci_acc_handle, 7093 (uint32_t *)(hba->pci_addr + PCICFG_UE_STATUS_HI_OFFSET)); 7094 7095 if ((~hba->sli.sli4.ue_mask_lo & ue_l) || | 6651emlxs_sli4_poll_erratt(emlxs_hba_t *hba) 6652{ 6653 emlxs_port_t *port = &PPORT; 6654 uint32_t ue_h; 6655 uint32_t ue_l; 6656 6657 if (hba->flag & FC_HARDWARE_ERROR) { 6658 return; 6659 } 6660 6661 ue_l = ddi_get32(hba->pci_acc_handle, 6662 (uint32_t *)(hba->pci_addr + PCICFG_UE_STATUS_LO_OFFSET)); 6663 ue_h = ddi_get32(hba->pci_acc_handle, 6664 (uint32_t *)(hba->pci_addr + PCICFG_UE_STATUS_HI_OFFSET)); 6665 6666 if ((~hba->sli.sli4.ue_mask_lo & ue_l) || |
7096 (~hba->sli.sli4.ue_mask_hi & ue_h)) { | 6667 (~hba->sli.sli4.ue_mask_hi & ue_h) || 6668 (hba->sli.sli4.flag & EMLXS_SLI4_HW_ERROR)) { |
7097 /* Unrecoverable error detected */ 7098 /* Shut the HBA down */ 7099 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_hardware_error_msg, 7100 "Host Error: ueLow:%08x ueHigh:%08x maskLow:%08x " 7101 "maskHigh:%08x", 7102 ue_l, ue_h, hba->sli.sli4.ue_mask_lo, 7103 hba->sli.sli4.ue_mask_hi); 7104 7105 EMLXS_STATE_CHANGE(hba, FC_ERROR); 7106 7107 emlxs_sli4_hba_flush_chipq(hba); 7108 | 6669 /* Unrecoverable error detected */ 6670 /* Shut the HBA down */ 6671 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_hardware_error_msg, 6672 "Host Error: ueLow:%08x ueHigh:%08x maskLow:%08x " 6673 "maskHigh:%08x", 6674 ue_l, ue_h, hba->sli.sli4.ue_mask_lo, 6675 hba->sli.sli4.ue_mask_hi); 6676 6677 EMLXS_STATE_CHANGE(hba, FC_ERROR); 6678 6679 emlxs_sli4_hba_flush_chipq(hba); 6680 |
7109 emlxs_thread_spawn(hba, emlxs_shutdown_thread, NULL, NULL); | 6681 emlxs_thread_spawn(hba, emlxs_shutdown_thread, 0, 0); |
7110 } 7111 7112} /* emlxs_sli4_poll_erratt() */ 7113 | 6682 } 6683 6684} /* emlxs_sli4_poll_erratt() */ 6685 |
7114int 7115emlxs_sli4_unreg_all_rpi_by_port(emlxs_port_t *port) | 6686 6687extern uint32_t 6688emlxs_sli4_reg_did(emlxs_port_t *port, uint32_t did, SERV_PARM *param, 6689 emlxs_buf_t *sbp, fc_unsol_buf_t *ubp, IOCBQ *iocbq) |
7116{ 7117 emlxs_hba_t *hba = HBA; | 6690{ 6691 emlxs_hba_t *hba = HBA; |
6692 NODELIST *node; 6693 RPIobj_t *rpip; 6694 uint32_t rval; 6695 6696 /* Check for invalid node ids to register */ 6697 if ((did == 0) && (!(hba->flag & FC_LOOPBACK_MODE))) { 6698 return (1); 6699 } 6700 6701 if (did & 0xff000000) { 6702 return (1); 6703 } 6704 6705 if ((rval = emlxs_mb_check_sparm(hba, param))) { 6706 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_node_create_failed_msg, 6707 "Invalid service parameters. did=%06x rval=%d", did, 6708 rval); 6709 6710 return (1); 6711 } 6712 6713 /* Check if the node limit has been reached */ 6714 if (port->node_count >= hba->max_nodes) { 6715 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_node_create_failed_msg, 6716 "Limit reached. did=%06x count=%d", did, 6717 port->node_count); 6718 6719 return (1); 6720 } 6721 6722 node = emlxs_node_find_did(port, did); 6723 rpip = EMLXS_NODE_TO_RPI(port, node); 6724 6725 rval = emlxs_rpi_online_notify(port, rpip, did, param, (void *)sbp, 6726 (void *)ubp, (void *)iocbq); 6727 6728 return (rval); 6729 6730} /* emlxs_sli4_reg_did() */ 6731 6732 6733extern uint32_t 6734emlxs_sli4_unreg_node(emlxs_port_t *port, emlxs_node_t *node, 6735 emlxs_buf_t *sbp, fc_unsol_buf_t *ubp, IOCBQ *iocbq) 6736{ 6737 RPIobj_t *rpip; 6738 uint32_t rval; 6739 6740 if (!node) { 6741 /* Unreg all nodes */ 6742 (void) emlxs_sli4_unreg_all_nodes(port); 6743 return (1); 6744 } 6745 6746 /* Check for base node */ 6747 if (node == &port->node_base) { 6748 /* Just flush base node */ 6749 (void) emlxs_tx_node_flush(port, &port->node_base, 6750 0, 0, 0); 6751 6752 (void) emlxs_chipq_node_flush(port, 0, 6753 &port->node_base, 0); 6754 6755 port->did = 0; 6756 6757 /* Return now */ 6758 return (1); 6759 } 6760 6761 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_detail_msg, 6762 "unreg_node:%p did=%x rpi=%d", 6763 node, node->nlp_DID, node->nlp_Rpi); 6764 6765 rpip = EMLXS_NODE_TO_RPI(port, node); 6766 6767 if (!rpip) { 6768 EMLXS_MSGF(EMLXS_CONTEXT, &emlxs_sli_err_msg, 6769 "unreg_node:%p did=%x rpi=%d. RPI not found.", 6770 node, node->nlp_DID, node->nlp_Rpi); 6771 6772 emlxs_node_rm(port, node); 6773 return (1); 6774 } 6775 6776 rval = emlxs_rpi_offline_notify(port, rpip, (void *)sbp, (void *)ubp, 6777 (void *)iocbq); 6778 6779 return (rval); 6780 6781} /* emlxs_sli4_unreg_node() */ 6782 6783 6784extern uint32_t 6785emlxs_sli4_unreg_all_nodes(emlxs_port_t *port) 6786{ |
|
7118 NODELIST *nlp; 7119 int i; | 6787 NODELIST *nlp; 6788 int i; |
6789 uint32_t found; |
|
7120 | 6790 |
7121 rw_enter(&port->node_rwlock, RW_WRITER); | 6791 /* Set the node tags */ 6792 /* We will process all nodes with this tag */ 6793 rw_enter(&port->node_rwlock, RW_READER); 6794 found = 0; |
7122 for (i = 0; i < EMLXS_NUM_HASH_QUES; i++) { 7123 nlp = port->node_table[i]; 7124 while (nlp != NULL) { | 6795 for (i = 0; i < EMLXS_NUM_HASH_QUES; i++) { 6796 nlp = port->node_table[i]; 6797 while (nlp != NULL) { |
7125 if (nlp->nlp_Rpi != 0xffff) { 7126 rw_exit(&port->node_rwlock); 7127 (void) emlxs_mb_unreg_rpi(port, 7128 nlp->nlp_Rpi, 0, 0, 0); 7129 rw_enter(&port->node_rwlock, RW_WRITER); 7130 } else { 7131 /* Just free nlp back to the pool */ 7132 port->node_table[i] = nlp->nlp_list_next; 7133 (void) emlxs_mem_put(hba, MEM_NLP, 7134 (uint8_t *)nlp); 7135 } 7136 nlp = port->node_table[i]; | 6798 found = 1; 6799 nlp->nlp_tag = 1; 6800 nlp = nlp->nlp_list_next; |
7137 } 7138 } 7139 rw_exit(&port->node_rwlock); 7140 | 6801 } 6802 } 6803 rw_exit(&port->node_rwlock); 6804 |
6805 if (!found) { 6806 return (0); 6807 } 6808 6809 for (;;) { 6810 rw_enter(&port->node_rwlock, RW_READER); 6811 found = 0; 6812 for (i = 0; i < EMLXS_NUM_HASH_QUES; i++) { 6813 nlp = port->node_table[i]; 6814 while (nlp != NULL) { 6815 if (!nlp->nlp_tag) { 6816 nlp = nlp->nlp_list_next; 6817 continue; 6818 } 6819 nlp->nlp_tag = 0; 6820 found = 1; 6821 break; 6822 } 6823 6824 if (found) { 6825 break; 6826 } 6827 } 6828 rw_exit(&port->node_rwlock); 6829 6830 if (!found) { 6831 break; 6832 } 6833 6834 (void) emlxs_sli4_unreg_node(port, nlp, 0, 0, 0); 6835 } 6836 |
|
7141 return (0); | 6837 return (0); |
7142} /* emlxs_sli4_unreg_all_rpi_by_port() */ | 6838 6839} /* emlxs_sli4_unreg_all_nodes() */ |