emlxs_mbox.c (6b511167) emlxs_mbox.c (a3170057)
1/*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at

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17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21
22/*
23 * Copyright (c) 2004-2012 Emulex. All rights reserved.
24 * Use is subject to license terms.
1/*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at

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17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21
22/*
23 * Copyright (c) 2004-2012 Emulex. All rights reserved.
24 * Use is subject to license terms.
25 * Copyright 2020 RackTop Systems, Inc.
25 */
26
27#include <emlxs.h>
28
29/* Required for EMLXS_CONTEXT in EMLXS_MSGF calls */
30EMLXS_MSG_DEF(EMLXS_MBOX_C);
31
32

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986 qp->params.request.pages[0].addrLow = PADDR_LO(addr);
987 qp->params.request.pages[0].addrHigh = PADDR_HI(addr);
988
989 break;
990
991 case 1:
992 default:
993 mb4->un.varSLIConfig.be.payload_length =
26 */
27
28#include <emlxs.h>
29
30/* Required for EMLXS_CONTEXT in EMLXS_MSGF calls */
31EMLXS_MSG_DEF(EMLXS_MBOX_C);
32
33

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987 qp->params.request.pages[0].addrLow = PADDR_LO(addr);
988 qp->params.request.pages[0].addrHigh = PADDR_HI(addr);
989
990 break;
991
992 case 1:
993 default:
994 mb4->un.varSLIConfig.be.payload_length =
994 sizeof (IOCTL_COMMON_MQ_CREATE) + IOCTL_HEADER_SZ;
995 sizeof (IOCTL_COMMON_MQ_CREATE_EXT_V1) + IOCTL_HEADER_SZ;
995 mb4->un.varSLIConfig.be.un_hdr.hdr_req.subsystem =
996 IOCTL_SUBSYSTEM_COMMON;
997 mb4->un.varSLIConfig.be.un_hdr.hdr_req.opcode =
998 COMMON_OPCODE_MQ_CREATE_EXT;
999 mb4->un.varSLIConfig.be.un_hdr.hdr_req.timeout = 0;
1000 mb4->un.varSLIConfig.be.un_hdr.hdr_req.req_length =
1001 sizeof (IOCTL_COMMON_MQ_CREATE_EXT_V1);
1002 mb4->un.varSLIConfig.be.un_hdr.hdr_req.version = 1;

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1586
1587 hba->link_event_tag = la.eventTag;
1588 port->lip_type = 0;
1589
1590 /* If link not already up then declare it up now */
1591 if ((la.attType == AT_LINK_UP) && (hba->state < FC_LINK_UP)) {
1592
1593#ifdef MENLO_SUPPORT
996 mb4->un.varSLIConfig.be.un_hdr.hdr_req.subsystem =
997 IOCTL_SUBSYSTEM_COMMON;
998 mb4->un.varSLIConfig.be.un_hdr.hdr_req.opcode =
999 COMMON_OPCODE_MQ_CREATE_EXT;
1000 mb4->un.varSLIConfig.be.un_hdr.hdr_req.timeout = 0;
1001 mb4->un.varSLIConfig.be.un_hdr.hdr_req.req_length =
1002 sizeof (IOCTL_COMMON_MQ_CREATE_EXT_V1);
1003 mb4->un.varSLIConfig.be.un_hdr.hdr_req.version = 1;

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1587
1588 hba->link_event_tag = la.eventTag;
1589 port->lip_type = 0;
1590
1591 /* If link not already up then declare it up now */
1592 if ((la.attType == AT_LINK_UP) && (hba->state < FC_LINK_UP)) {
1593
1594#ifdef MENLO_SUPPORT
1594 if ((hba->model_info.device_id == PCI_DEVICE_ID_HORNET) &&
1595 if (hba->model_info.vendor_id == PCI_VENDOR_ID_EMULEX &&
1596 hba->model_info.device_id == PCI_DEVICE_ID_HORNET &&
1595 (hba->flag & (FC_ILB_MODE | FC_ELB_MODE))) {
1596 la.topology = TOPOLOGY_LOOP;
1597 la.granted_AL_PA = 0;
1598 port->alpa_map[0] = 1;
1599 port->alpa_map[1] = 0;
1600 la.lipType = LT_PORT_INIT;
1601 }
1602#endif /* MENLO_SUPPORT */

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1656 alpa_map[j + 5],
1657 alpa_map[j + 6],
1658 alpa_map[j + 7]);
1659 }
1660 }
1661 }
1662#ifdef MENLO_SUPPORT
1663 /* Check if Menlo maintenance mode is enabled */
1597 (hba->flag & (FC_ILB_MODE | FC_ELB_MODE))) {
1598 la.topology = TOPOLOGY_LOOP;
1599 la.granted_AL_PA = 0;
1600 port->alpa_map[0] = 1;
1601 port->alpa_map[1] = 0;
1602 la.lipType = LT_PORT_INIT;
1603 }
1604#endif /* MENLO_SUPPORT */

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1658 alpa_map[j + 5],
1659 alpa_map[j + 6],
1660 alpa_map[j + 7]);
1661 }
1662 }
1663 }
1664#ifdef MENLO_SUPPORT
1665 /* Check if Menlo maintenance mode is enabled */
1664 if (hba->model_info.device_id ==
1665 PCI_DEVICE_ID_HORNET) {
1666 if (hba->model_info.vendor_id == PCI_VENDOR_ID_EMULEX &&
1667 hba->model_info.device_id == PCI_DEVICE_ID_HORNET) {
1666 if (la.mm == 1) {
1667 EMLXS_MSGF(EMLXS_CONTEXT,
1668 &emlxs_link_atten_msg,
1669 "Maintenance Mode enabled.");
1670
1671 mutex_enter(&EMLXS_PORT_LOCK);
1672 hba->flag |= FC_MENLO_MODE;
1673 mutex_exit(&EMLXS_PORT_LOCK);

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2135 /*
2136 * Setting up the link speed
2137 */
2138 switch (linkspeed) {
2139 case 0:
2140 break;
2141
2142 case 1:
1668 if (la.mm == 1) {
1669 EMLXS_MSGF(EMLXS_CONTEXT,
1670 &emlxs_link_atten_msg,
1671 "Maintenance Mode enabled.");
1672
1673 mutex_enter(&EMLXS_PORT_LOCK);
1674 hba->flag |= FC_MENLO_MODE;
1675 mutex_exit(&EMLXS_PORT_LOCK);

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2137 /*
2138 * Setting up the link speed
2139 */
2140 switch (linkspeed) {
2141 case 0:
2142 break;
2143
2144 case 1:
2143 if (!(vpd->link_speed & LMT_1GB_CAPABLE)) {
2144 linkspeed = 0;
2145 }
2145 linkspeed = (vpd->link_speed & LMT_1GB_CAPABLE) == 0 ? 0 :
2146 LINK_SPEED_1G;
2146 break;
2147
2148 case 2:
2147 break;
2148
2149 case 2:
2149 if (!(vpd->link_speed & LMT_2GB_CAPABLE)) {
2150 linkspeed = 0;
2151 }
2150 linkspeed = (vpd->link_speed & LMT_2GB_CAPABLE) == 0 ? 0 :
2151 LINK_SPEED_2G;
2152 break;
2153
2154 case 4:
2152 break;
2153
2154 case 4:
2155 if (!(vpd->link_speed & LMT_4GB_CAPABLE)) {
2156 linkspeed = 0;
2157 }
2155 linkspeed = (vpd->link_speed & LMT_4GB_CAPABLE) == 0 ? 0 :
2156 LINK_SPEED_4G;
2158 break;
2159
2160 case 8:
2157 break;
2158
2159 case 8:
2161 if (!(vpd->link_speed & LMT_8GB_CAPABLE)) {
2162 linkspeed = 0;
2163 }
2160 linkspeed = (vpd->link_speed & LMT_8GB_CAPABLE) == 0 ? 0 :
2161 LINK_SPEED_8G;
2164 break;
2165
2166 case 10:
2162 break;
2163
2164 case 10:
2167 if (!(vpd->link_speed & LMT_10GB_CAPABLE)) {
2168 linkspeed = 0;
2169 }
2165 linkspeed = (vpd->link_speed & LMT_10GB_CAPABLE) == 0 ? 0 :
2166 LINK_SPEED_10G;
2170 break;
2171
2172 case 16:
2167 break;
2168
2169 case 16:
2173 if (!(vpd->link_speed & LMT_16GB_CAPABLE)) {
2174 linkspeed = 0;
2175 }
2170 linkspeed = (vpd->link_speed & LMT_16GB_CAPABLE) == 0 ? 0 :
2171 LINK_SPEED_16G;
2176 break;
2177
2172 break;
2173
2174 case 32:
2175 linkspeed = (vpd->link_speed & LMT_32GB_CAPABLE) == 0 ? 0 :
2176 LINK_SPEED_32G;
2177 break;
2178
2178 default:
2179 linkspeed = 0;
2180 break;
2181
2182 }
2183
2184 if ((linkspeed > 0) && (vpd->feaLevelHigh >= 0x02)) {
2185 mb->un.varInitLnk.link_flags |= FLAGS_LINK_SPEED;

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2180 linkspeed = 0;
2181 break;
2182
2183 }
2184
2185 if ((linkspeed > 0) && (vpd->feaLevelHigh >= 0x02)) {
2186 mb->un.varInitLnk.link_flags |= FLAGS_LINK_SPEED;

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