xref: /illumos-gate/usr/src/uts/sun4u/taco/io/ppm.conf (revision 7c478bd9)

#
# CDDL HEADER START
#
# The contents of this file are subject to the terms of the
# Common Development and Distribution License, Version 1.0 only
# (the "License").  You may not use this file except in compliance
# with the License.
#
# You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
# or http://www.opensolaris.org/os/licensing.
# See the License for the specific language governing permissions
# and limitations under the License.
#
# When distributing Covered Code, include this CDDL HEADER in each
# file and include the License file at usr/src/OPENSOLARIS.LICENSE.
# If applicable, add the following below this CDDL HEADER, with the
# fields enclosed by brackets "[]" replaced with your own identifying
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#
# Copyright 2005 Sun Microsystems, Inc.  All rights reserved.
# Use is subject to license terms.
#
#ident	"%Z%%M%	%I%	%E% SMI"
#

name="ppm" parent="pseudo" instance=0;

#
# ppm configuration format
#
# "ppm-domains" - in form of "domain_xxx" where "xxx" string highlights
# the nature of the domain;
#
# "domain_xxx-model" - PM model: CPU, PCI, PCI_PROP, FET or LED.
#
# "domain_xxx-propname" - a property name that is exported by device in
# a domain.  Currently, it is used by PCI_PROP model to identify devices
# that are to have their clocks stopped when all power-manageable devices
# in the domain are at D3 power level.
#
# "domain-xxx-devices" - a list of prom path(s) to include every devices
# that fall into "domain_xxx", where wildcard '*' is allowed by following
# the expectation:
#
# "domain-xxx-ctrl" - blank space separated definitions in form of
# keyword=definition [keyword=definition...]
#    The keywords are as follows, where 'method' must come before mask as it
#       tells how to store 'mask' and 'val'.  Missing 'val' defaults to 0.
#
#    which keywords apply depend on cmd.  There are two sets as shown below.
#    Here is the first:
#	cmd=[CPU_GO | LED_ON | LED_OFF | FET_ON | FET_OFF | CLK_ON | CLK_OFF]
# 	path=<prompath>	- control device's /devices pathname (includes minor)
# 	method=[KIO|I2CKIO]	This selects a method which maybe
#		an ioctl that sets a single value or an i2c ioctl that
#		takes a value and a mask for access gpio register
#	iord=<integer> - value of ioctl command for reading
#	iowr=<integer> - value of ioctl command for writing
# 	val=<integer>	- a single integer value, generally the value to which
#			  to set the relevant bits of a register
#	mask=<integer>	- which bits of val are relevant (if method is I2CKIO)
#
#    Here is the second:
#	cmd=[CPU_NEXT | PRE_CHNG | POST_CHNG]
# 	path=<prompath>	   - control device's prom pathname, including minor
# 	method=[CPUSPEEDKIO | VCORE]  This selects a method that uses
#			     information like cpu speed index, value for
#			     adjust cpu core voltage, delays, etc.
#	iowr=<integer>     - value of ioctl write command
#	speeds=<integer>   - indicates the number of cpu speeds that are
#			     supported
#

ppm-domains="domain_cpu", "domain_idefet", "domain_led",
    "domain_pcislot_0", "domain_pcislot_1", "domain_pcislot_2",
    "domain_pcislot_3", "domain_pcislot_4";


#
# 0x6a02 is JPPMIOC_NEXT	(('j' << 8) | 2)
# 0x6a03 is JBPPMIOC_GO		(('j' << 8) | 3)
#
domain_cpu-devices="/SUNW,UltraSPARC-IIIi@*";
domain_cpu-model="CPU";
domain_cpu-control=
    "cmd=CPU_NEXT path=/ppm@1e,0:jbus-ppm method=CPUSPEEDKIO iowr=0x6a02 speeds=3",
    "cmd=PRE_CHNG path=/pci@1e,600000/pmu@6/ppm@0,b3:gpo32 method=VCORE iowr=0x6c02 iord=0x6c01 val=4 delay=150000",
    "cmd=CPU_GO path=/ppm@1e,0:jbus-ppm method=KIO iowr=0x6a03 val=0",
    "cmd=POST_CHNG path=/pci@1e,600000/pmu@6/ppm@0,b3:gpo32 method=VCORE iowr=0x6c02 iord=0x6c01 val=5";

#
# iord -- 0x6c01 is M1535PPMIOC_GET	(('l' << 8) | 1)
# iowr -- 0x6c02 is M1535PPMIOC_SET	(('l' << 8) | 2)
#
# Notes
#
# - No devices to claim in the LED domain
# - Both spled and idefet are active low
#

domain_idefet-devices = "/pci@1e,600000/ide@d";
domain_idefet-model = "FET";
domain_idefet-control =
    "cmd=FET_ON path=/pci@1e,600000/pmu@6/ppm@0,b3:gpo37 method=KIO iowr=0x6c02 iord=0x6c01 val=0 delay=1000000 post_delay=1000000",
    "cmd=FET_OFF path=/pci@1e,600000/pmu@6/ppm@0,b3:gpo37 method=KIO iowr=0x6c02 iord=0x6c01 val=2";

domain_led-devices = "";
domain_led-model = "LED";
domain_led-control =
    "cmd=LED_ON path=/pci@1e,600000/pmu@6/ppm@0,b3:spled method=KIO iowr=0x6c02 iord=0x6c01 val=0",
    "cmd=LED_OFF path=/pci@1e,600000/pmu@6/ppm@0,b3:spled method=KIO iowr=0x6c02 iord=0x6c01 val=1";


# The following describes per pci slot domain control.
# Note that the "domain_pcislot?-devices" property contains wildcard
# character '*', here is how '*' usage is defined in this context:
#   first wildcard indicates device driver name,
#   second wildcard, if presents, indicates function number.
#
# Slots 0 to 3 are on the PCI A leaf (/pci@1e,600000) and slot 4 (the
# 66MHz slot) is on the PCI B leaf (/pci@1f,700000). Note that old Taco
# spec (incorrectly) numbers these slots from 1 to 5 instead of
# from 0 to 4.
#

# slot 0, PCIA segment, 33MHz
#     iowr = (ICS951601_MODIFY_CLOCK | ICS951601_PCI1A_4) = 0x2310
#     iord = (ICS951601_READ_CLOCK   | ICS951601_PCI1A_4) = 0x1310
#
domain_pcislot_0-devices = "/pci@1e,600000/*@2,*", "/pci@1e,600000/*@2";
domain_pcislot_0-model = "PCI_PROP";
domain_pcislot_0-propname = "nonidle-bus-clock-pm";
domain_pcislot_0-control =
    "cmd=CLK_ON path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2310 iord=0x1310 val=1",
    "cmd=CLK_OFF path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2310 iord=0x1310 val=0";

# slot 1, PCIA segment, 33MHz
#     iowr = (ICS951601_MODIFY_CLOCK | ICS951601_PCI1A_5) = 0x2320
#     iord = (ICS951601_READ_CLOCK   | ICS951601_PCI1A_5) = 0x1320
#
domain_pcislot_1-devices = "/pci@1e,600000/*@3,*", "/pci@1e,600000/*@3";
domain_pcislot_1-model = "PCI_PROP";
domain_pcislot_1-propname = "nonidle-bus-clock-pm";
domain_pcislot_1-control =
    "cmd=CLK_ON path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2320 iord=0x1320 val=1",
    "cmd=CLK_OFF path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2320 iord=0x1320 val=0";

# slot 2, PCIA segment, 33MHz
#     iowr = (ICS951601_MODIFY_CLOCK | ICS951601_PCI1A_6) = 0x2340
#     iord = (ICS951601_READ_CLOCK   | ICS951601_PCI1A_6) = 0x1340
#
domain_pcislot_2-devices = "/pci@1e,600000/*@4,*", "/pci@1e,600000/*@4";
domain_pcislot_2-model = "PCI_PROP";
domain_pcislot_2-propname = "nonidle-bus-clock-pm";
domain_pcislot_2-control =
    "cmd=CLK_ON path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2340 iord=0x1340 val=1",
    "cmd=CLK_OFF path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2340 iord=0x1340 val=0";

# slot 3, PCIA segment, 33MHz
#     iowr = (ICS951601_MODIFY_CLOCK | ICS951601_PCI1A_7) = 0x2380
#     iord = (ICS951601_READ_CLOCK   | ICS951601_PCI1A_7) = 0x1380
#
domain_pcislot_3-devices = "/pci@1e,600000/*@5,*", "/pci@1e,600000/*@5";
domain_pcislot_3-model = "PCI_PROP";
domain_pcislot_3-propname = "nonidle-bus-clock-pm";
domain_pcislot_3-control =
    "cmd=CLK_ON path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2380 iord=0x1380 val=1",
    "cmd=CLK_OFF path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2380 iord=0x1380 val=0";

# slot 4, PCIB segment, 66MHz
#     iowr = (ICS951601_MODIFY_CLOCK | ICS951601_PCI2B_1) = 0x2540
#     iord = (ICS951601_READ_CLOCK   | ICS951601_PCI2B_1) = 0x1540
#
domain_pcislot_4-devices = "/pci@1f,700000/*@3,*", "/pci@1f,700000/*@3";
domain_pcislot_4-model = "PCI_PROP";
domain_pcislot_4-propname = "nonidle-bus-clock-pm";
domain_pcislot_4-control =
    "cmd=CLK_ON path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2540 iord=0x1540 val=1",
    "cmd=CLK_OFF path=/pci@1e,600000/isa@7/i2c@0,320/clock-generator@0,d2:ics951601_0 method=KIO iowr=0x2540 iord=0x1540 val=0";