1/*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21/*
22 * Copyright 2006 Sun Microsystems, Inc.  All rights reserved.
23 * Use is subject to license terms.
24 */
25
26#ifndef	_SYS_PCI_SPACE_H
27#define	_SYS_PCI_SPACE_H
28
29#pragma ident	"%Z%%M%	%I%	%E% SMI"
30
31#ifdef	__cplusplus
32extern "C" {
33#endif
34
35#define	PCI_SPURINTR_MSG_DEFAULT -1ull
36
37extern uint_t tomatillo_disallow_bypass;
38
39extern uint_t pci_interrupt_priorities_property;
40extern uint_t pci_config_space_size_zero;
41extern int pci_pbm_dma_sync_wait;
42extern int pci_dvma_sync_before_unmap;
43extern int pci_sync_lock;
44extern int tomatillo_store_store_wrka;
45extern uint_t tm_mtlb_maxpgs;
46extern uint_t tm_mtlb_gc;
47extern uint_t tm_mtlb_gc_manual;
48extern uint32_t pci_spurintr_duration;
49extern uint64_t pci_spurintr_msgs;
50
51
52extern ushort_t pci_command_default;
53extern uint_t pci_set_latency_timer_register;
54extern uint_t pci_set_cache_line_size_register;
55
56#ifdef DEBUG
57extern uint64_t pci_debug_flags;
58extern uint_t pci_warn_pp0;
59#endif
60extern uint_t pci_disable_pass1_workarounds;
61extern uint_t pci_disable_pass2_workarounds;
62extern uint_t pci_disable_pass3_workarounds;
63extern uint_t pci_disable_plus_workarounds;
64extern uint_t pci_disable_default_workarounds;
65extern uint_t ecc_error_intr_enable;
66extern uint_t pci_sbh_error_intr_enable;
67extern uint_t pci_mmu_error_intr_enable;
68extern uint_t pci_stream_buf_enable;
69extern uint_t pci_stream_buf_exists;
70extern uint_t pci_rerun_disable;
71extern uint_t pci_enable_periodic_loopback_dma;
72extern uint_t pci_enable_retry_arb;
73
74extern uint_t pci_bus_parking_enable;
75extern uint_t pci_error_intr_enable;
76extern uint_t pci_retry_disable;
77extern uint_t pci_retry_enable;
78extern uint_t pci_dwsync_disable;
79extern uint_t pci_intsync_disable;
80extern uint_t pci_b_arb_enable;
81extern uint_t pci_a_arb_enable;
82extern uint_t pci_ecc_afsr_retries;
83
84extern uint_t pci_intr_retry_intv;
85extern uint8_t pci_latency_timer;
86extern uint_t pci_panic_on_sbh_errors;
87extern uint_t pci_panic_on_fatal_errors;
88extern uint_t pci_thermal_intr_fatal;
89extern uint_t pci_buserr_interrupt;
90extern uint_t pci_set_dto_value;
91extern uint_t pci_dto_value;
92extern uint_t pci_lock_sbuf;
93extern uint_t pci_use_contexts;
94extern uint_t pci_sc_use_contexts;
95extern uint_t pci_context_minpages;
96extern uint_t pci_ctx_flush_warn;
97extern uint_t pci_ctx_unsuccess_count;
98extern uint_t pci_ctx_no_active_flush;
99extern uint_t pci_ctx_no_compat;
100
101extern uint_t pci_check_all_handlers;
102extern uint_t pci_unclaimed_intr_max;
103extern ulong_t pci_iommu_dvma_end;
104extern uint_t pci_lock_tlb;
105
106extern uint64_t pci_dvma_debug_on;
107extern uint64_t pci_dvma_debug_off;
108extern uint32_t pci_dvma_debug_rec;
109extern uint_t pci_dvma_page_cache_entries;
110extern uint_t pci_dvma_page_cache_clustsz;
111#ifdef PCI_DMA_PROF
112extern uint_t pci_dvmaft_npages;
113extern uint_t pci_dvmaft_limit;
114extern uint_t pci_dvmaft_free;
115extern uint_t pci_dvmaft_success;
116extern uint_t pci_dvmaft_exhaust;
117extern uint_t pci_dvma_vmem_alloc;
118extern uint_t pci_dvma_vmem_xalloc;
119extern uint_t pci_dvma_vmem_free;
120extern uint_t pci_dvma_vmem_xfree;
121#endif
122extern uint_t pci_disable_fdvma;
123
124extern uint_t pci_iommu_ctx_lock_failure;
125extern uint_t pci_preserve_iommu_tsb;
126
127extern uint64_t pci_perr_enable;
128extern uint64_t pci_serr_enable;
129extern uint64_t pci_perr_fatal;
130extern uint64_t pci_serr_fatal;
131extern hrtime_t pci_intrpend_timeout;
132extern hrtime_t pci_sync_buf_timeout;
133extern hrtime_t pci_cdma_intr_timeout;
134extern uint32_t pci_cdma_intr_count;
135
136extern uint32_t pci_dto_fault_warn;
137extern uint64_t pci_dto_intr_enable;
138extern uint64_t pci_dto_count;
139extern uint64_t pci_errtrig_pa;
140
141extern uintptr_t pci_kmem_clid;
142extern uint_t pci_intr_dma_sync;
143extern uint_t pci_xmits_sc_max_prf;
144extern uint64_t xmits_error_intr_enable;
145extern uint_t xmits_perr_recov_int_enable;
146extern uint_t xmits_max_transactions;
147extern uint_t xmits_max_read_bytes;
148extern uint_t xmits_upper_retry_counter;
149extern uint_t xmits_pcix_diag_bugcntl_pcix;
150extern uint_t xmits_pcix_diag_bugcntl_pci;
151
152extern int pci_dvma_remap_enabled;
153extern kthread_t *pci_reloc_thread;
154extern kmutex_t pci_reloc_mutex;
155extern kcondvar_t pci_reloc_cv;
156extern int pci_reloc_presuspend;
157extern int pci_reloc_suspend;
158extern id_t pci_dvma_cbid;
159extern id_t pci_fast_dvma_cbid;
160extern int pci_dma_panic_on_leak;
161
162#ifdef	__cplusplus
163}
164#endif
165
166#endif	/* _SYS_PCI_SPACE_H */
167