xref: /illumos-gate/usr/src/uts/sun4u/sys/cpu_impl.h (revision e98fafb9)
125cf1a30Sjl /*
225cf1a30Sjl  * CDDL HEADER START
325cf1a30Sjl  *
425cf1a30Sjl  * The contents of this file are subject to the terms of the
525cf1a30Sjl  * Common Development and Distribution License (the "License").
625cf1a30Sjl  * You may not use this file except in compliance with the License.
725cf1a30Sjl  *
825cf1a30Sjl  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
925cf1a30Sjl  * or http://www.opensolaris.org/os/licensing.
1025cf1a30Sjl  * See the License for the specific language governing permissions
1125cf1a30Sjl  * and limitations under the License.
1225cf1a30Sjl  *
1325cf1a30Sjl  * When distributing Covered Code, include this CDDL HEADER in each
1425cf1a30Sjl  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
1525cf1a30Sjl  * If applicable, add the following below this CDDL HEADER, with the
1625cf1a30Sjl  * fields enclosed by brackets "[]" replaced with your own identifying
1725cf1a30Sjl  * information: Portions Copyright [yyyy] [name of copyright owner]
1825cf1a30Sjl  *
1925cf1a30Sjl  * CDDL HEADER END
2025cf1a30Sjl  */
2125cf1a30Sjl /*
22*e98fafb9Sjl  * Copyright 2007 Sun Microsystems, Inc.  All rights reserved.
2325cf1a30Sjl  * Use is subject to license terms.
2425cf1a30Sjl  */
2525cf1a30Sjl 
2625cf1a30Sjl #ifndef _SYS_CPU_IMPL_H
2725cf1a30Sjl #define	_SYS_CPU_IMPL_H
2825cf1a30Sjl 
2925cf1a30Sjl #pragma ident	"%Z%%M%	%I%	%E% SMI"
3025cf1a30Sjl 
3125cf1a30Sjl #ifdef	__cplusplus
3225cf1a30Sjl extern "C" {
3325cf1a30Sjl #endif
3425cf1a30Sjl 
3525cf1a30Sjl /*
3625cf1a30Sjl  * Definitions of UltraSparc III cpu implementations as specified
3725cf1a30Sjl  * in version register
3825cf1a30Sjl  */
3925cf1a30Sjl #define	CHEETAH_IMPL			0x14
4025cf1a30Sjl #define	IS_CHEETAH(impl)		((impl) == CHEETAH_IMPL)
4125cf1a30Sjl #define	CHEETAH_MAJOR_VERSION(rev)	(((rev) >> 4) & 0xf)
4225cf1a30Sjl #define	CHEETAH_MINOR_VERSION(rev)	((rev) & 0xf)
4325cf1a30Sjl 
4425cf1a30Sjl /*
4525cf1a30Sjl  * Definitions of UltraSPARC III+ cpu implementation as specified
4625cf1a30Sjl  * in version register
4725cf1a30Sjl  */
4825cf1a30Sjl #define	CHEETAH_PLUS_IMPL		0x15
4925cf1a30Sjl #define	IS_CHEETAH_PLUS(impl)		((impl) == CHEETAH_PLUS_IMPL)
5025cf1a30Sjl #define	CHEETAH_PLUS_MAJOR_VERSION(rev)	CHEETAH_MAJOR_VERSION(rev)
5125cf1a30Sjl #define	CHEETAH_PLUS_MINOR_VERSION(rev)	CHEETAH_MINOR_VERSION(rev)
5225cf1a30Sjl 
5325cf1a30Sjl /*
5425cf1a30Sjl  * Definitions of UltraSPARC IIIi cpu implementation as specified
5525cf1a30Sjl  * in version register.  Jalapeno major and minor rev's are in
5625cf1a30Sjl  * the same location and are the same size as Cheetah/Cheetah+.
5725cf1a30Sjl  */
5825cf1a30Sjl #define	JALAPENO_IMPL			0x16
5925cf1a30Sjl #define	IS_JALAPENO(impl)		((impl) == JALAPENO_IMPL)
6025cf1a30Sjl #define	JALAPENO_MAJOR_VERSION(rev)	CHEETAH_MAJOR_VERSION(rev)
6125cf1a30Sjl #define	JALAPENO_MINOR_VERSION(rev)	CHEETAH_MINOR_VERSION(rev)
6225cf1a30Sjl 
6325cf1a30Sjl /*
6425cf1a30Sjl  * Definitions of UltraSPARC IV cpu implementation as specified
6525cf1a30Sjl  * in version register. Jaguar major and minor rev's are in
6625cf1a30Sjl  * the same location and are the same size as Cheetah/Cheetah+.
6725cf1a30Sjl  */
6825cf1a30Sjl #define	JAGUAR_IMPL			0x18
6925cf1a30Sjl #define	IS_JAGUAR(impl)			((impl) == JAGUAR_IMPL)
7025cf1a30Sjl #define	JAGUAR_MAJOR_VERSION(rev)	CHEETAH_MAJOR_VERSION(rev)
7125cf1a30Sjl #define	JAGUAR_MINOR_VERSION(rev)	CHEETAH_MINOR_VERSION(rev)
7225cf1a30Sjl 
7325cf1a30Sjl /*
7425cf1a30Sjl  * Definitions of UltraSPARC IIIi+ cpu implementation as specified
7525cf1a30Sjl  * in version register.  Serrano major and minor rev's are in
7625cf1a30Sjl  * the same location and are the same size as Cheetah/Cheetah+.
7725cf1a30Sjl  */
7825cf1a30Sjl #define	SERRANO_IMPL			0x22
7925cf1a30Sjl #define	IS_SERRANO(impl)		((impl) == SERRANO_IMPL)
8025cf1a30Sjl #define	SERRANO_MAJOR_VERSION(rev)	CHEETAH_MAJOR_VERSION(rev)
8125cf1a30Sjl #define	SERRANO_MINOR_VERSION(rev)	CHEETAH_MINOR_VERSION(rev)
8225cf1a30Sjl 
8325cf1a30Sjl /*
8425cf1a30Sjl  * Definitions of UltraSPARC IV+ cpu implementation as specified
8525cf1a30Sjl  * in version register. Panther major and minor rev's are in
8625cf1a30Sjl  * the same location and are the same size as Cheetah/Cheetah+.
8725cf1a30Sjl  */
8825cf1a30Sjl #define	PANTHER_IMPL			0x19
8925cf1a30Sjl #define	IS_PANTHER(impl)		((impl) == PANTHER_IMPL)
9025cf1a30Sjl #define	PANTHER_MAJOR_VERSION(rev)	CHEETAH_MAJOR_VERSION(rev)
9125cf1a30Sjl #define	PANTHER_MINOR_VERSION(rev)	CHEETAH_MINOR_VERSION(rev)
9225cf1a30Sjl 
9325cf1a30Sjl 
9425cf1a30Sjl /*
9525cf1a30Sjl  * Definitions of Olympus-C cpu implementations as specified
9625cf1a30Sjl  * in version register
9725cf1a30Sjl  */
9825cf1a30Sjl #define	OLYMPUS_C_IMPL			0x6
9925cf1a30Sjl #define	IS_OLYMPUS_C(impl)		((impl) == OLYMPUS_C_IMPL)
10025cf1a30Sjl #define	OLYMPUS_REV_MASK(x)		(((x) >> 28) & 0x7)
10125cf1a30Sjl #define	OLYMPUS_C_A			0
10225cf1a30Sjl 
103*e98fafb9Sjl /*
104*e98fafb9Sjl  * Definitions for Jupiter cpu.
105*e98fafb9Sjl  */
106*e98fafb9Sjl #define	JUPITER_IMPL			0x7
107*e98fafb9Sjl #define	IS_JUPITER(impl)		((impl) == JUPITER_IMPL)
108*e98fafb9Sjl 
10925cf1a30Sjl #define	CPU_IMPL_IS_CMP(impl)		(IS_JAGUAR(impl) || \
110*e98fafb9Sjl 					IS_PANTHER(impl) || \
111*e98fafb9Sjl 					IS_OLYMPUS_C(impl) || \
112*e98fafb9Sjl 					IS_JUPITER(impl))
11325cf1a30Sjl 
11425cf1a30Sjl #ifdef	__cplusplus
11525cf1a30Sjl }
11625cf1a30Sjl #endif
11725cf1a30Sjl 
11825cf1a30Sjl #endif	/* _SYS_CPU_IMPL_H */
119